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Thermal Probe Maskless Lithography for 27.5 nm Half-Pitch Si Technology Lin Lee Cheong,†,‡ Philip Paul,† Felix Holzner,† Michel Despont,† Daniel J. Coady,§ James L. Hedrick,§ Robert Allen,§ Armin W. Knoll,† and Urs Duerig*,† †

IBM ResearchZurich, Säumerstrasse 4, CH-8803 Rüschlikon, Switzerland Department of Electrical Engineering and Computer Science, Massachusetts Institute of Technology, 77 Massachusetts Ave, Cambridge, Massachusetts 02139, United States § IBM ResearchAlmaden, 650 Harry Road, San Jose, California 95120, United States ‡

S Supporting Information *

ABSTRACT: Thermal scanning probe lithography is used for creating lithographic patterns with 27.5 nm half-pitch line density in a 50 nm thick high carbon content organic resist on a Si substrate. The as-written patterns in the poly phthaladehyde thermal resist layer have a depth of 8 nm, and they are transformed into high-aspect ratio binary patterns in the high carbon content resist using a SiO2 hard-mask layer with a thickness of merely 4 nm and a sequence of selective reactive ion etching steps. Using this process, a line-edge roughness after transfer of 2.7 nm (3σ) has been achieved. The patterns have also been transferred into 50 nm deep structures in the Si substrate with excellent conformal accuracy. The demonstrated process capabilities in terms of feature density and line-edge roughness are in accordance with today’s requirements for maskless lithography, for example for the fabrication of extreme ultraviolet (EUV) masks. KEYWORDS: Thermal probe lithography, maskless lithography, hard-mask transfer, high-resolution patterning

T

lithographic patterns in the PPA resist, typically 10 nm for 30 nm half pitch patterns, (2) the sloped sidewalls of the pattern in PPA, (3) the fact that a residual layer is left at the bottom of the written structures, and (4) the low etch resistance of PPA in gas plasmas. It is therefore important to develop a pattern transfer process that establishes the compatibility of thermal probe lithography with standard processes. The design and development of a pattern transfer process for very thin polymeric resists is also potentially useful for other lithographic processes that utilizes ultrathin layers such as block-copolymer selfassembly. In this Letter, we demonstrate that tSPL can be utilized in combination with conventional planar processing technology for nanostructure fabrication by resorting to a hard mask approach for the amplification of the depth of the lithographic pattern. The hard-mask technology is well-established and widely used. Typically Si, 11 SiO2 ,12,13 Si 3N 4 ,14 TiN,15 amorphous carbon,16 and spin-on glasses17 serve as hardmask layers. In a first step, the high-resolution lithographic pattern in the primary resist is transferred into the hard-mask by means of reactive ion etching (RIE). In a second RIE step, the hard-mask pattern is transferred into a thick, typically >100

hermal scanning probe lithography (tSPL) is a thermomechanical direct-write method enabling fast turnaround fabrication of nanostructures.1,2 The potential of thermal probes to modify structural3,4 and chemical5−8 properties of surfaces has been widely recognized. Heated tips, brought in contact with an organic resist such as polyphthalaldehyde (PPA), trigger the self-amplified depolymerization of the resist into the gaseous phase.9 Unlike conventional beam-based lithography, thermal probes do not suffer from electron-scattering induced proximity effects. By its nature tSPL is also capable of topography read-back using the tip as probe for scanning force microscopy. This enables socalled closed-loop lithography providing direct feedback on the patterning process as well as pattern alignment. The subnanometer sensitivity to surface topographic features allows direct field stitching and overlay without having to resort to special purpose alignment markers with nanometer-scale precision.10 The challenges of fabricating and processing probe-produced structures differ significantly from conventional lithography. In standard optical or beam-based lithography, a chemical profile is patterned into a single thick resist layer, and sections of the resist are selectively removed via development. Further pattern transfer via etching or liftoff of metallic patterns are standard processes today. In tSPL, however, the transfer of a pattern in PPA is more complex due to (1) the shallow depth of the © 2013 American Chemical Society

Received: July 1, 2013 Revised: August 13, 2013 Published: August 21, 2013 4485

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layer was chosen to be in compliance with the current ITRS roadmap19 for resist thickness until 2017. In a second step, a 4 nm thick layer of SiO2 is deposited onto the HM8006 layer by means of RF-magnetron sputtering at room temperature (VonArdenne CS320S cluster tool). The deposition conditions were set to a RF power density of 1.9 W cm−2, a pressure of 2 μbar, and an Ar gas flow rate of 5 sccm, leading to a deposition rate of 0.4 nm/s. In a last step, a 20 nm PPA resist layer for thermomechanical patterning is spin-coated from a cyclohexanone solution onto the SiO2 hard-mask. The process flow for the transfer and amplification of the written structures into a dual tone pattern in the HM6008 layer is schematically depicted in Figure 1. All etching was performed on an Oxford Plasmalab 80 RIE system using a graphite cathode. Patterns generated by tSPL produce sloped profiles that are 7−12 nm deep and do not extend to the bottom of the resist. In a first step the PPA layer is thinned down in a highly controllable manner to a thickness of 4 ± 0.5 nm using a 1:4 ratio O2/N2 plasma. This first RIE step is the most critical one as it directly influences the pattern definition at the hard-mask interface. Dilution by nitrogen reduces the etch rate to 10 nm/ min (see Table 1), enabling reproducible nm scale control of the thickness of the PPA layer. After etching the SiO2 hardmask is exposed at approximately 50% of the depth of the written structures where the sidewall slope is steepest. This provides optimum pattern definition at the hard-mask interface, which is a decisive factor for achieving low line edge roughness in the overall transfer process. Surface roughness of the hard mask layer is the other important factor for accurate pattern definition. As can be seen from Table 1 the surface roughness of the SiO2 layer did not significantly increase as a result of the RIE etching. In a next step, the SiO2 in the exposed areas of the hard-mask is removed using CHF3 RIE. As a result, the original shallow relief pattern is transformed into a dual tone mask for the final O2 RIE pattern transfer into the HM-mask layer. The etch parameters were optimized to achieve simultaneously maximum selectivity and good etch uniformity. Etch selectivity scales with plasma power in the reactor, namely, we observed similar etch rates for SiO2 and PPA at 50 W, whereas SiO2 was etched three times faster than PPA at 200 W. On the other hand, a high plasma power adversely affects the surface roughening, and the best compromise was obtained at a plasma power of 100 W, yielding an etch selectivity of 2:1 and a tolerable increase of the surface roughness by a factor of 2. In addition, the absence of pin-holes and the high etch resistance in the O2 plasma are required, which dictate the minimum thickness of the hard-mask layer. Experimentally we found that a thickness of ≥3 nm was sufficient for achieving pinhole free compact layers exhibiting virtually negligible etch rates in the O2 plasma. In a last step the SiO2 hard-mask is used to transfer

nm, resist layer for further processing. The important point is that the hard-mask layer is sufficiently thick to act as an etch barrier in the second RIE step. In most applications, a thickness of the order of 20 nm is chosen, which also guaranties the absence of pinholes in the layer. On the other hand, one would like to minimize the thickness of the hard-mask to stay within the etch rate budget when using a thin primary resist layer for high-resolution patterning. Zhu et al.18 have successfully demonstrated that 13.5 nm of a high Si-content layer provides excellent etch contrast for transferring 50 nm resist patterns into a 300 nm thick spin-on carbon film. In our case, however, the etch rate budget and the small patterning depth of less than 10 nm dictates a hard-mask layer thickness of less than 5 nm. Here we demonstrate that 4 nm of SiO2 is sufficient for the successful transfer of high density patterns with a half-pitch of 27.5 nm with excellent quality as expressed by a line-edge roughness LER of less than 2.7 nm (3σ). The sample stack used in this study is shown in Figure 1. In a first step, 50 nm of a high carbon content polymer, JSR

Figure 1. Schematic of the process flow: (a) Sample stack after writing of the patterns into the PPA layer. The depth of the topographic pattern is 8 nm. (b) Thin-down of the PPA layer to a residual thickness of 4 nm using O2/N2 RIE. (c) Opening of the SiO2 hard mask using CHF3 RIE. (d) Final transfer of the pattern into the HM8006 resist layer using O2 RIE.

HM8006, is spin coated onto the Si substrate wafer. The HM8006 layer serves as etch mask for the transfer of the patterns into the Si substrate. The thickness of the HM8006

Table 1. Important Parameters Used during Individual RIE Stepsa etched layer

etch mask

PPA SiOx HM

PPA SiOx

gases (W) O2: N2 (1:4) CHF3 O2

power (W)

pressure (mT)

etch rate of layer (nm/min)

10

15

10.5

100 20

15 15

14.0 19.5

mask etch rate (nm/min)

7.0 negligible

initial surface roughness (nm)

final surface roughness (nm)

0.298

0.323

0.268

0.557

a

All etches were performed in the Oxford RIE Plasmalab 80 with a graphite plate. The critical step that determines resolution and line edge roughness is the first step, whereby the PPA is thinned down using a mixture of oxygen and nitrogen. Nitrogen is used as a dilutant to significantly slow down the etch rate of PPA, thus enabling nanometer-precision control of the final thickness. 4486

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Figure 2. (a) AFM scan of the structures patterned in PPA. (b−f) SEM micrographs of patterns written by thermal scanning probe lithography and subsequently etched using the steps described in the text. (b) A dual-tone pattern consisting of nested L-lines and long lines, and the inverse of the pattern are written. The half-pitch of the nested L-lines are 55 nm, 73 nm, and 92 nm from left. Enlarged micrographs of the nested L-lines are also shown: c and d are 55 nm pitch lines and its inverse; e and f are 73 nm pitch lines and its inverse.

of nested L-shapes representing an archetype for dense-packed features has been written. The width of an L is one pixel unit, and the spacing between the L’s is 5, 7, and 9 pixel units in x and y within the respective groups. The inverted pattern consists of free-standing horizontal ridges which correspond to the exact logical inversion of the horizontal groove pattern. The nested L structures are 5, 7, and 9 pixel units wide, and the spacing between the L’s is one pixel unit in x and y within a group. Note that no proximity corrections were applied in writing the patterns, namely, all pixels were written using exactly the same “exposure” parameters (writing force and tip heater temperature). Figure 2b shows an SEM micrograph of the same pattern after the complete transfer into the HM8006 layer as described above. Note that long free-standing ridge structures with a width of less than 10 pixel units could not be transferred successfully partially due to a slight isotropy in the final oxygen etch and mechanical stress but also due to fundamental reasons as will be discussed later. Figure 2 parts c, d, e, and f are respectively enlarged SEM images of the 55 nm pitch L-lines, inverse 55 nm pitch L-lines, 73 nm pitch L-lines, and its inverse.

and amplify the patterns into the 50 nm thick HM8006 layer. A pure O2 plasma is used for this purpose. The plasma power was adjusted to 20 W to minimize isotropic etching. A summary of all important parameters used during the three RIE steps is shown in Table 1. The etch rates were determined by first defining a step height in the polymer or silicon oxide. Atomic force microscopy (AFM) was then used to determine the initial and postetch thickness of the layer at the same location. Relief patterns consisting of groove and inverted ridge structures (see Figure 2) were written into the PPA resist using a hot tip with an apex radius of 5 nm to locally evaporate the resist (for details see Supporting Information). With respect to Figure 2, the tip was scanned from left to right at a scan speed of 1 mm/s using a pixel and line pitch of 9 nm. AFM imaging of the written structures is performed in situ concurrently with writing at half the writing pitch providing a 2× oversampling in x and y. Figure 2a shows the topographic image of the written pattern in the PPA film where dark tones correspond to a 8 ± 1 nm recessed surface with respect to the top surface. The width of the horizontal lines is 1, 2, 3, 5, 10, and 14 pixel units, and the lines are spaced by 15 pixel units. In addition, three groups 4487

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Figure 3. SEM micrograph of the high density L shapes after a 50 nm deep SF6 RIE etch into Si. The sample is tilted by 45° with respect to the SEM beam axis.

Figure 4. (a) Deviation of the line edge contour from a straight line for linear grooves. W1−W14 indicate the width of the grooves in pixel units. Left panels: Total deviation for the upper and lower edge of the grooves. Right panels: Deviation after subtraction of correlated deviations due to scanner cross-talk. (b) SEM image of the inspected pattern and intensity cross section profile along the vertical line indicated in the SEM image. The line contour is defined as the position at 80% of the maximum intensity inside the groove, indicated by the dots in the cross section panel. (c) Correlated deviation due to scanner cross-talk as determined form an average of all edge profiles. (d) Root-mean-square line edge roughness after subtraction of correlated deviations.

The nonorthogonality of the L-lines originates from a slight misalignment of the scan axes in the setup. As a final test we used the patterned HM6008 mask for fabricating 50 nm deep structures in the Si substrate wafer by means of SF6 RIE. The result of the final fabrication step is shown in Figure 3. The width of the trench and ridge structures is as expected from the corresponding mask dimensions. Most importantly, we find that the sidewall roughness has not

significantly suffered from the etch process, which can be taken as a strong indication for the high quality of the HM6008 mask. Line edge roughness after transfer into the HM8006 layer is one of the critical metrics for lithography. We use the horizontal groove lines for a quantitative assessment. The line edge contour from the SEM image shown in Figure 4b is set to the pixel positions inside the grooves at 80% of the maximum intensity level (see Figure 4b). The deviation of the contour from the nominal straight line is depicted in Figure 4a. The line 4488

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Figure 5. Vertical cross section of the parallel line patterns written into the PPA layer for the groove (a) and ridge (b) structures. Also shown is the outline of the apex of the tip with a radius of curvature of 5 nm. (c) Measured line width at a depth of −4 nm (dark blue symbols) versus width in pixel units for groove (solid symbols) and ridge (open symbols) structures. Dashed lines indicate a line fit with a slope of 9 nm per pixel. Note that the lines intersect the vertical axis at an offset of w0 and −w0 for the groove and ridge structures, respectively. Also shown is the line width after transfer (red symbols) as determined from the SEM intensity profiles, see Figure 4. (d) Schematic of the patterning process. The material removal is approximated by an overlay of conical writing primitive at each pixel position.

edge roughness is characterized by random fluctuations which are superimposed on a sinusoidal background. The background arises from cross-talk between the fast scanning x-axis and the slow y-axis in our setup. The crosstalk talk signal, shown in Figure 4c, is determined from a correlation average of all measured line profiles. The correlated deviation is an artifact of our measurement hardware and is not intrinsic to the transfer process. Therefore, it must be subtracted from the measured line edge deviation (see right panels in Figure 4a). Note also that we see no indication of a line edge roughness component with a periodicity of the writing pitch. This is quite remarkable and indicates that there is sufficient heat spread in the polymer to enable surface relaxation after writing. The resulting rootmean-square (rms) line edge roughness (LER) is depicted in Figure 4d. We consistently find 1.5 times lower values of the LER for the upper edge than for the lower one, and the LER is lowest for the one pixel wide groove increasing by approximately 30% for the grooves with a width greater than 5. This effect correlates with the measured slope profiles in the PPA film: Steeper profiles yield better LER values after transfer as will be discussed later. From our data we can say that we achieved better than 0.9 nmrms (2.7 nm 3σ) LER in the HM8006 layer for the wide structures and better than 0.65 nmrms (1.95 nm 3σ) LER for the thinnest, one pixel wide lines which are used to write the nested L-structures with a half pitch of 27.5 nm. These numbers are comparable to LER figures obtained for standard nonchemically amplified resists in high-

resolution e-beam lithography20 and compatible with mask requirements for EUV lithography.21 As indicated above, the process capabilities are critically influenced by the characteristics of the pattern written in the PPA media. To arrive at a quantitative understanding we performed a line width analysis of the horizontal line pattern. Figure 5a and b shows the vertical cross section as measured by AFM of the groove and ridge structures in the PPA layer, respectively. The profiles are superimposed such that the lines which were written last are superimposed. The writing depth is not perfectly uniform. Narrow grooves with a width of less than 3 pixel units and the last written two lines of the wide grooves are 3−4 nm deeper than the remaining lines of the wide grooves. This is due to the fact that the PPA polymer is also partially indented during writing. Indentation is volume preserving, as can also be seen from the pile-up rim which is formed at the edge of the written lines, and can be perfectly recovered by the writing of adjacent lines (see ref 22 for details). The uniform depth of −8 nm of the wide written structures is thus due to genuine material evaporation. The conical apex of the single pixel wide line is imaged as infinitely sharp cusp asperity which is not physical given the apex shape of the tip (also shown in the figure for comparison). The contour of the two pixel wide line, however, is compatible with the tip shape. Therefore, we obtain an estimate for the tipconvolution effect in the AFM image on the order of 9 nm. Correspondingly, we expect that the width of groove and ridge 4489

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Figure 6. (a) Line width of 1 pixel wide grooves as a function of the depth of the written pattern in PPA. Blue square symbols: Line width as determined by AFM at −4 nm with respect to the unpatterned surface. Red circular symbols: Line width as determined from the SEM image of the transferred structure in HM8006. Open square box: Measured half pitch of a high density pattern written in PPA at a patterning depth of 4 nm. (b) AFM image of a high density pattern with 10 nm half pitch. Lower panel: Cross section of the topography along the vertical line in the AFM image.

structures (note that right and left correspond to upper and lower edge in Figure 4, respectively), which corroborates the correlation between LER and steepness of the written profiles. The data suggest a simple empirical relation for the measured rms roughness after transfer of the form LER ≃ 0.4 nmrms × Sl,r. The proportionality factor is of the same order of magnitude as the rms surface roughness of the SiO2 layer. In fact, we expect that deviations Δz of the vertical position of the contact line between the PPA layer and the hard-mask surface translate into a lateral displacements of the contact line by an amount Δy = Sl,rΔz. Therefore, the sidewall roughness basically reflects the random fluctuations of the contour at the interface to the SiO2 hard-mask layer of the structures written in the PPA. Furthermore, one concludes that tight control of the hardmask roughness at the interface to the PPA layer is of paramount importance for achieving high quality pattern definition after transfer. The process error tolerance depends on the depth of the written structures in the PPA layer. Deep structures are favorable as they provide more latitude for the fine-tuning of the initial thinning of the PPA layer. On the other hand, the minimum feature size grows with patterning depth. For a quantitative assessment of the effect, one pixel wide linear grooves were written keeping the heater temperature constant and varying the depth of the structures by adjusting the writing force. As expected, the width of the grooves at a constant depth of −4 nm increases with writing depth, as shown in Figure 6a. From a simple proportional scaling of the writing primitive one would expect that the line width w should increase with writing depth d as Δw/Δd = (Sl + Sr) = 4, whereas the measured ratio has a value of Δw/Δd = 2.2. This means that the side-walls of written structures are steeper for deep grooves than for shallow grooves. We can only speculate about the origin of the effect; most likely, the amount of indentation decreases with increasing patterning depth, leading to overall steeper sidewalls of the written structures. Thus, one has the possibility for trading-off feature size versus smoothness of the structures after transfer. A simple linear extrapolation of the graph to 4 nm writing depth, which is the minimum value tolerated for reliable pattern transfer into the SiO2 hard-mask, stipulates that 10 nm half pitch patterns can be written into the PPA resist. This is indeed the case as shown in Figure 6b. Currently, such high density patterns cannot be transferred into a thick HM8006

structures are under- and overestimated, respectively, by a similar amount. We target a PPA layer thickness of 4 nm after the first O2/N2 RIE step. Assuming perfectly anisotropic etching, we expect that the width of the structures should be given by the width of the profiles at −4 nm. The measured physical width as a function of nominal width in pixel units is shown in Figure 5c as dark blue symbols. The data can be represented by a linear law, wg = Np + w0 and wr = Np − w0 with w0 = 11 nm, for the groove and ridge structures, respectively. The linear scaling is another strong indicator for the fact that pixel interference is negligible in tSPL. In fact, the observed characteristics can be rationalized in terms of a simple model in which the outline of the written structures is given by the superposition of a conical writing primitive as shown in Figure 5d. The widths of the horizontal line structures as inferred from the SEM contour lines after transfer into the HM8006 layer are shown in Figure 5c as red symbols. Grooves appear to be wider and ridges appear to narrower by approximately 9 nm with respect to the PPA profiles as expected from the tip-convolution effect. All groove structures and all ridges with a width of greater than 5 pixel units could be transferred into the HM layer. The five pixel wide long horizontal ridge did not survive the transfer process but residuals of the collapsed line are still visible. On the other hand, the corresponding ridges in the nested L structures, see Figure 2d, including the free-standing elongated arm segments are perfectly reproduced. Most likely, stress in the HM layer and structure dependent under-etching prevented the successful transfer of the long ridges. As can be seen from the line profile analysis, the residual thickness of the PPA was less than 2 nm for the narrow ridges with a width of less than 5 pixels. Therefore it does not come as a surprise that these structures could not be transferred as there was not sufficient PPA left to act as etch mask for the SiO2 hard mask layer. The conical writing primitive is asymmetric leading to steeper side-walls on the left side than on the right side (with respect to Figure 5) of a written groove. This effect is most likely due to a tilting of the tip axis with respect to the surface normal of the sample during the application of the writing force. We quantify the side-wall steepness by the slope of the sidewall, namely, Sl,r = dy/dz ≃ 1.6 and 2.4 nm/nm for the left and write side-wall, respectively. The slope ratio is 1.5 exactly reproducing the LER-effect observed in the transferred 4490

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(7) Wang, D.; Kodali, V. K.; Underwood, I.; William, D.; Jarvholm, J. E.; Okada, T.; Jones, S. C.; Rumi, M.; Dai, Z.; King, W. P.; Marder, S. R.; Curtis, J. E.; Riedo, E. Adv. Funct. Mater. 2009, 19, 3696−3702. (8) Shaw, J. E.; Stavrinou, P. N.; Anthopoulos, T. D. Adv. Mater. 2013, 25, 552−558. (9) Knoll, A.; Pires, D.; Coulembier, O.; Dubois, P.; Hedrick, J.; Frommer, J.; Duerig, U. Adv. Mater. 2010, 22, 3361−3365. (10) Paul, P.; Knoll, A.; Holzner, F.; Duerig, U. Nanotechnology 2012, 23, 385307. (11) Frommhold, A.; Manyam, J.; Palmer, R.; Robinson, A. Microelectron. Eng. 2012, 98, 552−555. (12) Moreau, W. M. Semiconductor lithography: principles, practices, and materials; Plenum Press: New York, 1988; Vol. 233 (13) Tacito, R.; Steinbrüchel, C. J. Electrochem. Soc. 1996, 143, 1974− 1977. (14) Yu, R.; Das, S.; Hobbs, R.; Georgiev, Y.; Ferain, I.; Razavi, P.; Akhavan, N. D.; Colinge, C. A.; Colinge, J. Top-down process of Germanium nanowires using EBL exposure of Hydrogen Silsesquioxane resist. 2012 13th International Conference on Ultimate Integration on Silicon (ULIS), Grenoble, France, Mar 6−7, 2012; pp 145−148. (15) Wei, Y.; Glodde, M.; Yusuff, H.; Lawson, M.; Chang, S.; Yoon, K.; Wu, C.; Kelling, M. Performance of tri-layer process required for 22 nm and beyond. Society of Photo-Optical Instrumentation Engineers (SPIE) Conference Series, 2011; Vol. 7972, p 79 (16) Ho, C.; Lin, X.; Chien, H.; Lien, C. Thin Solid Films 2010, 518, 6076−6079. (17) Muramatsu, M.; Iwashita, M.; Kondo, T.; Hirose, H.; Fujimoto, S. Etch durable spin-on hard mask. Society of Photo-Optical Instrumentation Engineers (SPIE) Conference Series, 2011; Vol. 7972, p 65. (18) Zhu, Z.; Piscani, E.; Wang, Y.; Macie, J.; Neef, C.; Smith, B. Proc. SPIE 2009, 72742K−1. (19) http://www.itrs.net/Links/2011ITRS/2011Tables/ (accessed July 2013). (20) Hahmann, P.; Boettcher, M.; Klein, M. W.; Stolberg, I. A.; Weidenmueller, U. Microelectron. Eng. 2010, 87, 1077−1081. (21) Zweber, A. E.; Gallagher, E.; Sanchez, M.; Senna, T.; Negishi, Y.; Konishi, T.; McGuire, A.; Bozano, L.; Brock, P.; Truong, H. Proc. SPIE 2012, 83220O−1. (22) Altebaeumer, T.; Gotsmann, B.; Pozidis, H.; Knoll, A.; Duerig, U. Nano Lett. 2008, 8, 4398−4403. (23) Strobel, S.; Harry, K. J.; Duan, H.; Yang, J. K.; Manfrinato, V. R.; Berggren, K. K. Nanotechnology 2011, 22, 375301. (24) Samukawa, S. Jpn. J. Appl. Phys. 2006, 45, 2395. (25) Schmid, G. M.; Thompson, E.; Stacey, N.; Resnick, D. J.; Olynick, D. L.; Anderson, E. H. Proc. SPIE 2007, 6517, 17. (26) Wu, Y.; Olynick, D.; Goodyear, A.; Peroz, C.; Dhuey, S.; Liang, X.; Cabrini, S. Microelectron. Eng. 2011, 88, 2785−2789. (27) Petit-Etienne, C.; Pargon, E.; David, S.; Darnon, M.; Vallier, L.; Joubert, O.; Banna, S. J. Vac. Sci. Technol. B 2012, 30, 040604.

layer, however, last but not least because the RIE technology is not ready to cope with such fine structures. The demonstrated process capabilities in terms of feature density and line-edge roughness are in accordance with today’s requirements for mask-less lithography.19 Most importantly we show that high-quality 50 nm deep patterns in Si can be obtained using a 4 nm thick organic resist layer for defining the pattern, and resorting to a 4 nm thick hard-mask layer of sputtered SiO2 for pattern amplification. This opens up new opportunities for pushing the process limits also for e-beam lithography, which requires the use of thin resist layers to achieve sub 20 nm lithography. In fact, 6 nm half-pitch nested L-structures have been written in a 15 nm thick HSQ layer using sophisticated electrochemical development techniques.23 Similar lithographic capabilities are within the scope of thermal probe lithography. Full exploitation of the lithographic capabilities requires further optimizations of the RIE processing steps, which is currently a topic of intense research.24−27 It also appears that thermal probe microscopy potentially can provide better line edge roughness figures since shot-noise is not an issue in the writing process which relies on diffusion of thermal phonons.

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ASSOCIATED CONTENT

* Supporting Information S

Patterning and imaging of the PPA layer. This material is available free of charge via the Internet at http://pubs.acs.org.

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AUTHOR INFORMATION

Corresponding Author

*E-mail: [email protected]. Present Addresses

P.P.: Inspire Corporation for Mechatronic Systems and Manufacturing Technology, Tannen-strasse 3, CH-8092 Zurich, Switzerland; Swiss Litho AG, Technoparkstrasse 1, CH-8005 Zurich, Switzerland. F.H.: ETH Zurich, Department of Materials, ETH Hönggerberg, Wolfgang-Pauli-Strasse 10, 8093 Zürich, Switzerland; Swiss Litho AG, Technoparkstrasse 1, CH-8005 Zurich, Switzerland. Notes

The authors declare no competing financial interest.

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ACKNOWLEDGMENTS The authors thank Ute Drechsler and Richard Stutz for invaluable clean-room assistance. The work was partially supported by Swiss National Science Foundation.

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REFERENCES

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