Tuning Local Electrical Conductivity via Fine Atomic Scale Structures

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Tuning local electrical conductivity via fine atomicscale structures of two-dimensional interfaces Shuai Zhang, Lei Gao, Aisheng Song, Xiaohu Zheng, Quanzhou Yao, Tianbao Ma, Zengfeng Di, Xiqiao Feng, and Qunyang Li Nano Lett., Just Accepted Manuscript • DOI: 10.1021/acs.nanolett.8b02921 • Publication Date (Web): 30 Aug 2018 Downloaded from http://pubs.acs.org on August 31, 2018

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Tuning local electrical conductivity via fine atomic-scale structures of two-dimensional interfaces Shuai Zhang, 1, 2‡ Lei Gao,2, 3‡ Aisheng Song,2 Xiaohu Zheng,4 Quanzhou Yao1, Tianbao Ma,2* Zengfeng Di,4 Xi-Qiao Feng1,2, Qunyang Li1,2* 1

AML, Center for Nano and Micro Mechanics, Department of Engineering Mechanics,

Tsinghua University, Beijing 100084, China. 2

State Key Laboratory of Tribology, Tsinghua University, Beijing 100084, China.

3

Corrosion and Protection Center, Key Laboratory for Environmental Fracture (MOE),

University of Science and Technology Beijing, Beijing 100083, China 4

State Key Laboratory of Functional Materials for Informatics, Shanghai Institute of

Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China.

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ABSTRACT: Two-dimensional (2D) materials have seen a broad range of applications in electronic and optoelectronic applications; however, full realization of this potential hitherto largely hinges on the quality and performance of the electrical contacts formed between 2D materials and their surrounding metals/semiconductors. Despite the progress in revealing the charge injecting mechanisms and enhancing electrical conductance using various interfacial treatments, how the microstructure of contact interfaces affects local electrical conductivity is still very limited. Here, using conductive atomic force microscopy (c-AFM), for the first time, we directly confirm the conjecture that the electrical conductivity of physisorbed 2D material-metal/semiconductor interfaces is determined by the local electronic charge transfer. Using lattice-resolved conductivity mapping and first-principles calculations, we demonstrate that the electronic charge transfer, thereby electrical conductivity, can be fine-tuned by the topological defects of 2D materials and the atomic stacking with respect to the substrate. Our finding provides a novel route to engineer the electrical contact properties by exploiting fine atomic interactions; in the meantime, it also suggests a convenient and nondestructive means of probing subtle interactions along 2D heterogeneous interfaces.

KEYWORDS: electrical contacts, electrical conductivity, two-dimensional materials, heterostructure, charge transfer.


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Relatively low contact conductance in electronic devices based on 2D materials, such as graphene and transition metal dichalcogenides, has posed a major challenge for achieving high electronic performance1-5. Chemisorption through “end-contact” or “edge-contact” generally renders good electrical conductance for 2D contact interfaces6-8; but it often runs a risking of significantly altering the characteristic electronic structure of the 2D materials2, 9. In contrast, interfaces originating from physisorption can better preserve the electronic properties of the 2D materials; yet the conductance without strong interfacial coupling and hybridization is typically limited10, 11. It is believed that, in addition to the Schottky barrier, a van der Waals gap, hypothetically regulated by local charge transfer, may exist for interfaces with weak adsorption resulting in significant increase in contact resistance2. To date, a handful of strategies have been explored experimentally to improve contact conductance for physisorbed interfaces, such as gentle surface treatments using light plasma and ultraviolet ozone12, 13 or metal sandwiching14. Despite the limited success, as contact resistance was traditionally characterized by transfer line measurement or four-point-probe methods4, 6, 15, 16, it is still unclear how subtle interfacial interaction affects the local electrical conductivity of an interface. The fine structures of the 2D heterostructure surfaces have been previously characterized by scanning tunneling microscopy (STM)17-20. However, STM is a manifestation of the local density of states (DOS) at the sample surfaces17-19, which provides less interfacial information. In this work, using conductive atomic force microscopy (c-AFM), we obtained the electrical conductivity map of polycrystalline graphene grown on Ge(111) surface with lattice-level resolution. The graphene-semiconductor contact conductivity was found to be 3 ACS Paragon Plus Environment

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substantially enhanced (7.5 times) at the graphene grain boundaries (GBs). Meanwhile, the contact conductivity of the interface inside a graphene grain also exhibited a notable modulation with a period consistent with the underlying moiré-superlattice structure. Assisted by first-principles calculations, we attributed the unusual electrical contact modulation to the locally enhanced interlayer charge transfer at graphene GBs and domain wall zone in the moiré superlattice structure. In contrast to STM, the current signal in c-AFM directly depends on the interfacial electrical conductivity (or the interlayer transport behavior) between graphene and the underlying substrate21, 22. Because the performance of 2D electronic devices is primarily limited by the interfacial electrical conductivity, rather than the electronic state of the surface, c-AFM provides more relevant information. To explore the correlation between electrical conductivity and local interfacial interactions, we measured the spatially-resolved conductivity of polycrystalline graphene grown on Ge(111) surface using conductive atomic force microscopy (c-AFM). Briefly, a conductive probe was brought into contact with the graphene/Ge(111) surface and a constant bias voltage was imposed while the current was continously monitored when the tip scanned on the surface, as schematically shown in Fig. 1a. From the current image shown in Fig. 1b, one can clearly see that the electrical conductivity is not uniform across the surface and some enclosed regions/islands are more conductive than others. Most pronouncedly, the current flow exhibits a substantial increase at the boundaries of these enclosed areas. By examining the corresponding height image shown in Fig. 1c, we found that the contrast and the local enhancement in the current flow were not correlated with the topographic variation of the underlying Ge substrate. When the scan size was varied from a few hundred nanometers to a 4 ACS Paragon Plus Environment

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few microns, similar behavior was observed with more islands appearing at larger sizes, as shown in Fig. S1. Using scanning tunneling microscopy (STM), we further confirmed that these enclosed regions/islands were individual grains of graphene and the curvy lines with unusual current enhancement were the manifestation of the grain boundaries (more details can be found in Fig. S2). Previous measurements with STM have also revealed abnormally high “protrusion” at the grain boundaries, which was speculated to be caused by high local DOS at the surface20, 23. However, because the tunneling current in STM is known to depend on both tip-sample distance and local DOS of the surface, it is hard to clearly distinguish whether the protrusion is a physical topography fluctuation or a surface Local DOS change23-25. Since the measurement of c-AFM is performed under contact mode, the variation in contact current primarily comes from changes in local electric conductance, which can exclude the effect of surface topography.


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Figure 1. Contact electrical performance measured with conductive atom force microscope. (a) Diagram of the conductive atom force microscopy. (b) A typical current image acquired on Gr/Ge(111) shows a distinct contrast between graphene grains and GBs under a constant bias and normal force of 5 mV and 25.3 nN. Scale bar, 100 nm. (c) The corresponding topography image shows atomic steps with a height of 0.32 nm on Ge substrate. Scale bar, 100 nm. (d) Current images acquired around a same grain boundary (GB) under biases of 4 mV, 6 mV and 8 mV, respectively, as shown from left to right. Scale bar, 10 nm. A couple of markers near the GB with yellow and red triangles are highlighted to help trace the relative locations. (e) Current vs. bias voltage curves measured at the GB and inside the grains under a constant normal force of 8.3 nN. (f) Current vs. normal load curves acquired inside the grains and at the GB under a constant bias of 4 mV. The currents in (e, f) are averaged values of four to five random locations in each region. Error bar presents the standard deviation of the repeated measurements.

To check the robustness of conductivity enhancement effect at the GBs, we performed c-AFM measurements by systematically varying the bias voltage and the normal load while taking current images. Fig. 1d shows three current images taken around a typical grain boundary (GB) when the bias voltage was set at 4.0, 6.0 and 8.0 mV respectively. The 6 ACS Paragon Plus Environment

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high-resolution current maps indicate that moiré patterns also exist in the c-AFM images. Unlike the STM images, where the tunneling current can be affected either by topography or by electrical conductivity23-25, the current measurement in c-AFM directly confirms that the enhancement at the GB and the superlattice level modulation in current are originated from the variation of local contact conductivity (more data can be found in Fig. S3). To quantify the electrical conductance, current with ramping bias voltage curves were obtained at the GB and inside the grains. As shown in Fig. 1e, the contact conductance at the GB is significantly higher (7.5 times) than that inside the grain. Because the current measured by c-AFM can be affected by the tip-graphene contact interface, which may depend on the normal contact load21, 26, 27, current vs. normal load curves were acquired at the GB and inside the grain under a constant bias. As shown in Fig. 1f, the current at the GB is always larger than that measured inside the grain, although in both regions the current would increase with increasing normal load (more details can be found in Fig. S4). This is likely due to the enlarged contact area and improved contact quality under higher contact pressure21, 26, 28. In addition, since Fig. 1e and 1f were intended to illustrate the overall difference in local electrical conductivity between the GB and the grain, we took multiple I-V measurements at random locations within the moiré pattern and reported the averaged values and their uncertainties in Fig. 1e and 1f. We also carried out c-AFM measurements using different probes and under dry N2 environment (relative humidity < 5%) and the potential influences of the probe materials and the gaseous environment are excluded (more details can be found in Fig. S5).


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Figure 2. Modulation of contact electrical properties by moiré superlattice. (a) A typical current image contained two distinct regions, long-period and short-period moiré pattern, which shows a sharp contrast in conductivity. The imaging parameters are bias = 2 mV, normal force = 30.5 nN. Scale bar, 10 nm. (b) and (c) High-resolution current images acquired in regions marked by the blue triangle and the red rectangle in (a), showing clear moiré patterns with periods of ~3.9 nm and ~3.3 nm respectively; the corresponding current profiles are shown in the right panel. The imaging parameters are bias = 5 mV, normal force = 30.5 nN. Scale bars, 5 nm. (d) A schematic diagram depicting the atomic scale structures of the graphene/Ge sample in (a), the silver and the blue spheres represent carbon and germanium atoms respectively; and the corresponding current profile measured along the white dashed line in (a). (e) Current vs. bias voltage curves measured at the long-period and short-period moiré pattern regions under a constant normal force of 30.5 nN. Error bar presents the standard deviation of four tests at random locations in each region. (f) Current vs. normal force curves acquired at the long-period and the short-period moiré pattern regions under a constant bias 30 mV, respectively. Error bar presents the standard deviation of repeated measurements.


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As mentioned earlier, besides the strong enhancement at the GBs, the current map also shows a periodic modulation inside each graphene grain. As illustrated in Fig. 2a, moiré patterns with different periods can be clearly observed near a representative GB in the current map. The zoom-in current images indicate that the moiré pattern on the left grain has a relatively longer period (~3.9 nm) compared to that on the right grain (~3.3 nm), as shown in Figs. 2b, 2c and S6. By taking line profiles from individual grains (right panels of Figs. 2b and 2c), we found that both the averaged value and the modulation magnitude of current are higher for the grain with a long-period moiré pattern. The contrast of the averaged electrical conductivity is also shown in Fig. 2d by a line profile (along the white dashed line in Fig. 2a) across the GB. To quantitatively investigate the influence of the moiré pattern on electrical contact conductance, we performed c-AFM measurements under various conditions on both grains. Fig. 2e shows the current vs. bias voltage curves collected at both grains when normal loaded was at 30.5 nN. The experimental results reveal that the electrical conductance on the long-period moiré grain is about 4 times higher than that on the short-period moiré grain. Similarly, current vs. normal force curves were measured on both grains as shown in Fig. 2f. The electrical conductance on the long-period moiré grain is always higher than that on the short-period moiré grain, although the overall conductance for both grains is enhanced when normal load increases.


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Figure 3. DFT calculations to investigate the electronic structures of the grain boundary and the moiré superlattice. (a) Atomic structure of monolayer graphene bi-crystal with a tilted angle of 21.8° between the two grains (with periodic boundary conditions), the color of the C atoms reflects the height after geometrical relaxation on Ge(111) substrate (not shown). (b) Difference charge density, representing the interfacial charge transfer distribution between graphene and the Ge(111) substrate, the two grain boundaries are highlighted by the narrower regions between the white dashed lines, while the grains are the wider regions otherwise. (c) (Upper panel) Interfacial charge transfer of the cross section noted as the black dashed line in (b); (Lower panel) Local DOS of the carbon atoms at the Fermi level as a function of the x position (more details in Fig. S8). (d) Morphology of graphene on the Ge(111) substrate (not shown) forming the moiré superlattice with a periodicity of 3.2 nm, the color of the C atoms reflects the corrugation of graphene. (e) The interfacial charge transfer distribution between graphene and Ge(111) substrate, three typical regions noted as DW A, Domain and DW B are labelled by circles. (f) The averaged charge transfer distribution (upper panel) and the DOS at the Fermi level (lower panel) in the three typical regions in (e), showing a qualitatively similar trend between the charge transfer and the DOS at the domain and domain wall regions.

To reveal the underlying mechanism for the modulation of electrical contact conductance on GBs and moiré superlattice, density functional theory (DFT) calculations were carried out to 10 ACS Paragon Plus Environment

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investigate the interlayer electronic interaction between graphene and Ge(111) substrate. Fig. 3a is the calculated morphology of a bi-crystal graphene on Ge(111) substrate after relaxation. A tilt grain boundary in zigzag-oriented graphene with a mismatch angle of 21.8° was adopted in the DFT model. As indicated by Fig. 3a, the C atoms around pentagon-heptagon (5-7) defect at the GB are closer to the Ge(111) substrate forming a valley with a depth of 0.1~0.2 Å. It is noted that the width of the GB observed in experiment was larger than that adopted in the DFT calculations. This possibly results from two reasons: real GBs may have more complex structures compared to the idealized five-seven ring GB adopted in the calculations20,

23, 29, 30

; and the GB width observed in experiment was a

convolution of the real feature and the finite contact size31, 32. This sink-in behavior at the GB is closely related to the interaction between graphene and Ge substrate; and this sink-in configuration results in a more significant electronic charge transfer between the C atoms and Ge substrate, as indicated by Fig. 3b and 3c. The variation of the charge transfer noted by the black dashed line in Fig. 3b coincides with the local density of states (LDOS) of the carbon atoms at the Fermi level averaged over the grain and boundary regions. The charge transfer and the LDOS at the GB are notably higher than those inside the grain as shown in Fig. 3c (more details can be found in Fig. S7 and Fig. S8), which contributes beneficially to the interfacial electrical transport33. The modulation of morphology and the interfacial charge transfer due to the moiré superlattice structure was also examined by DFT calculations, as shown in Fig. 3d and 3e. The interfacial charge transfer between graphene and Ge(111) is enhanced in the domain wall region (Fig. 3e), where the C atoms of graphene are locally aligned on top of Ge atoms of the 11 ACS Paragon Plus Environment

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underlying substrate. However, in the domain region (Fig. 3e), the local hump structure of graphene leads to larger C-Ge interatomic separation and thereby weaker electronic charge transfer. The charge transfer and the LDOS at the Fermi level in the three typical regions (DW A, domain and DW B) are shown in Fig. 3f (calculation details can be found in Fig. S9). Similarly, the locally-averaged value of Fermi LDOS in the domain wall is found to be higher than that in the domain region due to the stronger electronic charge transfer, as shown in Fig. 3f. Because moiré superstructures with a longer period generally result in stronger interfacial charge transfer in the domain wall region34, they are expected to exhibit a more pronounced modulation effect as well as higher averaged value of Fermi LDOS. We want to note that, although LDOS is affected by the interfacial charge transfer, the influence is complicated and a quantitative correlation is sometimes subtle. For example, the contrast in LDOS shown by Fig. 3f is not as significant as that in charge transfer between domain wall and domain regions, but they do show a qualitatively similar variation trend.


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Figure 4. Mechanism for tailoring the electronic transport performance at the interface. (a) Schematic of electronic transmission enhancement at the grain boundary. (b) Transmission eigenstates distribution between graphene and Ge(111) substrate at the grain boundary and inside the grain. (c) Transmission spectrums at the grain boundary and inside the grain. (d) Schematic of electronic transmission enhancement at the domain wall of the moiré superlattice. (e) Transmission eigenstates distribution between graphene and Ge(111) substrate at the domain wall and the domain. (f) Transmission spectrums at the domain wall and the domain.

The above DFT simulations have demonstrated that the enhanced interfacial charge transfer correlates with the increased Fermi LDOS at the graphene GBs and the domain wall zone of moiré superlattice structure. To further validate the relationship between the interfacial electrical conductance and the interfacial charge transfer, we carried out electronic transport calculations via non-equilibrium Green's function (NEGF) approach combined with DFT. In order to better resolve the subtle changes in electrical conductance at different locations, sharp platinum electrodes with an apex of one atom was adopted as in previous studies35, 36. 13 ACS Paragon Plus Environment

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The electrodes are placed on top and bottom sides of the graphene/Ge(111) structure at the GB and inside the grain to study the transport behavior across the interface (see Fig. 4a), mimicking the c-AFM experiment. As shown in Fig. 4b, the transmission eigenstates distribution confirms that the states which attempt to travel across the Gr/Ge interface possess higher transmission probability at the grain boundary than those inside the grain. Moreover, the transmission eigenstates of the grain boundary exhibit a continuous orbital at the graphene/Ge interface, which signifies a low transmission barrier and high conductance37, consistent with the transmission spectrums38 shown in Fig. 4c. Similar calculations were performed when we put the electrodes at the domain wall and the domain of moiré superlattice (see Fig. 4d and 4e). Again, the transmission eigenstates plot (Fig. 4e) and transmission spectrums (Fig. 4f) both imply that higher electrical conductance is achieved at the domain wall zone than at the domain region. The electrical transport simulation is consistent with the electronic structure calculation, confirming that the electrical conductance of the graphene/Ge interface is indeed largely determined by the local state of electronic charge transfer, which essentially depends on the local atomic-scale stacking or configuration of the interface. In conclusion, using graphene/Ge(111) heterostructure as an example system, we have demonstrated, for the first time, that the charge injection behavior for widely-existing physisorbed 2D interfaces is essentially determined by the interfacial charge transfer. More importantly, our lattice-resolved conductivity mapping and first-principles calculations clearly demonstrate that the electronic charge transfer can be fine-tuned by the topological defects or atomic stacking of the 2D material with respect to the substrate. Since diverse 14 ACS Paragon Plus Environment

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topological arrangements can be rationally designed as outlined by a general framework based on dislocation theory39, our finding offers a new and clear strategy of optimizing the electrical contact performances via adjusting the atomic-scale configurations of 2D interfaces. Meanwhile, it also suggests an easy and sensitive means of sensing subtle interactions along 2D interfaces.

Materials and Methods Sample preparation. P-type Ge(111) (175 µm thick, AXT) substrates with resistivity of 0.01~0.05 Ohm·cm were used in the experiments. The graphene film was synthesized by chemical vapor deposition (CVD) in a horizontal tube furnace with H2: CH4: Ar=0.73: 23: 230 sccm at the growth temperature of 916 oC for 300 min. Then, the samples were cooled down to 300 oC with H2: Ar= 23: 230 sccm with a cooling rate of 3 oC/min. Wrinkles of graphene can be avoided with a slow cooling rate. Finally, the samples were cooled down to room temperature naturally also with H2: Ar= 23: 230 sccm. Sample measurements. Asylum Research Cypher atom force microscope (AFM) was employed to perform the electronic properties, topography, friction measurements with conductive probes coated with Ti/Ir (ASYELEC-01, Asylum Research) under ORCA mode in ambient conditions (20~25℃, relative humidity 20 to 30%). Silicon probes coated with nitrogen doped diamond (DCP 10, NT-MDT) were also adopted to perform the electronic measurements as shown in Fig. S5. The I-V curves were obtained by applying varied bias voltage at a constant normal force at different locations. Scanning tunneling microscope measurements were carried out by NT-MDT AFM with platinum-iridium (Pt-Ir) probes under 15 ACS Paragon Plus Environment

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constant-current mode in ambient conditions. During the STM measurements, the feedback gain factor was maintain at a small value to avoid signal noise and the voltage between tip and sample was 100 mV. First-principles calculations. DFT calculations were carried out in the Vienna ab initio Simulation Package (VASP)40 and Atomistix ToolKit (ATK)41. The structural relaxation, differential charge density calculation and local density of state (DOS) calculation were conducted in VASP. The projector-augmented-wave (PAW) method42 was utilized to model the core electrons. A non-local optB86b-vdW exchange-correlation functional43, 44 was used to describe the dispersion interaction approximately, and it has been demonstrated to be among the most accurate vdW functional45. The plane wave basis kinetic energy cut off was set to 400 eV. The calculation supercell contains three-layer Ge(111) atoms and monolayer graphene with a vacuum gap of more than 19 Å. For bi-crystal graphene model, two grains with two grain boundaries considered in the simulation supercell with periodic boundary condition as shown in Fig. 3a. The tilted angle of two graphene grains orientation was α = 21.8°. The grain boundary consists of repeating five- and seven-membered ring pairs (pentagon-heptagon (5-7) defect) that are separated by hexagonal rings46, 47. The chosen grain boundary is a typical configuration widely adopted in previous DFT and molecular dynamics calculations when studying graphene grain boundaries46,

47

. Selection of this particular

configuration is also based on the consideration of our limited DFT computational resource. For the moiré superlattice simulation, the rotation angle between graphene and Ge(111) substrate were selected as 2.2° with a corresponding period of 3.2 nm, as shown in Fig. 3d, which is closer to the moiré pattern with a short period in experiments. The graphene and top 16 ACS Paragon Plus Environment

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Ge(111) layer were allowed to relax until the forces on all the relaxed atoms were less than 0.02 eV/Å. All the calculations were done using experimental Ge lattice constant (a=5.6575 Å) and graphene lattice constant (a=2.46 Å). The calculations of transmission eigenstates and transmission spectrums were carried out in ATK.

The

PAW

pseudopotential

type,

General

Gradient

Approximate

(GGA)

exchange-correlation functional, double zeta plus polarized pseudoatomic basis sets and a real space mesh cutoff of 75 Ha were utilized in the electronic transport calculations. The apex atom in the electrodes were all on top of the surface atoms and maintained at a distance of 3 Å from the surface atoms to eliminate the possible changes of contact resistance between electrodes and surfaces due to changes in inter-atomic distance. The transmission spectrums were calculated to study the transport properties at low bias according to Landauer formula. ASSOCIATED CONTENT Supporting Information. c-AFM characterization with various scan sizes, STM characterization, current and topography characterization of the GBs under different biases and normal loads, c-AFM characterization under different conditions, calculation of the periods of the two moiré patterns, calculation of the electronic DOS inside the grain and at the GB, orbitals overlap inside the grain and at the GB revealed by partial density of state calculations and methods to characterize the interfacial charge transfer and electronic DOS in the domain and the domain wall region.


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AUTHOR INFORMATION Corresponding Author *[email protected]. *[email protected]. Notes The authors declare no competing financial interest. Author Contributions ‡S.Z. and L.G. contributed equally to this work. Q.L. and T.M. conceived the project. S.Z. performed the c-AFM and STM experiments. L.G. and A.S carried out the first-principles calculations. X.Z. and Z.D. prepared the samples. S.Z., L.G., A.S., T.M. and Q.L. wrote the paper. All authors analyzed and discussed the results and approved the manuscript. ACKNOWLEDGMENT We acknowledge the financial support from the National Key Research and Development Program of China (No. 2017YFB0702100), National Natural Science Foundation of China under Grant (No. 11772169, 11432008 and 51527901), the National Basic Research Program of China (2015CB351903). Program of Shanghai Academic/Technology Research Leader (16XD1404200). Computations were carried out on the “Explorer 100” cluster system of Tsinghua National Laboratory for Information Science and Technology.

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Tuning Local Electrical Conductivity via Fine Atomic Scale Structures

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