Ultrathin BaTiO3-Based Ferroelectric Tunnel Junctions through

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Letter pubs.acs.org/NanoLett

Ultrathin BaTiO3‑Based Ferroelectric Tunnel Junctions through Interface Engineering Changjian Li,†,‡ Lisen Huang,§ Tao Li,∥ Weiming Lü,*,† Xuepeng Qiu,⊥ Zhen Huang,† Zhiqi Liu,† Shengwei Zeng,† Rui Guo,†,§ Yongliang Zhao,† Kaiyang Zeng,∥ Michael Coey,†,¶ Jingsheng Chen,§ Ariando,†, ∇ and T. Venkatesan*,†,‡,⊥, ∇ †

NUSNNI-Nanocore, National University of Singapore, Singapore 117411, Singapore National University of Singapore Graduate School for Integrative Sciences and Engineering (NGS), 28 Medical Drive, Singapore 117456, Singapore § Department of Material Science & Engineering, National University of Singapore, Singapore 117575, Singapore ∥ Department of Mechanical Engineering, National University of Singapore, Singapore 117575, Singapore ⊥ Department of Electrical and Computer Engineering, National University of Singapore, Singapore 117576, Singapore ¶ School of Physics, Trinity College, Dublin 2, Ireland ∇ Department of Physics, National University of Singapore, Singapore 117571, Singapore ‡

S Supporting Information *

ABSTRACT: The ability to change states using voltage in ferroelectric tunnel junctions (FTJs) offers a route for lowering the switching energy of memories. Enhanced tunneling electroresistance in FTJ can be achieved by asymmetric electrodes or introducing metal− insulator transition interlayers. However, a fundamental understanding of the role of each interface in a FTJ is lacking and compatibility with integrated circuits has not been explored adequately. Here, we report an incisive study of FTJ performance with varying asymmetry of the electrode/ferroelectric interfaces. Surprisingly high TER (∼400%) can be achieved at BaTiO3 layer thicknesses down to two unit cells (∼0.8 nm). Further our results prove that band offsets at each interface in the FTJs control the TER ratio. It is found that the off state resistance (ROff) increases much more rapidly with the number of interfaces compared to the on state resistance (ROn). These results are promising for future low energy memories. KEYWORDS: ferroelectric tunnel junctions, BaTiO3, oxide interface, interface engineering

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demonstrated by experimental reports, 19 increasing the asymmetry of the charge screening electrodes is effective in boosting the TER ratio. Later, Yin et al.20 reported that insertion of the metal−insulator transition manganite La0.5Ca0.5MnO3 in a La0.7Sr0.3MnO3/BaTiO3/La0.5Ca0.5MnO3/ La0.7Sr0.3MnO3 junction leads to about two orders of magnitude of enhancement of the TER ratio; the same argument was used by Jiang et al.21 Despite so many exciting reports, a fundamental understanding of the rationale for improving the performances of FTJs for memory is still lacking. Furthermore, factors that are crucial for practical memory applications in integrated circuits other than the TER ratio, such as resistance area product (RA), data retention, and device fatigue, have not been studied adequately. Hence, we have carried out an incisive study on FTJs with different device structures by manipulating the interfaces in order to elucidate the role of the band offset at

n modern electronic devices, 25−55% of the energy is consumed by memory. Current magnetic memories are switched by spin-transfer torque where high current density is required. Voltage controlled memory switching is a highly desirable alternative. Ferroelectric tunnel junctions (FTJs) have been a subject of intensive research in recent years1−6 after the demonstration7,8 of tunnel electroresistance (TER) directly correlated with the switching of ferroelectric polarization. Currently, there are two major directions for FTJ research. The first focus is on incorporating a ferroelectric tunnel barrier into conventional magnetic tunnel junctions (MTJs) to build fourstate memory devices. Possible interactions between the ferromagnetic electrode and the ferroelectric spacer are also being studied.9−11 Tunneling magnetoresistance (TMR) controlled by ferroelectric polarization has been reported by Pantel et al.12 and Garcia et al.,13 and four-state memory has been demonstrated using a multiferroic (BiFeO 3 , La0.1Bi0.9MnO3)14−16 or ferroeletric [(Ba,Sr)TiO3]17 layer as tunnel barrier. The other focus is mainly on enhancing the TER ratio of FTJs. As predicted by theoretical calculation18 and © XXXX American Chemical Society

Received: January 13, 2015 Revised: March 16, 2015

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Figure 1. Device Structures and Ferroelectric thin film properties. (a) Schematic diagram of all three types of FTJs. (b) AFM image of the 7 uc BTO thin film showing atomic terraces. (c) PFM phase contrast image of 7 uc BTO thin films with poling voltage: the bright area is poled by 5 V and the dark area by −5 V. (d) High resolution TEM image of cross section of the all oxide FTJ of Pt/La0.67Sr0.33MnO3/L0.5S0.5MO/BTO/NSTO without Pt layer.

trode modifier and the top Pt layer are 7 uc, 6 uc, 20 nm, and 50 nm, respectively, unless otherwise stated. Atomic terraces were measured by atomic force microscopy (AFM) on 7 uc BTO film as shown in Figure 1b. The ∼180° phase difference in the piezoresponse force microscopy (PFM) image (seen in Figure 1c) of BTO films poled by ±5 V indicates the switchable polarization of 7 uc BTO thin film. Figure 1d shows the highresolution transmission electron microscope cross-section image of the most complex FTJ device (J3 − 0.5) without a Pt electrode. It shows abrupt atomic interfaces in the different layers and hence demonstrates coherent growth of all oxide layers with controlled thicknesses (Supporting Information Figure S1). Memory and switching properties are exhibited by all structured FTJ devices. Figure 2 summarizes the major switching characteristics of J3 − 0.5 at 10 K. Figure 2a shows hysteresis loop of the tunneling resistance versus the writing voltage (R−V loop) across the junction at 10 K, which mimics the polarization-electric field hysteresis loop with a TER ratio of ∼103. It shows a coercivity of ∼1.5 V which is predominantly determined by the coercivity of BTO itself. As shown in the insets of Figure 2a, when the polarization is pointing up, electrons accumulate in L0.5S0.5MO to balance the bound

each interface. Further, the effects of device size and ferroelectric layer BaTiO3 (BTO) thickness were investigated to address RA for FTJs. An important result is that high TER (∼400%) can be observed in just 2 uc (0.8 nm) BTO barrier FTJs, lower than the theoretical limit of ferroelectricity in perovskite thin films at room temperature.22−25 However, a multilayer stack of BTO/SrTiO3 with a single unit cell of BTO has been shown to exhibit ferroelectricity via Raman study of the soft phonon modes.26 FTJs with Pt/BTO/Nb:SrTiO3 (J1), with insertion of thin intermediate layer, Pt/La1−xSrxMnO3/BTO/Nb:SrTiO3 (J2 − x) and with additional modified electrodes Pt/ La0.67Sr0.33MnO3/La1−xSrxMnO3/BTO/Nb:SrTiO3 (J3 − x) with Sr concentration x ranging from 0.2 to 0.7, were fabricated by pulsed laser deposition (PLD) on (001) oriented Nb:SrTiO3 (NSTO, 0.5 wt % Nb doping) with the top Pt electrode patterned by photolithography (area 100 × 100 μm2 unless otherwise stated). Detailed sample fabrication and measurement information are found in the methods section in Supporting Information. Figure 1a shows a schematic diagram of the three types of FTJ structures. Thicknesses of the BTO, the La1−xSrxMnO3 (L1−xSxMO) (x = 0.2, 0.33, 0.5, 0.7) intermediate layer, the La0.67Sr0.33MnO3 (L0.67S0.33MO) elecB

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Figure 2. Device performance of a FTJ with structure of Pt/ L0.67S0.33MO/L0.5S0.5MO/BTO/NSTO at 10 K. (a) Resistance voltage hysteresis loop of FTJ. Inset of (a), the schematic representation of charge distribution of the on and off states with respect to the polarization direction, Pt and L0.67S0.33MO layers are not shown for clarity. (b) On/Off writing and reading cycles up to 500 cycles. (c) data retention of FTJs up to 6000 s.

Figure 3. Performance at 10 K of FTJs with different structures. (a) Resistance voltage hysteresis loops for FTJ structures of Pt/BTO/ NSTO, Pt/L 0.3 S 0.7 MO/BTO/NSTO, and Pt/L 0.67 S 0.33 MO/ L0.3S0.7MO/BTO/NSTO. (b) Saturation and coercive voltages of all three types of FTJs with 7 uc BTO. In J2 and J3 FTJs, Sr concentration (x = 0.2, 0.33, 0.5 and 0.7) in intermediate L1−xSxMO does not affect both voltages. (c) ROn and ROff of FTJs of Pt/BTO/ NSTO (J1), Pt/L1−xSxMO (Sr = 0.2, 0.33, 0.5, and 0.7)/BTO/NSTO (J2) and Pt/La0.67Sr0.33MnO3/L1−xSxMO (Sr = 0.2, 0.33, 0.5 and 0.7) /BTO/NSTO (J3). R on and R off show dependence on Sr concentration in J2 and J3.

charge adjacent to BTO interface while holes accumulate on the NSTO side, leading to a higher resistive state, the off-state. For the on-state, holes accumulate at L0.5S0.5MO and electrons accumulate in NSTO after reversal of the BTO polarization. Cyclic testing and data retention properties are shown in Figure 2b−d. No obvious degradation on the device TER ratio was seen in a test of up to 500 write/read cycles. The TER ratio and the ROn and ROff differ a lot in various structured FTJs. The device reproducibility gets better with increasing BTO thickness but even for 2 uc devices, it is better than 50% (see Supporting Information Figures S4−S6). R−V loops of J1, J2 − 0.7 and J3 − 0.7 (Figure 3a) demonstrate that the TER ratio is improved significantly with the insertion of the intermediate layer of L0.3S0.7MO and the electrode modifier layer of L0.67S0.33MO. Although TER ratios improve significantly, the basic switching properties remain unaltered. As shown in Figure 3b, saturation and coercive voltages of all FTJs are 1.8 and 1.5 V, respectively. Hence, the primary switching in FTJs is completely dominated by the BTO layer and is unaffected by the intermediate or electrode layers. Almost the entire voltage drop is across the BTO. Further, by comparing the R−V loop of the FTJs with the phase-bias loop of the BTO layer from PFM (see Supporting Information section 2 and Figure S2), it can be concluded that FTJs resistance switching properties are direct results of ferroelectric switching of the BTO layer. In Figure 3c, ROn and ROff are summarized for three different types of FTJs, including the Sr concentration effect in the intermediate layer. With addition of an intermediate layer, both ROn and ROff increase; however, the ROff increases more. As a

result, the TER ratio increases by about 1 order of magnitude. With introduction of the additional L0.67S0.33MO layer, the TER ratio is enhanced by another order of magnitude. In summary, the more layers that are integrated in the FTJ, the higher the TER ratio. In J2 − x, even though ROn and ROff depend exponentially on the Sr concentration, their increase is small when compared to the effect of increasing the number of interfaces. The same Sr concentration dependence trend applies for J3 − x. One exception is J3 − 0.33, where L1−xSxMO/L0.67S0.33MO the interface creates a homojunction, thereby the TER ratio is much smaller than that of x = 0.2, 0.5, and 0.7. To understand the different performances among FTJs, the I−V of all FTJs are fitted by theoretical tunnel currents across a trapezoidal barrier potential profile.8 J3 I−V curves can be fitted by the Brinkerman model with asymmetrical tunnel barriers: fitted barrier height and width have been tabulated in Supporting Information (see Supporting Information Figures S7, S8 and Table T1). The fitted barrier heights show that the barrier shape asymmetry increases monotonically when Sr deviates from x = 0.33. It has been shown that the chemical potential (Fermi level) of L1−xSxMO is monotonically dependent on Sr concentration.27 The correlation between the barrier asymmeC

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Figure 4. Electrode size and ferroelectric layer thickness on Pt/BTO/NSTO (J1 − t) structured FTJ performance at T = 300 K. (a) optical image on the FTJ with defined top electrode size and schematic image of the cross section of a FTJ device. (b) J1 − 7 shows normal switching properties but not in J1 − 2 at a fix electrode size of d = 50 μm and FTJ with 2 uc BTO shows normal switching behavior with electrode size of d = 5 μm but not with electrode size of 50 μm. (c) On and off state resistance of FTJ with BTO thickness ranged from 2 to 7 uc with diefferent electrode sizes. (d) TER ratio of FTJs with 1, 2, and 3 uc BTO thickness dependence on the electrode size ranged from d = 5 to 50 μm. (e) On state RA value dependence on the BTO thickness for all functional FTJs. (f) Weak temperature dependence of TER ratio are observed in J1 − 2 and J1 − 3.

matching the impedance of the transistor, which is typically the order of kilohms. To achieve a lower RonA value, it will be necessary to not only reduce the BTO thickness but also the thickness of the oxide electrodes in the device. Figure 4a shows the optical and schematic image of J1 with top electrode area defined by AlN assisted photolithography. The devices have different BTO thickness (J1 − t) where t ranges from 1 to 7 uc and the square top electrode length d is 5, 10, 20, or 50 μm. For the 50 μm electrode, J1 − 7 shows a good R−V loop at room temperature, but J1 − 2 does not. However, when d is reduced from 50 to 5 μm, the R−V loop at room temperature is restored for J1 − 2 (Figure 4b). This effect can be attributed to a lower probability of finding a defect center in an FTJ with a smaller size. The less rectangular R−V loop in J1 − 2 compared to J1 − 7 is most likely due to the fact that 2 uc is very close to the intrinsic limit for stable ferroelectricity in BTO24,25 at room temperature. J1 − 2 showing similar R−V loop to that of J1 − 7 strongly support that our 2 uc BTO is ferroelectric at room temperature, which excludes other possible effects showing the R−V loop. To the best of our knowledge, this is the first report on 2 uc BTO with large TER (∼400%) FTJs. J1 − 1 showed no switching behavior down to

try with Sr concentration provides strong evidence that band offsets at the interfaces within the tunnel junctions are the crucial parameter. For J1 and J2 devices (except J2 − 0.7), I−V curves show almost Ohmic transport properties under a small bias (see Supporting Information Figure S9), which is the result of a trapezoidal barrier potential approaching to a rectangular barrier potential. The lower asymmetry in barrier potential shape in J1 and J2 is consistent with the observed smaller TER ratio. From comparison of characteristics between different structured FTJs, TER ratio increases significantly with insertion of additional layers in the devices. This is a good way to improve TER ratio of FTJs. However, from a practical point of view, the TER ratio required depends upon its statistical variation in the device performance. For example, a commercial MTJ device only shows TMR of about 100%. On the other hand, the resistance area product (RA) is extremely important for integration with CMOS electronics in a 1 transistor−1 FTJ memory cell. Insertion of additional layers increases the TER ratio at the expense of increased ROnA. The value of ROnA of the simplest FTJ, J1, is 5 MΩ μm2 (for a 7uc BTO FTJ), which is already much larger than the value of 10 Ω μm2 required for D

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Nano Letters an electrode size of 5 μm; studies of smaller device dimensions and direct ferroelectricity measurement on 1 uc BTO films are being pursued. ROn and ROff of J1 − t with t = 2, 3, 5, and 7 are shown in Figure 4c. The dependence of ROn and ROff on BTO thickness can be fitted to R(On/Off) = R0(On/Off)exp(α(On/Off)t), where R0(On/Off) is the prefactor and α(On/Off) is the coefficient that is determined by the barrier height. When the ROn curve intersects with the fitted ROff curve, it defines the lower bound of BTO thickness for a fixed electrode size. Figure 4c and d effectively map out the functional BTO FTJ in terms of BTO thickness and device size for our processing conditions. ROn for FTJ with a certain BTO thickness scales inversely with the junction area, so ROnA primarily depends on BTO thickness and the resistance of the bottom electrode. ROnA values of all functional FTJs shows an exponential dependence on the BTO thickness (Figure 4e). TER ratio of J1 − t decreases slightly with increasing temperature (shown in Figure 4f), which is rather different from that of J2 and J3 (shown in Supporting Information Figure S3). A large TER (∼400%) value is maintained at room temperature in J1 − 2 devices. The weak temperature dependence along with the exponential relationship indicates that direct tunneling is the primary conduction mechanism. A lower bound of on state RA value of 100 kΩ μm2 is obtained in J1 − 2 with TER ratio of 400%. Compared to a CoFeB/MgO/CoFeB MTJ with a 1 nm MgO barrier, the TER ratio is better than the TMR ratio, but the RA value is much worse (10 Ω μm2 for MTJ device). The problem lies in the conductivity of the bottom electrode. The NSTO resistivity is 3 orders of magnitude larger than that of CoFeB (5 × 10−2 versus 5 × 10−5 Ω cm). For further device improvement, more conductive electrodes will be needed to lower the RA. However, the large TER realized in these devices utilizes the band bending created at the bottom semiconducting electrode interface. By increasing the metallicity of this electrode, we are likely to sacrifice the TER. Ultimately a compromise will have to be reached. In conclusion, introduction of additional heterojunctions in a FTJ is a reliable way to improve the TER ratio and control ROn and ROff of the FTJ without changing its primary switching properties. The effect is attributed to the band offset at the heterojunctions within a FTJ device, which changes the barrier width and height for the electron tunneling process. The achievement of TER of 400% at room temperature in FTJs with a BTO barrier, which is only 2 uc (0.8 nm thick) points the way for practical ferroelectric tunnel junctions which can be competitive with magnetic tunnel junctions, provided the bottom electrode resistance problem can be resolved.



Author Contributions

The manuscript was written through contributions of all authors. All authors have given approval to the final version of the manuscript. Notes

The authors declare no competing financial interest.



ACKNOWLEDGMENTS This work is supported by the Singapore National Research Foundation (NRF) under the Competitive Research Programs (CRP) “Tailoring Oxide Electronics by Atomic Control” (CRP Award No.NRF2008NRF-CRP002-024) and “New Approach to Low Power Information Storage: Electric-Field Controlled Magnetic Memories” (CRP Award No. NRF-CRP10-2012-02). We would like to acknowledge Prof. Qi Li for insightful discussions.



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S Supporting Information *

Detailed methods and additional data are included. This material is available free of charge via the Internet at http:// pubs.acs.org.



REFERENCES

AUTHOR INFORMATION

Corresponding Authors

*E-mail: [email protected] (W.L.). *E-mail: [email protected] (T.V.). E

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