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Realizing Large-Scale, Electronic-Grade TwoDimensional Semiconductors Yu-Chuan Lin,†,▽ Bhakti Jariwala,†,▽ Brian M. Bersch,† Ke Xu,‡ Yifan Nie,§ Baoming Wang,∥ Sarah M. Eichfeld,† Xiaotian Zhang,† Tanushree H. Choudhury,⊥ Yi Pan,# Rafik Addou,§ Christopher M. Smyth,§ Jun Li,∇ Kehao Zhang,† M. Aman Haque,∥ Stefan Fölsch,# Randall M. Feenstra,∇ Robert M. Wallace,§ Kyeongjae Cho,§ Susan K. Fullerton-Shirey,‡,▼ Joan M. Redwing,†,⊥ and Joshua A. Robinson*,†,⊥ †
Department of Materials Science and Engineering, Materials Research Institute, and Center for 2D and Layered Materials (2DLM), The Pennsylvania State University, University Park, Pennsylvania 16802, United States ‡ Department of Chemical and Petroleum Engineering, University of Pittsburgh, Pittsburgh, Pennsylvania 15213, United States § Department of Materials Science and Engineering, The University of Texas at Dallas, Richardson, Texas 75080, United States ∥ Department of Mechanical Engineering, The Pennsylvania State University, University Park, Pennsylvania 16802, United States ⊥ Two-Dimensional Crystal Consortium (2DCC), The Pennsylvania State University, University Park, Pennsylvania 16802, United States # Paul-Drude-Institut für Festkörperelektronik, Hausvogteiplatz 5-7, Berlin 10117, Germany ∇ Department of Physics, Carnegie Mellon University, Pittsburgh, Pennsylvania 15213, United States ▼ Department of Electrical and Computer Engineering, University of Pittsburgh, Pittsburgh, Pennsylvania 15213, United States S Supporting Information *
ABSTRACT: Atomically thin transition metal dichalcogenides (TMDs) are of interest for next-generation electronics and optoelectronics. Here, we demonstrate device-ready synthetic tungsten diselenide (WSe2) via metal−organic chemical vapor deposition and provide key insights into the phenomena that control the properties of large-area, epitaxial TMDs. When epitaxy is achieved, the sapphire surface reconstructs, leading to strong 2D/3D (i.e., TMD/ substrate) interactions that impact carrier transport. Furthermore, we demonstrate that substrate step edges are a major source of carrier doping and scattering. Even with 2D/3D coupling, transistors utilizing transfer-free epitaxial WSe2/sapphire exhibit ambipolar behavior with excellent on/off ratios (∼107), high current density (1−10 μA·μm−1), and good field-effect transistor mobility (∼30 cm2·V−1·s−1) at room temperature. This work establishes that realization of electronic-grade epitaxial TMDs must consider the impact of the TMD precursors, substrate, and the 2D/3D interface as leading factors in electronic performance. KEYWORDS: two-dimensional materials, transition metal dichalcogenides, tungsten diselenide (WSe2), metal−organic chemical vapor deposition (MOCVD), van der Waals epitaxy, field-effect transistors WOx thin films predeposited on arbitrary substrates,4,5 molecular beam epitaxy (MBE),9,10 and metal-organic chemical vapor deposition (MOCVD).11 Among these options, owing to the ease of preparation and setup, PV using WO3 and Se powders has been widely adapted to produce large WSe2 domains with edge length between 1 and 100 μm on both crystalline and noncrystalline substrates.8,12,13 Although the PV
T
wo-dimensional (2D) semiconducting transition metal dichalcogenides (TMDs) exhibit a broad spectrum of properties attractive to the electronics industry.1,2 Additionally, in their ideal monolayer form, with inherently dangling bond-free surfaces, they enable atomic-level scaling and excellent electrostatic gate control. The properties that exist only in mono- or few-layer TMDs have driven extensive synthesis efforts of large-area, atomically thin TMDs, such as tungsten diselenide (WSe2), by a variety of thin film deposition techniques.3−11 Including powder vaporization (PV; often termed chemical vapor deposition),7,8,12 selenization of W/ © XXXX American Chemical Society
Received: October 5, 2017 Accepted: January 9, 2018
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Figure 1. (a) Utilizing MOCVD precursors in a cold-wall reactor enables large-area WSe2 films uniformly deposited on sapphire. (b) The choice of Se source for WSe2 synthesis leads to different WSe2 morphology on sapphire. The samples were grown at 800 °C and at 700 Torr in pure H2. (c) Binding energy of carbon measured in the XPS measurement found more carbon incorporated in WSe2 grown with DMSe as Se source. (d) Elemental impurities detected in WSe2 films using both H2Se and DMSe measured by LA-ICPMS.
surface dominates the measured surface topography (also see Figure S1 in Supporting Information). This is in sharp contrast to DMSe, in which the WSe2 domains do not coalesce and a high density of Se-deficient WSe2 particles11 form on the surface and at their domain edges (Figure 1b). Additionally, use of DMSe leads to the deposition of significant levels of carbon, as confirmed by X-ray photoelectron spectroscopy (XPS) (Figure 1c), due to the DMSe methyl groups dissociating during the growth. After switching to a “carbon-free” chalcogenide precursor, H2Se, the C-peak intensity is reduced by ∼2−3× to below that of even the as-received substrate, and stoichiometric WSe2 is achieved. Furthermore, laser ablation inductively coupled plasma mass spectrometry (LA-ICPMS)5 indicates that films grown with DMSe exhibit an additional 22 impurities undetectable via XPS (Figure 1d), but in quantities high enough to impact the electronic properties of the WSe2 films. On the other hand, use of the H2Se leads to significant reduction of impurity elements, with the elimination of Sb, As, Cr, Ga, Mn, Ni, Nb, Th, Sn, Y, and Zr and reduction in Fe, Ba, Na, Mg, Mo, Co, Ta, Zn, Pb, Cu, and Au concentrations to less than 1013/cm2 (Figure 1d). The presence of excessive carbon and elemental impurities from DMSe precludes the lateral growth and coalescence of WSe2, as evident by their corresponding AFM images in Figure 1b. While changing only the Se precursor leads to the removal of 11 impurities in the WSe2 without changing anything else in the process or system, there still exists 11 impurities in both DMSe and H2Se, which likely comes from the same environment they share, such as the quartz tube used in the chamber, the gas pipelines upstream of the chamber, and the same W(CO)6 source (99.99% purity). However, most are suppressed by switching to H2Se (Figures 1 and S2a). The heating process used in the reactor may lead to release the constituent elements of both of stainless-steel and quartz tubing during the growth. In another separate experiment, a stainless steel heater was placed upstream of the chamber and performed WSe2 growths with H2Se on EG/SiC to compare the results in ICMS (Figure S2b). When the stainless steel heater is in place, a surge in Fe, Cu, Ni, and Mo impurities is detected. Similarly, the presence of the extra heater leads to increased heating of the quartz tubing and increased Na and Al impurities are also identified. Importantly, XPS does not detect
process provides the scientific community the fastest and most convenient route for obtaining materials for proof-of-concept demonstrations, its limited scalability and lack of precursor control precludes it from large-area commercial applications. Perhaps the most promising is MOCVD, as evidenced by the availability of wafer-scale films.11,14 To date, MOCVD processes for WSe2 typically utilize carbon-containing MO precursors, such as (CH3)2Se or (C2H5)2Se.11,15 However, such precursors can lead to particulate accumulation on the surface11 and carbon at the substrate/WSe2 interface.16,17 Additionally, the use of alkali metal halide salts, such as NaCl, is increasing in popularity due to increased domain size, but this results in high levels of Na impurities and a loss of epitaxy in the as-grown films.14,18 The work presented here demonstrates >50% reduction in elemental impurities compared to previous reports by utilizing hydrogen selenide (H2Se) and tungsten hexacarbonyl (W(CO)6) precursors to synthesize large-scale, coalesced, epitaxial WSe2 on sapphire (Al2O3) substrates. We provide the foundational understanding that will enable deviceready synthetic 2D semiconductors, and present a comprehensive investigation how their properties are dominated by the substrate and 2D/3D interface.
RESULTS AND DISCUSSION Impact of Precursor Purity. The precursor purity can strongly influence the impurities found in WSe2. To test this theory, films are deposited using two different chalcogenide precursors, hydrogen selenide (H2Se, 99.99% purity) and dimethyl selenium (DMSe, 99.999% purity) as Se source, while keeping the metal precursor as tungsten hexacarbonyl (W(CO)6) as W source. The precursors are introduced separately into a cold wall vertical reactor chamber and their respective flow rates controlled via mass flow controllers (Figure 1a). The growths were carried out in the same reactor, with a removable liner tube that is cleaned with nitric acid and subsequently baked at high temperature in H2 to ensure each run is identical. Despite similar optical contrast on the sapphire surface (Figure 1a), the surface morphology of WSe2 films grown with different precursors exhibit different morphologies (Figure 1b). Utilization of H 2Se yields a clean and homogeneous morphology, where the WSe2 conformally grows over the sapphire surface as evidenced in Figure 1b, where the sapphire B
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Figure 2. (a) When the sapphire surface is not properly annealed, WSe2 grown for growth time (tG) of 30 min on “as-received” sapphire lost continuity and thickness uniformity. (b) However, annealing the sapphire prior to WSe2 growth yields continuous, conformal monolayer WSe2 shown in SEM image. (c) SEM image of a thicker WSe2 film shows bilayer and trilayer WSe2 also grew epitaxially on the bottom monolayer. (d) The epitaxial WSe2 film grown on sapphire with the same conditions shown in (b) exhibits single crystalline feature in scanned LEED patterns across the entire substrate shown in the camera image. The uniform topography in terms of coverage and thickness in AFM images captured at the corners and the center on the same substrate can be found in SI. (e−g) Representative domain boundaries (DBs) in WSe2 films grown at (e) 650 °C, (f) 700 °C, and (g) 770 °C. Large vacancies and high angle DBs can be reduced by increasing growth temperature. Above 700 °C the registry between WSe2 and sapphire was significantly improved, confirmed by the SAED patterns in inset of (f,g) and the low-magnitude STEM view of WSe2 films suspended on a 2 μm hole in inset of (e). (h) Furthermore, the defect density observed in STEM is reduced from >1 × 1014 cm−2 at 650 °C to ∼1 × 1012 cm−2 at 800 °C.
c-plane sapphire20,21 (see Figure S4a) results in an epitaxial orientation of the WSe2 domains that is either 0° or 60° relative to each domain (Figure 2b). Importantly, subsequent layers (>1L) also grow epitaxially with respect to the initial monolayer, enabling the formation of single crystal multilayer films when required (Figure 2c). The short growth times (30− 60 min) are capable of producing mono-to-trilayer films, with some island formation because it is thermodynamically favorable to form a second layer when the bottom monolayer increased to a critical size during the growth to have a more stable structure.22 Tungsten diselenide grown at 800 °C (800WSe2) exhibits sharp, hexagonal low-energy electron diffraction (LEED) patterns across the cm-size sapphire substrate (Figures 2d and S4b), confirming the epitaxial nature of the layers despite the large lattice mismatch between the sapphire and WSe2.23 Furthermore, AFM images of the surface (marked with Roman numerals I−V in Figure 2d optical image) confirms the film is highly uniform across the substrate (Figure S4c). While epitaxy is possible via the commensurability of 3 × 3 WSe2 (0001) and 2 × 2 sapphire (0001) superlattice10,20 (Figure S4a), epitaxy cannot be achieved at low substrate temperature because the corrugation of the potential energy surface and high absorption strength of adatoms precludes registry.20,24,25 This is evident from the LEED patterns of WSe2 grown at 650 °C (650WSe2) (Figure 2d), which demonstrates that when the growth temperature (TG) is not high enough, the
any of these elements, it is only when ICPMS is utilized are they found. The periodic table in Figure S2b summarizes the growth only with H2Se, with significant reduction in impurities, as compared to the periodic table summarizing the growth with DMSe in Figure S2a. It is also worthwhile to point out that the supporting substrates may also release impurities after the growth. For example, Mg, Ba, Pb, and Bi could possibly be released from sapphire due to their existence on all samples. Likewise, Bi, Ti, and V could be released from SiC, as the SiC used in this study is V-doped (Figure S2a,b). Epitaxial Growth of WSe2 on Sapphire. Substrate surface preparation is fundamentally important for achieving crystallographic alignment (epitaxy) and long-range order. Sapphire is the substrate of choice in this study because it is commercially available,19 and has a chemically robust surface compatible with the harsh environments required for TMD synthesis.20,21 The choice of sapphire, however, does not guarantee uniformity or epitaxy of the WSe2. This is evident when we find optimized growth conditions (Figure S3) lead to misoriented, isolated WSe2 domains on “as-received” c-plane sapphire, but a continuous monolayer film on “annealed” sapphire under the same growth conditions (Figure 2a,b). Annealing sapphire in air leads to the reconstruction of the surface resulting in terracing and regular atomic steps,21 and it significantly enhances the substrate surface energy, which enables enhanced nucleation and uniform WSe2 coverage.21 The 3-fold symmetry of 2H-phase TMDs and its long-range commensurability with C
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Figure 3. (a) STM image of 1L WSe2 grown on epitaxial graphene without a postgrowth anneal. (b) Defect density and nanoscale clusters on the surface of WSe2 was reduced after a postgrowth anneal (10 min) was included. (c) Five types of common defects found on WSe2 of (a): A is Se-vacancy, B is W-vacancy substituted by a Se atom, C is single W-vacancy, and D, E are impurity interstitials. The scanned area is the same as (a). (d) STS profiles of 1L and 2L WSe2 show the corresponding bandgap size. The dashed lines in (d) indicate the noise level of the two spectra. (All measurements were performed at 5 K.)
Defects in Epitaxial WSe2. Scanning tunneling microscopy (STM) performed at 5 K on 1L 800WSe2 grown on epitaxial graphene (EG) indicates five types of defects with distinct features on the WSe2 surface (Figure 3a,b). Without a postgrowth H2Se anneal, nanoparticles are also presenting on the surface (red circles in Figure 3a). The electronic and topographical features of these defects under positive and negative bias are shown in Figure S7. Analyzing each defect and checking consistency with existing work in the literature28−31 indicate the most possible defects are vacancies. Type A constitutes a selenium vacancy (Type A: VSe), and appears as a depression at 1.5 V, while it turns into a bright hexagonal at −0.5 V.28−31 Type B represent a tungsten vacancy substituted by a Se atom (Type B: SeW), and exhibits a large depression associated with three small protrusions, which is obvious between 1.6 V and −0.5 V in its center.31 Type C is a tungsten vacancy (Type C: VW), and appears hexagonal under both positive and negative tip bias. Theoretical work by Zhang et al. suggests that VSe, SeW, and VW (Types A−C) exhibit the smallest formation energy of the WSe2 defects.31 This prediction matches the defects observed in our work, as VSe is most prevalent followed by SeW and then VW. Finally, impurities or Se interstitials (Types D and E) appear not to create vacancies or form adatoms or nanoparticles on the surface. However, other studies indicate that intercalated atoms between WSe2 and the substrate, and Se substitutions by impurities, can cause local imaging contrast.28,32,33 The areal densities of the various defect types range from 2 ×1011 cm−2 to 9 × 1011 cm−2 each, and are listed in Figure S8. Importantly, a 10 min anneal in H2Se at 800 °C following growth reduces the defect density and also nearly eliminates particles on surface D
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Figure 4. When WSe2 epitaxy is achieved, STEM (a) raw image and (b) slightly filtered image indicate that the sapphire surface reconstructs to form a selenium-based passivating layer (P). DFT (c) indicates that the P consists of Al−Se that can lead to (c) energy states near the valence band edge (0 eV) of the WSe2 DOS. Furthermore, AFM (d) and KPFM (e) provide evidence that the sapphire topography induces localized modulation of the WSe2 Fermi level. AFM (f) of the original substrate indicates residual WSe2 at the sapphire step edges, and KPFM (g) on the same film following transfer exhibits a 2−4× reduction in surface potential variation. Three domains labeled “I−III” in (g) show the domains I and II align at the same direction but form a 4|4 DB with the adjacent domain III. Cross-sectional STEM confirms localized Fermi level modulations are likely the result of: (h) WSe2 bound to the step edge, (i) WSe2 layer junctions, and (j) Se-rich interlayers. WSe2 layers are marked with blue stripes.
can also be detected due to the high sensitivity of the measurement. The STS spectra of most D, E do not exhibit the mid gap states (see their representative in Figure S10). While the A−C would create mid gap states within the bandgap,30,31 the impurities that are the cause of the D, E, like Fe, Mo, and Au found in our WSe2 by LA-ICPMS, are not electrically active in WSe2, as confirmed here and also supported by the literature.28 Therefore, despite the persistent presence of the D, E impurity signatures in WSe2, they may not adversely affect the electrical transport. WSe2-Sapphire Interface. Epitaxy of WSe2 on sapphire leads to a “passivation layer” formation between the WSe2 and sapphire substrate. A cross-sectional STEM image (Figure 4a,b) shows van der Waals (vdW) gaps between the WSe2 and sapphire surface and between WSe2 layers, which are marked by the orange lines in Figure 4b. The sapphire surface also exhibits a structural transformation from that of bare sapphire, and now includes a selenium-rich layer, denoted “P” for passivation layer in Figure 4b, based on STEM and energy dispersive X-ray (EDX) mapping (Figure S11−S12). The synthesis of vdW solids on 3D substrates does not follow traditional epitaxy, in part because vdW solids do not exhibit dangling bonds like that found in 3D. In order to achieve successful vdW epitaxial growth of 2D vdW solids on ordinary 3D substrates, Koma et al. passivated the surface dangling bonds with chalcogen atoms prior to layered TMD growth (i.e., GaSe/Se-GaAs and TX2/SGaAs).23 This is also the case for TMD growth on sapphire substrates, where we hypothesize the sapphire surface must be
(Figure 3c and their AFM images in Figure S9). Type A and B vacancies are reduced by 10×, and type C vacancies are largely eliminated. On the other hand, the density of interstitial impurities (Types D and E) remains unchanged with the anneal, suggesting that these impurities are related to oxygen or Se interstitials rather than growth parameters. For example, type D is similar to that of the Se substitutions by iodine and oxygen in TiSe2 crystal and the type E is similar to absorption of impurities on the surface or insertion inside the lattice.32 Another study on WSe2/EG indicates that the local depression seen in the type D is due to the impurities intercalated in the vdW gap between WSe2 and EG.33 Similarly, type E exhibits three bright protrusions that were identified as chalcogen or impurity interstitials in an investigation focusing on the defects in synthetic MoS2 grown on EG.29 The total density of defects following the postgrowth anneal is approximately 8 × 1011 cm−2, close to the densities from MBE-grown WSe2 (2.8 × 1012 cm−2) and mechanically cleaved WSe2 crystals (1.2 × 1012 cm−2).9,28 Further investigation of the WSe2 via STS (Figure 3d) confirms that the bandgap of 1L and 2L WSe2 grown on epitaxial graphene(EG)/SiC under the same growth conditions for sapphire are 2.00 and 1.69 eV, consistent with the MBEgrown WSe2 on EG.9 The V-shaped noise level in the gap is due to the z ramping34 of the STM tip during the voltage scan. The ramping significantly increases the dynamic range of the measurement. In addition to the V shape, there is some nonzero signal in the gap region of the 1L WSe2 spectrum due to the contribution of the graphene beneath the WSe2 which E
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Figure 5. (a) Schematic and optical image (marked by the green boundary) of one WSe2 FET. The minimal separation between two identical devices is 200 μm. (b) Comparing transfer characteristics with different TG and contact metals demonstrates superior performance of the epitaxial 800WSe2. (c) Transfer characteristics of WSe2 channels parallel and perpendicular to substrate steps reveal the steps dope and scatter carriers. (d) Transfer characteristics of the transistors with the channel parallel to substrate steps made of continuous 2L and 3L WSe2 films show the performance with 5 and 10 μm channel length. (e) The layout shows the location of the 12 devices on a 1 × 1 cm2 epi-bilayer WSe2 film. Room-temperature FET performance is uniform from the center to the edge of a 1 × 1 cm2 sample when the channel is parallel to substrate steps. (f) Benchmarking state-of-the-art room-temperature device performance on synthetic WSe2 compares the performance of epitaxial WSe2 in this work. (Only Hall mobilities are available for the WSe2 grown on sapphire by MBE, while other mobilities are from room-temperature FET measurement.)
(Figure 4e). The AFM of the original growth substrate following transfer (Figure 4f) reveal residual stripes of Se-rich WSe2 along the step edges, indicating that coupling between the WSe2 and the sapphire step edge is much stronger than that found at the WSe2/sapphire (0001) interface. The impact of the steps is further verified when the WSe2 is transferred to a fresh SiO2/Si (Figure 4g), where the variability in potential is reduced by 2−4× and the “striping” has disappeared. Such modulation in the Fermi level and the presence of W/Se residue at step edges following film transfer provides direct evidence that the steps play a critical role in the growth and electronic transport of epitaxial WSe2, making it essential to understand the physical source of this Fermi level variation. Atomic steps in sapphire enable WSe2 nucleation and induce structural variation. Evident from STEM (Figure 4h,i), the first WSe2 layer appears to nucleate at the sapphire atomic step edge and subsequently grows across the adjacent step edge and over the layer nucleating at that edge, similar to step-flow growth in traditional semiconductors.35 Beyond providing a potential source for nucleation, the presence of the steps can lead to structural mixing of WSe2 (Figure 4i), that can also be accompanied by sporadic interlayers between sapphire and WSe2 (Figure 4j). Such structural bonding and mixing are correlated with the presence of a step edge, and are hypothesized to be the source of the Fermi level modulation, while the sporadic interlayers lead to circular bright spots in the surface potential map at terrace centers. Interestingly, the impact of the step edges is reduced with increasing layer thickness (see 2L versus 3L in Figure 4d,e), indicating that each
passivated with the chalcogen in order to achieve vdW epitaxy. This is true for WSe2 and is likely true for other TMDs, including sulfur-based TMDs. Density functional theory (DFT) calculations of the possible substrate surface terminations indicate that the passivating layer consists of Se chains attached to the sapphire surface (Figure 4c). The connection between the Se chain and the sapphire surface can be a direct Al−Se bond or an Al−O−Se bridge via residual oxygen atoms on the surface (Figure S13). By comparing four possible interface structures and the observed structure in STEM, the sapphire surface with Al−Se bonds (Figure S13b) is the most probable configuration among them, as Al−O−Se bonds are not stable (Figure S13c,d). The randomized orientation and length of the Se chains cause the STEM images of this layer to be blurred. The simulated layer closely matches the interface identified by STEM imaging. Despite DFT modeling, which predicts the presence of the passivation layer leads to stronger WSe2-substrate bonding (see Methods Section), the calculated electronic properties, density of states (DOS) of the WSe2, are not significantly different from pristine WSe2 (see the DOS in Figure S13a,b), as the calculated DOS shows no new energy states inside the bandgap caused by the passivating layer in Figure 4c. Substrate surface topography strongly influences the electronic properties of epitaxial WSe2. Kelvin-probe force microscopy (KPFM) of an epitaxial WSe2 film establishes that the topographic steps in the sapphire (Figure 4d) induce localized modulation in WSe2 surface potential (and hence Fermi level), creating a “striping” effect in the KPFM map F
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Substrate step edges act as doping and scattering centers in epitaxial TMDs. To determine the impact of atomic step edges, FETs are fabricated with channels parallel (FET∥) and perpendicular (FET⊥) to the step direction (Figure 5c; dark stripes in the inset SEM image). Average μFET (and SS) of 5 devices with a 10 μm-channel for FET∥ and FET⊥ are 16 ± 2 cm2/(Vs) (302 ± 50 mV/dec) and 11 ± 4 cm2/(Vs) (322 ± 16 mV/dec), respectively. However, the VT of FET⊥ is shifted positive by >1 V, and the saturation current is nearly 2× lower, indicating the steps hole-dope the WSe2 and scatter carriers at higher rates than the Se-passivated (0001) sapphire plane. Furthermore, steps also lead to variation in the WSe2 layer thicknesses (Figure 4h,i), leading to modification in the bandgap thus requiring tunneling between WSe2 layers to maintain electrical continuity. The on-current and overall device performance can be improved by growing one more epilayer (total 3L), as seen on the WSe2 transistors with 2 channel lengths (Figure 5d). For example, 3L WSe2 exhibits 20× increase in μFET (from 0.91 cm2/(Vs) (2L) to 16.07 cm2/(Vs) (3L)), 10× increase in on-current and on/off ratio for the nbranch on a 10 μm-channel. While thousands of WSe2 FETs were fabricated via standard photolithography on a single sample, it is practically challenging to measure a large number of devices due to time-consuming sweep rates (8 mV/s) needed for reliable solid polymer electrolyte gated transfer measurements (also see Methods Section). Twelve 2L WSe2 FETs (all Lch = 10 μm) across different portions of a substrate (Figure 5e, left) were measured under the same conditions in order to confirm the large-area film electrical uniformity. Importantly, the distribution of mobility, on/off ratio, and SS from devices across a 1 × 1 cm2 WSe2 substrate is highly uniform (Figure 5e, right). Furthermore, comparing μFET versus current on/off ratio of all “large-area” synthetic WSe2 films (Figure 5f and Table S2 and S3 for summary) indicates that 800 WSe2 with Pd contacts is comparable to single-crystal 2L WSe2 domains, even though the current epitaxial WSe2 exhibits smaller domains, domain boundaries, and many sapphire steps.
additional layer electronically screens the interface imperfections. Therefore, it is likely imperative to grow ≥2L to effectively realize high quality electronic transport. Confocal intensity map of the photoluminescence (PL) with a resolution of 400 nm (Figure S14a,b) does not indicate the significant influence from the substrate steps on the PL of 1L2L WSe2. The average emission spectrum is also consistent with the PL of 1L WSe2.36 The Raman spectra features of 2L WSe2 in terms of low-breathing modes between 10 and 30 cm−1 and main peak at 250 cm−1 confirmed that the second layer of WSe2 predominantly grew either 0° or 60° with respect to the bottom monolayer epitaxially at 800 °C, forming 2H (termed AA’) and 3R (termed AB) stacking,37 respectively (Figure S14c). The PL spectrum obtained at 77 K exhibits exciton, trion, and an increased peak from the defect-induced states (Figure S14d). Although the defect-introduced emission in semiconductors is difficult to prevent, their magnitude in this work seems comparable to those in exfoliated 1L WSe2.36 Electronic Transport of Epitaxial WSe2. Electrolytegated WSe2 field effect transistors (FETs) (Figure 5a and S15a) indicate that growth temperature and substrate dominate the electronic performance.38−40 Transistors are evaluated for on/ off ratio, subthreshold slope (SS), FET mobility (μFET), and threshold voltage (VT). Palladium (Pd) and nickel (Ni) contacts were both tested on identical bilayer WSe2 films grown at 800 °C because Pd is a good hole-injector for WSe2,41 and both metals can yield ambipolar behavior with mono to few layer WSe2.6,42 Prior to electrolyte deposition, the WSe2 channel is highly resistive; however, following electrolyte deposition the contacts are ohmic (Figure S14b), indicating n-doping of the channel and thinning of the Schottky barrier at the WSe2/metal interface.40 Evident from the transfer curves (Figure 5d), bilayer 800WSe2 exhibits ∼1000× increase in oncurrent, 100−1000× higher on/off ratio (107), 100× higher μFET (∼30 cm2/(Vs), see Methods Section for discussion on CEDL), and 2−3× lower SS for the n-branch (∼200 mV/dec) compared to those of 650WSe2 (Figure 5d). In this case, the larger domains, reduced density of high-angle DBs (Figure 2), and dramatically reduced density of lattice point defects (Figure 3) reduce carrier scattering. In general, all devices display semiconducting behavior and ambipolar transport, although the threshold voltage and off-state is shifted negative for higher TG (800WSe2). Interestingly, the 650WSe2 exhibits a positive threshold voltage (VT) shift compared to 800WSe2, which may be due to a higher density of oxygen,43 tungsten vacancies, or DBs31 (Figure 2) for 650WSe2. Such vacancies, tungsten vacancies in particular, are known to lead to p-type doping in WSe2.31 The 800WSe2 exhibits a threshold voltage and off-state such that the p-branch cannot be fully resolved using the polymer electrolyte. Despite the ambipolar transport, a profound n-type transfer characteristic is still seen on the 800 °C WSe2 due to unavoidable VSe, as they are hard to suppress due to its smallest formation energy among defects.31 However, based on the hole/electron μFET ratio for 650WSe2 as well as those in the literature (∼10),6 we speculate that 800WSe2 could exhibit hole μFET that exceeds 100 cm2/(Vs) at room temperature. Although the use of electrolyte gating can reduce the impurity scattering in transistors and thus improve the mobility,44 the electrical performance is primarily dominated by the film quality. This conclusion is supported by the comparison between 650 and 800 °C WSe2 in this work, and in the literature.6,10 Detailed information on FET performance in Figure 5d is summarized in Table S1.
CONCLUSION This work is a breakthrough in the knowledge for vapor phase epitaxy of 2D layers on crystalline substrates. The realization that the substrate can dominate the transport of atomically thin WSe2 strongly suggests that we must consider multilayer 2D semiconductors to produce transfer-free, electronic grade, epitaxial 2D films on sapphire or other insulating, crystalline substrates. These findings are generally applicable to other TMDs, and thus will guide and stimulate research interests in synthesis and transport of 2D epitaxial layers for electronic applications. METHODS MOCVD Process for Epitaxial WSe2. There are three critical steps to achieving a high-quality epitaxial TMDs: (1) utilizing crystalline substrates with high surface energy, achieved here via thermal annealing of as-received sapphire; (2) a “nucleation step” where the substrate is exposed to higher flow rates of W- and Seprecursors for a short period; and (3) postgrowth annealing at 800 °C under H2Se flow to prevent Se vacancies from forming and also to reduce particle deposition on the surface. The third point reduces vacancies and surface nanoparticles. By following these steps, we are able to realize large-area epitaxial WSe2 with highly uniform coverage and an excellent epitaxial relationship to the underlying sapphire substrate. G
DOI: 10.1021/acsnano.7b07059 ACS Nano XXXX, XXX, XXX−XXX
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ACS Nano A controlled layer-by-layer growth of WSe2 ranging from monolayer to three layers can be achieved by following the growth profile illustrated in Figure S3. Growths were done at 700 Torr using H2 as a carrier gas, where W(CO)6 and H2Se precursors are introduced separately into the cold wall vertical reactor chamber and their respective flow rates controlled via mass flow controllers. The optimized condition for the growth was modified from our previously reported work based on a detailed study of WSe2 nucleation,45 ripening and lateral growth on sapphire will be reported in a separate manuscript.26 Briefly, the sapphire is initially heated in H2 to 800 °C and is then exposed to a W-precursor partial pressure of ∼2 × 10−3 Torr and 11 Torr H2Se for times ranging from 30 s to 2 min to nucleate WSe2 seeds on the sapphire. Subsequently the WSe2 is annealed in H2Se to promote diffusion and ripening of domains under a Se-rich environment. The higher temperature annealing step may also act as a surface treatment of the c-plane sapphire promoting Se passivation which enables vdW epitaxy as evidenced by the formation of a gap at the 2D/3D interface. Following the ripening step, the Wprecursor was reintroduced into the reactor at a lower partial pressure to laterally grow the domains forming coalesced layers. All growths were done at 800 °C and 700 Torr total pressure with constant W:Se flux by adjusting the W(CO)6/H2Se partial pressure individually for the following layer number: 4.32 × 10−4 Torr/10.8 Torr (for coalesced 1L), 6.24 × 10−4 Torr/15.6 Torr (for coalesced 2L), and 7.68 × 10−4 Torr/19.2 Torr (for coalesced 3L), while keeping the main growth time constant at 30 min. Basic Materials Characterization. Atomic force microscopy (AFM) micrographs were taken with a Bruker Dimension at a scan rate of 0.5 Hz and 512 lines per image resolution. Peak force KPFM mode using PFQNE AL probe on the same instrument was used to obtain the KPFM data. Lift height of 30 nm (or lower) and AC bias of 4 V were used during the surface potential measurement. The surface potentials of WSe2 measured on the flat surface decreased monotonically with increasing layer number due to the enhanced screening of electronic trap states and dipole moments from the sapphire surface. The screening effect reaches a saturation on 3−4L WSe2 and is consistent with that observed on 1−4L TMDs exfoliated on different surfaces in the literature.46 Scanning electron micrographs (SEMs) are taken in a LEO 1530 scanning electron microscope that uses a Schottky-type field-emission electron source and in-lens detector that receives the secondary electrons from the imaged sample. Raman and photoluminescence (PL) spectroscopy measurements (Horiba LabRam) were performed with 532 nm excitation wavelength, 100× objective lens. Selected-area low-energy electron diffraction (LEED) is performed on WSe2 films in an Elmitec III system. In the experiment, the electron beam size has been maximized so that the crystallinity of a surface area on mm scale can be probed. Laser ablation inductively coupled plasma mass spectrometry (LA-ICPMS) with detection limit of 0.1 part-per-million (ppm) were carried out by the Balazs Nanoanalysis lab on three different samples: sapphire substrate (used as background reference) and two WSe2 films grown by DMSe and H2Se. The impurities detected by LA-ICPMS are well below the X-ray photoemission spectroscopy (XPS) detection limit. XPS of all impurities as well as relevant core levels (W 4f, Se 3d, C 1s, O 1s, and Al 2p) were measured via a monochromated Al Kα source with takeoff angle of 45° and Omicron EA125 hemispherical analyzer with ±0.05 eV resolution, and acceptance angle of 8°.47 The analyzer was calibrated with Au, Ag, and Cu foils according to “ASTM E2108− 16 2016 Standard Practice for Calibration of the Electron Binding Energy Scale of an X-ray Photoelectron Spectrometer (West Conshohocken, PA: ASTM)”. STM/STS Experiments. The STM/STS experiments were carried out with a cryogenic STM operated in ultrahigh vacuum at 5 K. Electrochemically etched tungsten tips cleaned in UHV by Ne ion bombardment and electron beam heating were used. STM images were recorded in constant-current mode; bias voltages refer to the sample with respect to the STM tip. STS measurements of the differential tunneling conductance dI/dV were carried out with lock-in technique (modulation frequency 675 Hz at a peak-to-peak modulation of 10 mV) to probe the local density of electronic states.
The STS spectra were recorded with a method in which an offset ΔS(V), that varies linearly with the magnitude of the sample bias V, is applied to the tip−sample separation.34 The exponential increase in conductance arising from this variation in tip−sample separation is then normalized by multiplying the data by a factor of e2κΔS(V), where κ is an experimentally determined decay constant of 10 nm−1 (averaged over bias voltage). This measurement method and subsequent normalization does not affect any detailed structure in the spectra, but it improves the dynamic range by 1−2 orders of magnitude. The noise level for the conductance is also measured, and normalization of that using the same method then yields a voltage-dependent noise level for each spectrum. STEM Experiments. To transfer WSe2 onto a TEM grids or a fresh substrate, WSe2/sapphire was spin-coated with PMMA (950 000 molecular weight) at 2000 rpm for 30 s. After that, 16% HF solution was used to release PMMA/WSe2 from sapphire. Once part of the substrate is merged in HF solution while the sample surface is above the solution surface, the solution will infiltrate into the interface between WSe2 and sapphire substrate by capillary force to weaken the bond. The total releasing process takes around 1 min. At the end, the released specimen was positioned and captured on the target substrate and the supporting PMMA film was dissolved using acetone and isopropyl alcohol. It should be noted that thicker 2 to 3L WSe2 films transferred onto SiO2/Si substrates for device work were transferred using a slightly different process as outlined in the Device Fabrication Section, due to significantly slower release time compared with that of 1L WSe2 transfer. All atomic resolution aberration corrected HAADF STEM images were taken with a FEI Titan3 G2* with a resolution of 0.07 nm using 80 kV acceleration voltage. Theoretical Modeling. The density functional theory (DFT) calculations were performed with the Vienna Ab-initio Simulation Package (VASP).48 The valence electronic states are expanded in a set of periodic plain waves and the ion-electron interaction is implemented through the projection augmented wave (PAW) approach.49 The Perdew−Burke−Ernzerhof (PBE) GGA exchange correlation functional is applied in the simulation.50 The wave functions are expanded in plane waves with a kinetic energy cutoff of 400 eV. The convergence criteria for the electronic and ionic relaxation are 1.0 × 10−5 eV and 1.0 × 10−4 eV, respectively. Integration over the first Brillouin zone is performed with a Γ-centered 3 × 3 × 1 k-point mesh. A supercell consisting of 2 × 2 α-Al2O3 unit cells and 3 × 3 1L WSe2 unit cells (Figure S4a) is built with a 4% strain on WSe2. A vacuum layer of 20 Å is added to the c-direction. To avoid long-range interactions between supercells, a supercell consists of the surface and interface under study on both sides along the c-direction. The proposed WSe2-sapphire interfaces are shown in Figure S13. Except for the Al-terminated sapphire/WSe2 interface, gap states exist within the band gap of WSe2 after contact. Comparing the density of states of the gap states, the four interfaces are ordered as Al−O > Al− Se > Al−O−Se > Al. The calculations indicate that the interaction (bonding) energy between WSe2 and the Se-terminated sapphire surfaces (4.23 eV for Al−Se connection in Figure S13b and 2.6 eV for Al−O−Se connection in Figure S13d) lies between that of WSe2/Alterminated (0.04 eV) and WSe2/Al−O-terminated surfaces (5.4 eV). This relatively high interface bonding energy between WSe2 and Al− Se connection also manifests itself mechanically, as we find that fully coalesced epitaxial WSe2 layers are more difficult to mechanically transfer from the substrate than nonepitaxial WSe2. Device Fabrication. Field-effect transistors were fabricated via standard photolithography to define WSe2 channel dimensions, source/drain (S/D) contact electrodes, and side-gate electrodes (Figure 5a). The 4.1 × 2.5 mm die layout employed in this work consists of an array of FETs with channel width 24 μm and channel length ranging from 10 to 0.75 μm. With these die dimensions in mind, a 3 row × 2 column die layout is used to cover a majority of the 10 × 10 mm sample surface. In our work, the gate electrode is not directly deposited on top of the electrolyte-WSe2 FETs, and instead, we utilize a side-gate geometry that establishes a lateral electric field in the PEO:CsClO4 (PEO: poly(ethylene-oxide)) and drives the ions into place on the WSe2 channel surface. All photolithography was H
DOI: 10.1021/acsnano.7b07059 ACS Nano XXXX, XXX, XXX−XXX
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ACS Nano
domain WSe2 (∼3L) and single domain bilayer graphene in a dual-gate system (the bottom gate is oxide and the top one is the PEO:CsClO4 used for this study). The measured CEDL is between 0.13 and 0.8 μF/ cm2, which is significantly smaller than 3.8 μF/cm2 measured on thicker layered crystals. Although the type of materials used for the channel and variation caused by the transfer process can shift the values, the CEDL should not exceed 1 μF/cm2 when the channel is only 2L−3L thick for any chosen layered crystals. Hence, we choose 1 μF/ cm2 for the CEDL to estimate the field-effect mobility value conservatively in this work, as it gives a reasonable EDL thickness (≤2.5 nm) on the bilayer WSe2 channel and does not overestimate or overexaggerate mobility value. We also provide the mobilities with CEDL equal to 3 μF/cm2 in Tables S1 and S2 because at least one article (by Efetov and Kim)53 in the literature reports 3.2 μF/cm2 on dual-gated 1L graphene.
carried out in a GCA 8500 i-line Stepper. WSe2 channels were isolated and etched via reactive ion etching in a Plasma Therm PT-720 plasma etch tool using an SF6/O2/Ar gas chemistry at 10 mTorr and 100 W for 30 s. Both 25 nm Ni and 10/10 nm Pd/Au source/drain metallizations are carried out under moderate vacuum (∼10−6 Torr) at 1.0 Å/s dep rate. Directly prior to loading samples into evaporator for metal deposition and eventual lift-off, samples are subjected to a brief oxygen plasma treatment to remove photoresist residue that remains on the WSe2 surface following photoresist development. This gentle plasma treatment/surface prep is carried out in an M4L etch tool at 50 W and 500 mTorr for 45 s. Following this initial metal deposition, a second metallization consisting of ∼10 nm/150 nm Ti/Au is carried out to define the side-gate and to thicken source/drain pads for probing. Electrolyte-Gating Measurement. The polymer electrolyte preparation details are the same as published by Xu et al.39 with the exception that the electrolyte is prepared and deposited in an argonfilled glovebox where the concentrations of H2O and O2 are
