Can a Black Phosphorus Schottky Barrier Transistor Be Good Enough

Jan 10, 2017 - Nanophotonics and Optoelectronics Research Center, Qian Xuesen Laboratory of Space Technology, China Academy of Space Technology, Beiji...
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Can a Black Phosphorus Schottky-barrier Transistor be Good Enough? Ruge Quhe, Xiyou Peng, Yuanyuan Pan, Meng Ye, Yangyang Wang, Han Zhang, Shenyan Feng, Qiaoxuan Zhang, Junjie Shi, Jinbo Yang, Dapeng Yu, Ming Lei, and Jing Lu ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.6b14699 • Publication Date (Web): 10 Jan 2017 Downloaded from http://pubs.acs.org on January 21, 2017

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Can a Black Phosphorus Schottky-barrier Transistor be Good Enough? Ruge Quhe,1* Xiyou Peng,2 Yuanyuan Pan,2 Meng Ye,2 Yangyang Wang,2, 4 Han Zhang,2 Shenyan Feng,1 Qiaoxuan Zhang,1 Junjie Shi,2 Jinbo Yang,2,3 Dapeng Yu,2,3 Ming Lei,1,* and Jing Lu2,3, * 1

State Key Laboratory of Information Photonics and Optical Communications and School of

Science, Beijing University of Posts and Telecommunications, Beijing 100876, P. R. China 2

State Key Laboratory for Mesoscopic Physics and Department of Physics, Peking University, Beijing 100871, P. R. China 3 4

Collaborative Innovation Center of Quantum Matter, Beijing 100871, P. R. China

Nanophotonics and Optoelectronics Research Center, Qian Xuesen Laboratory of Space Technology, China Academy of Space Technology, Beijing 100094, P. R. China

*Corresponding author: [email protected]; [email protected] , [email protected] ABSTRACT Experimental two-dimensional (2D) black phosphorus (BP) transistors typically appear in the form of Schottky-barrier field effect transistors (SBFETs), but their performance limit remains open. We investigate the performance limit of monolayer BP SBFETs in the sub-10 nm scale by using ab initio quantum transport simulations. The devices with 2D graphene electrodes are apparently superior to those with bulk Ti electrodes due to their smaller and tunable Schottky barrier heights and the absence of metal induced gap states in the channels. With graphene electrodes, the sub-10 nm monolayer BP SBFETs in their performance limit outperform the monolayer MoS2, carbon nanotube, advanced silicon transistors, and even can meet the requirements of both high performance and low power logic applications of the next decade in the latest International Technology Roadmap for Semiconductors. It appears that the ML BP SBFETs have the best intrinsic device performance among the reported sub-10 nm 2D material SBFETs. KEYWORDS : 2D materials; nano-electronics; ITRS; ab initio calculations; electronic transport

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INTRODUCTION For years it has been known that scaling bulk Si metal-oxide-semiconductor field-effect transistors (MOSFETs) would be extremely challenging when their channel lengths approach sub-10 nm. The introduction of novel device architectures (e.g. Si nanowires,1, 2 ultra-thin body structures,3 and Fin (non-planer multi-gate) configurations4, 5) and new channel materials (e.g. one-dimensional carbon nanotubes) allows the continued scaling. Up to now, 5-10 nm advanced Si MOSFETs and 9 nm CNT

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Schottky-barrier field effect transistors

(SBFETs) have been successfully fabricated. Two dimensional (2D) material is another alternative channel material to Si, mainly due to an excellent electrostatic control related to its atomic thickness and being free of dangling bond in the interfaces.7 The recently fabricated 1 nm-gate-length MoS2 transistor with carbon nanotube as gate electrodes confirms the capability of 2D materials to extend the Moore’s law down to 10 nm.8 Among the 2D materials, emerging monolayer (ML) and few-layer (FL) black phosphorus (BP) have attracted wide attention because of their exceptional electronic properties.9-11 Different from isotropic graphene (zero band gap and high carrier mobility) and MoS2 (sizable band gap and moderate carrier mobility), 2D BP possesses both a moderate and tunable band gap,12 high carrier mobility,13-15 and high anisotropy,16 making it especially promising for the next generation electronics.9, 17-22 Experimental 2D BP transistors with long channel lengths have shown very high on/off current ratios and excellent current saturations.9, 18, 21, 23, 24 In a MOSFET, the contact material is a degenerately doped version of the semiconducting channel material, and no Schottky barrier exists between the source/drain and the channel, assuring a low contact resistance. The simulated 5-20 nm ML BP MOSFETs 25-29 outperform the ML MoS2 MOSFETs in terms of the intrinsic on-state current and switching speed, and even can fulfill the International Technology Roadmap for Semiconductors (ITRS)

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requirement for the high performance (HP) applications in the 10-year horizon.26-28,

31

However, there is no stable and reliable doping method for the 2D materials,29, 32 and the BP transistors fabricated in experiment usually have channel in direct contact with metal electrodes, which typically gives rise to a Schottky barrier between the semiconducting channel and metal electrodes.33 Namely, BP FETs typically appear in the form of SBFETs rather than MOSFETs. SBFETs always demonstrate poorer performance than MOSFETs 2

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because the Schottky barrier may drastically restrain the drain on-state current.28, 32 It is unclear whether sub-10 nm ML BP SBFETs remain good enough to meet the ITRS goal. In this article, we study for the first time the device performance limit of the sub-10 nm ML BP SBFETs by using rigorous ab initio quantum transport calculations. The device performance depends strongly on the selection of electrodes. The transistors with graphene electrodes show a much better device performance than those with Ti electrodes because of their smaller and tunable Schottky barrier heights (SBH) and the absence of metal induced gap states (MIGS) in the channel. With graphene electrodes, the intrinsic on-state current and switching ability of the sub-10 nm ML BP SBFETs in both the armchair and zigzag directions not only exceed those of the ML MoS2, CNT, and advanced Si transistors but also fortunately can meet the requirements of the HP transistors of the next decade in the latest ITRS scaled down to a gate length of 5 nm. The graphene contacted 10- and 7-nm BP SBFETs even fulfill the ITRS standard for the low power (LP) transistors in the zigzag direction. These factors render ML BP SBFETs with graphene electrodes to be the best sub-10 nm SBFETs among the known 2D material SBFETs in terms of the device performance.

METHODS Device models. Two probe models of the SBFETs are constructed with ML BP as channel and Ti/graphene as electrodes (Fig. 1a-d). Both of Ti and graphene have been used as electrodes in BP SBFETs experimentally,13, 23, 34 and the latter shows superior performance. 35, 36

The lengths of the left and right electrodes are semi-infinite. The Ti electrode is simulated

by 6 Ti atom layers. The lattice constants of the electrode materials are adapted to that of ML BP (a = 4.62 Å and b = 3.35 Å) during the simulations (Fig. S1). The matching patterns in the electrode supercells are assumed to be the (1 × 3) ML BP on the (1 × 2) Ti (110) surface, and the (1 × 3) ML BP on the (1 × 4) graphene, respectively. The corresponding average mismatches of lattice constant are 1.4 % and 2.0 %, respectively. It is noted that the effect of mismatch on the electronic properties of the BP and graphene heterostructure is insignificant.35, 37, 38 The semi-infinite source and drain are heavily p-doped with a doping concentration of 4 ×1017 m−2. A vacuum buffer space of at least 15 Ǻ is set to ensure decoupling between neighboring slabs. In the SBFET and MOSFET models, both the armchair (x-) and zigzag (y-) directions of BP have been considered as the transport directions. 3

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The SiO2 dielectric is 0.41 ~ 0.7 nm thick, adapted from the ITRS standards for the high performance and low power transistors. Device simulations. The current at a given gate voltage Vg and bias voltage Vds is calculated by using the Landauer-Büttiker formula: 39 2e

+∞

I(Vds ,Vg )= h -∞ TE,Vds ,Vg fLE-µL-fR (E-µR )dE

(1)

where T(E, Vds, Vg) is the transmission coefficient, fL/R the Fermi-Dirac distribution function for the L/R electrode, and µL/µR the electrochemical potential of the L/R electrode. Single- ζ plus polarization (SZP) basis set is employed, and a test based on higher double- ζ

plus

polarization (DZP) basis set shows consistent results (Fig. S2). The Monkhorst-Pack k-point mesh 40 is sampled with a separation of about 0.01 Å-1 in the Brillouin zone. The real-space mesh cutoff is at least of 400 eV, and the temperature is set at 300 K. The generalized gradient approximation (GGA) of Perdew-Burke-Ernzerhof (PBE) form 41 to the exchange-correlation functional is used.

RESULTS The transfer characteristics of the sub-10 nm single-gated (SG) ML BP SBFETs with Ti and graphene contacts are shown in Fig. 1e-h. The key device figures of merits at a supply voltage of Vdd = 0.5 V and off-state current of Ioff = 0.1 µA/µm (ITRS HP standard) are given in Table 1. The on-state currents (Ion) monotonously decrease and the subthreshold swings (SS) increase with the reduced gate length Lg. Anisotropic is apparent for both electrodes from the fact that the on-state currents in the x-direction are 1 ~ 3 times greater than those in the y-direction at Lg > 5 nm. When Lg = 5 nm, the on-state currents in the x-direction become lower than those in the y-direction. This is because of the serious source to drain tunneling leakage at Lg = 5 nm due to the small transport mass along the x-direction. In other words, as the channel becomes extremely short, a smaller transfer mass cannot always guarantee a better performance in a transistor, since the advantage of the high on-state current may be offset by the source to drain leakage.7, 42 Most strikingly, graphene electrodes show a greatly improved device performance compared with Ti electrodes in terms of the 2 ~ 3 times larger on-state current and 10 ~ 20 times smaller minimum leakage current. Two factors are responsible for such a significant 4

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improvement. First, the SBH of graphene contacted BP at Vg = Vds = 0 V is much smaller than that of Ti contacted BP. The SBHs of holes (ϕhSB ) and electrons (ϕeSB ) share similar value of 0.5 eV in the Ti(110) contacted BP, consistent with the observed mid-gap alignment of Ti in ML BP SBFETs.

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The Ti(0001) surface gives a smaller theoretical hole SBH of 0.3 eV for

ML BP 43. By contrast, ϕhSB for the graphene contacted BP is only 0.1 eV at Vg = Vds = 0 V (A band structure calculation at the GGA/PBE level gives a slightly higher value of ~ 0.25 eV 38

). The second factor is the different MIGS with Ti and graphene electrodes. In the

metal-semiconductor interface, MIGS are identified as evanescent states of the complex band structure in the semiconductor band gap, which reduce the effective channel length and increase the source to drain tunneling leakage. MIGS also serve as reservoir for electrons or holes and cause a Fermi level pinning, which often leads to a robust SBH. Due to a strong covalent interaction between Ti and ML BP,43 apparent MIGS with a decay length λm of 0.7 nm are observed in the case of the Ti electrodes (Fig. 2a). The small asymmetry of the LDOS comes from the fact that the left and right interfaces between the channel and Ti electrodes are not strictly symmetric in the optimized device structures. The MIGS lead to a decrease of 1.4 nm in the effective channel length, a larger transmission probability in the band gap region (Fig. 2b), and a robust SBH of 0.5 eV. By contrast, MIGS in the semiconducting channel are absent with graphene electrodes (Fig. 2c), due to the weak van der Waals interaction between graphene and ML BP. As a result, there is no loss of the effective channel length, and the transmission probability in the band gap region is smaller (Fig. 2d). Meanwhile the SBH becomes tunable by gate voltages with graphene electrodes, because the Fermi level pinning is weak. This tunable SBH with graphene electrodes has been demonstrated in the previous experiments.35, 36, 38 Next, we show the change of the SBH with the gate voltage at a fixed bias voltage of -0.5 V by plotting the spatial energy band in Fig. 3a. At Vg = 1.3 V (point I), the SBH for holes ϕhSB in the left electrode-channel interface is 0.1 eV. This Schottky barrier and the apparent barrier in the channel make most of the incoming wave functions scattered (inset of Fig. 3b), and thus the drain current is very low. As Vg decreases, the two barriers become significantly 5

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smaller, which leads to the exponential increase of the drain currents. At Vg = -0.3 V (point II), both the heights of the Schottky barrier and the barrier in the channel vanish, and holes can inject easily from left electrode and transfer to the right, as reflected from the transmission eigenstate also shown in the inset of Fig. 3b. Since the SBH with graphene electrodes could be tuned to zero in the on-state, the corresponding output characteristics show a linear current behavior at a small bias (Fig. 3c). We benchmark the sub-10 nm ML BP SBFETs against the sub-10 nm ML MoS2 and CNT SBFETs and advanced Si MOSFETs at a typical supply voltage of Vdd = 0.5 eV in Table S1 and Fig. 4a. According to the semi-empirical studies, the ML BP MOSFETs in the x-direction have a higher on-state current than the ML MoS2 counterparts due to BP’s relative smaller effective mass 27-29. At the same ab initio level, with Ti electrodes, the SG ML BP SBFETs in the x-direction and the SG ML MoS2 SBFETs share similar on-state currents, although the calculated ϕhSB in BP-Ti contact (0.5 eV) is apparently larger than the calculated ϕeSB in MoS2-Ti contact (0.22 ~ 0.35 eV).29, 44 Replacing Ti with graphene as electrodes, the ML BP SBFETs in both directions achieve 2~3 times larger on-state current than ML MoS2 counterparts with Ti electrodes due to the much reduced SBH. Compared with the existing advanced Si MOSFETs, the 5-10 nm graphene contacted SG ML BP SBFETs in the ballistic limit show a better performance, with half to ten times greater Ion and similar or less SS (also see Table S1). Even compared with the extremely high Ion of 630 µA/µm in the CNT SBFET at Lg = 9 nm, the advantage of the SG ML BP SBFETs remains along the x-direction with a high Ion of 769 µA/µm. Notice that in the above comparison, the ML BP SBFETs adopt the SG device configuration. Innovation of the gate configurations, e.g. multi-gate structure, suppresses short channel effects. If the double gate structure is applied, Ion of the BP SBFET along the y-direction (799 µA/µm) can be higher than that in the CNT device (Fig. S3). According to an ab initio quantum transport simulation with inclusion of electron-phonon interaction, the on-state currents reach about 90 % of their ballistic limit in ML BP MOSFETs at Lg = 10.5 nm.25 It is reasonable to assume that the sub-10 nm ML BP SBFETs have a similar ballisticity of 90%. Hence, even if with inclusion

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of the electron-phonon scattering, the on-state currents in the graphene contacted ML BP SBFETs are still expected to be greater than those in the CNT SBFETs and Si MOSFETs. The key figures of merits of the sub-10 nm graphene contacted DG ML BP SBFETs in their performance limit are benchmarked against the ITRS HP and LP standards in Table 2 and Fig. 4b-c. Most remarkably, the on-state currents of the sub-10 nm graphene contacted DG BP transistors meet the ITRS HP standard with one exception of the x-directed one at Lg = 5 nm while those of the Ti contacted DG ML MoS2 and BP SBFETs along the y-direction fail (Table S2 and Fig. S4) 45. In the LP applications, the off-state current is required to be ultra-low to save power. Though the x-directed DG ML BP SBFETs are not suitable for the LP applications as their Imin are too high, Imin of the y-directed 10- and 7-nm DG ML BP SBFETs are below the ITRS standard of off-state current thanks to the anisotropic nature of BP. The on-state currents of the y-directed DG ML BP SBFETs in the ballistic limit exceed the ITRS LP standard at Lg = 10 and 7 nm, while the 10- and 8-nm Ti contacted MoS2 contenders fail to do so, although the ML MoS2 has an apparently larger band gap (1.0 eV for ML BP 23 vs. 1.8 eV for ML MoS2 46). Besides on-state current, total gate capacitance and intrinsic delay time are also two import figures of merits of an FET, which reflect the ability to retain the channel charge and the switching speed, respectively. The total gate capacitance is calculated as Cg =

dQch dVg

, where Qch

is the Mulliken charge of the channel and Vg the gate voltage. It is less than 0.3 fF/µm and considerably smaller than the ITRS requirement on the HP/LP transistors, partly due to the significant quantum capacitance Cq compared with the oxide capacitance Cox. The total gate capacitance is a series combination of an oxide capacitance, which depends on the dielectric constant, and a quantum capacitance, which depends on the density of states in the channel.47 Since Cox calculated by the parallel plate capacitance approximation are 0.70 ~ 1.08 fF/µm, the quantum capacitance Cq can thus be roughly estimated to be 0.14 ~ 0.46 fF/µm. The calculated intrinsic delay time τ =

Cg Vg Ion

are only 0.05 ~ 0.16 (0.13 ~ 0.25) ps, lower than the

ITRS HP (LP) standard of 0.42 ~ 0.48 (1.49 ~ 1.56) ps. Compared with those of MoS2 (0.15 ~ 0.21 (0.28 ~ 0.94) ps), the intrinsic delay times of ML BP SBFETs are slightly shorter due to their higher on-state currents. 7

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To present a systematic understanding, the ballistic transport performance limit of the sub-10 nm DG ML BP MOSFETs is also projected in Fig. 4b-c, Table S3 and Fig. S5. The calculated currents and intrinsic delay times of the DG ML BP MOSFETs using semi-empirical methods28, 31 are close to our values. Comparing the sub-10 nm DG ML BP SBFETs with the MOSFET counterparts, we find that the performance of the former is indeed always poorer in terms of the on-state currents and intrinsic delay times because of the Schottky barrier limited the carrier transport in the former. Actually, all the 5~10 nm x-directed DG ML BP MOSFETs fulfill the ITRS HP goal for the on-state currents and intrinsic delay times, and all the 5~10 nm y-directed ones fulfill the ITRS LP goal. The on-state currents of the Ti contacted DG ML BP SBFETs are significantly lower than those of their MOSFET counterparts due to the robust SBH of 0.5 eV between Ti and BP. The on-state currents of the graphene contacted x-and y-directed DG ML BP SBFETs, however, approach 54 ~ 90% and 32 ~ 72% of those of their MOSFET counterparts, respectively, due to the small and tunable SBHs between graphene and BP. Therefore, by using a proper 2D electrode with a weak adhesion and a quite small SBH, the performance of a sub-10 nm DG ML BP SBFET can approach to that of a DG ML BP MOSFET.

DISCUSSIONS As summarized in Fig. 4, the on-state currents of the graphene contacted ML BP SBFETs along the x-direction at the 10-nm and 7-nm nodes are extraordinarily high. These high on-state currents result from a large and steep transmission spectrum T(E) near the valence band maximum (VBM). This large and steep T(E) is related to not only the small and tunable SBH for holes but also the anisotropic nature of BP. In a SBFET, the T(E) increases exponentially with the reduced transport mass T(E) ∝ e-SBH m given a SBH and increases *

linearly with the increased projected density of states (PDOS) of the channel T(E) ∝ PDOS (channel). As for the case of the ML BP, its hole effective mass along the x-direction mx = 0.19 m0 (m0 is the free electron mass) is light while that along the y-direction my = 3.24 m0 is very heavy, compared with the ML MoS2 with an isotropic electron effective mass of 0.45 m0. This effective mass anisotropy leads to the larger density of states (DOS) of the infinite ML BP. According to the relationship between the effective mass and DOS, 8

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DOS =

gs gv 2πħ2

mx my ,

(2)

where gs and gv are spin and valley degeneracies, respectively 42, the DOS of the ML BP near the VBM is 1.7 times of that of ML MoS2 near the conduction band minimum (CBM), given the same gs and gv. A large DOS of the infinite ML BP will lead to a large and steep PDOS of the ML BP channel near the VBM, as they are simultaneous results of a flat band with heavy effective mass. To qualitatively compare the PDOS and T(E) between the x-directed ML BP and MoS2 SBFETs, we have calculated the values of the PDOS and T(E) of the former averaged over a region of [E(VBM) - 0.5 eV, E(VBM)] and the latter averaged over a region of [E(CBM), E(CBM) + 0.5 eV]. As shown in Fig. S6a- b, the average value and slope of the PDOS of the x-directed ML BP SBFETs near the VBM are 1 ~ 2 and 2 ~ 3 times of those of the ML MoS2 SBFETs near the CBM. Due to this large and steep PDOS besides the small SBH and transport mass, the x-directed ML BP SBFET with graphene electrodes shows a T(E) near the VBM that is 10 times greater in average and 23 times steeper than that of the ML MoS2 SBFET with Ti electrodes (Fig. S6c). Even when the ML BP SBFET has a SBH apparently larger than the ML MoS2 one if Ti electrodes are used in both cases, the T(E) of the former near the VBM is still 3 times greater in average and 21 times steeper than that of the latter near the CBM (Fig. S6d). The experiments have demonstrated that graphene electrodes can lead to a barrier-free contact with ML MoS2

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, but the MoS2 SBFETs seem unlikely to

outperform the BP SBFETs (in the x-direction) even with graphene electrodes in terms of the smaller PDOS and larger transport effective mass of BP. Since the performance of a SBFET strongly depends on its SBH, other metal electrodes with a SBH smaller than that (0.5 eV) of Ti(110) electrodes are anticipated to achieve a better device performance and even meet the ITRS goal. According to the theoretical calculations, the hole SBHs in the Pd and Ni contacted ML BP and electron SBHs in the Au, Cu and Cr contacted ML BP are less than 0.5 eV.43 Experimentally, the measured hole SBH between Ni and ML BP is 0.35 eV 23. Actually, Pd and Ni do show a smaller contact resistance (1.75 and 3.15 kΩ·µm, respectively) with FL BP than Ti (4.85 kΩ·µm).17 Compared with the Ti contacted device, the Pd contacted 1 µm FL BP SBFET exhibits a superior performance in 9

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on-state current.49 With Sc contact, an even higher current density (580 µA/µm) with Ti and Pd contacts

16, 18, 50

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than that

is achieved for 1 µm FL BP SBFETs. Such a striking high

current density also provides a support to the possibility of the predicted large on-state currents of ML BP SBFETs in the sub-10 nm channel region. Now that the excellent performance of the graphene contacted ML BP SBFETs is closely associated with the weak van der Waals interaction between graphene and ML BP, transistors with other 2D metal electrodes (e.g., H-NbS2, T′-MoS2, WSe2, MoTe2, and TiS2) that form van der Waals junctions with BP 51 are also expected to have a more excellent performance than those with 3D metal electrodes. Being along with searching new electrode materials, device performance may also be improved by inserting buffer layer 52-54 e.g. BN, graphene and Ta2O5 layer, between BP and metal electrodes to weaken the Fermi level pinning like the MoS2 case, where a reduced SBH and contact resistance are observed with the use of buffer layers.55, 56 It is also interesting to discuss the devices based on the FL BP. FL BP can deliver a greater current due to the increased layer number but has poorer gate control ability compared with the ML one. According to the previous simulations, the change of on-state currents is insignificant as the layer number N increases from 1 to 5 in the 20-nm BP MOSFETs.26 The degradation of SS is also predicted to be quite small from 64 to 69 mV/dec as N increases from 1 to 4 in the 9-nm BP MOSFETs with ZrO2 dielectric.27 Therefore, we anticipate that the sub-10 nm FL BP SBFETs share similar high performance with the ML ones. CONCLUSIONS To summarize, we have projected the ballistic transport performance limit of sub-10 nm ML BP SBFETs by ab initio quantum transport simulations. With Ti electrodes, Ion of the y-directed sub-10 nm DG ML BP SBFETs in the upper performance only reach 23 ~ 44 % of the ITRS goal for the HP applications. The performance of sub-10 nm DG ML BP SBFETs is improved greatly by using graphene electrodes, due to their smaller and tunable SBHs and absence of MIGS. With graphene contact, the sub-10 nm ML BP SBFETs in their performance limit not only outperform ML MoS2 and carbon nanotube SBFETs and advanced Si MOSFETs but also can fulfill the ITRS requirement for the HP logic applications in terms of on-state current and intrinsic delay time with channel scaled down to 5 nm. The 10- and 7-nm graphene contacted DG ML BP SBFETs even meet the LP goal of ITRS in the 10

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y-direction. To the best of our knowledge, the graphene contacted DG ML BP SBFETs demonstrate the best key device performance among the known 2D material SBFETs. Up to now, 20-nm BP SBFET has been successfully fabricated,57 and shorter devices are expected to be realized in the near future. Our study is expected to strongly encourage experimental investigations on the sub-10 nm SBFETs based on BP.

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ASSOCIATED CONTENT * Supporting Information The Supporting Information is available free of charge on the ACS Publications website at http://pubs.acs.org. Details of the model and methods, comparison of the PDOS of the channel and T(E) between the ML BP and MoS2 SBFETs, benchmark of the ML BP and ML MoS2 SBFETs against the ITRS target, and benchmark of the ML BP MOSFETs and SBFETs against the ITRS target. (PDF) AUTHOR INFORMATION Corresponding Authors *E-mail: [email protected] *E-mail: [email protected] Notes The authors declare no competing financial interest. ACKNOWLEDGMENTS This work was supported by the National Natural Science Foundation (Nos. 11674005, 11604019, 11274016, 11474012, 11274233, 61574020, and 61376018), the National Basic Research Program (Nos. 2012CB619304 and 2013CB932604), the National Foundation for Fostering Talents of Basic Science (Nos. J1030310 and J1103205), Ministry of Science and Technology (Nos. 2016YFA0301300 and 2016YFB0700600), the Fund of State Key Laboratory of Information Photonics and Optical Communications (Beijing University of Posts and Telecommunications), and the Fundamental Research Funds for the Central Universities (2016RC27) of China. We thank Prof. Fengnian Xia for helpful discussions.

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REFERENCES (1) Li, M.; Yeo, K. H.; Suk, S. D.; Yeoh, Y. Y.; Kim, D.-W.; Chung, T. Y.; Oh, K. S.; Lee, W.-S., Sub-10 nm Gate-All-Around CMOS Nanowire Transistors on Bulk Si Substrate. In IEEE Symposium on VLSI Technology 2009; pp 94-95. (2) Yang, F.-L.; Lee, D.-H.; Chen, H.-Y.; Chang, C.-Y.; Liu, S.-D.; Huang, C.-C.; Chung, T.-X.; Chen, H.-W.; Huang, C.-C.; Liu, Y.-H.; Wu, C.-C.; Chen, C.-C.; Chen, S.-C.; Chen, Y.-T.; Chen, Y.-H.; Chen, C.-J.; Chan, B.-W.; Hsu, P.-F.; Shieh, J.-H.; Tao, H.-J.; Yeo, Y.-C.; Li, Y.; Lee, J.-W.; Chen, P.; Liang, M.-S.; Hu, C., 5nm-Gate Nanowire FinFET. In IEEE Symposium on VLSI Technology, 2004; pp 196-197. (3) Doris, B.; Ieong, M.; Zhu, T.; Zhang, Y.; Steen, M.; Natzle, W.; Callegari, S.; Narayanan, V.; Cai, J.; Ku, S. Device Design Considerations for Ultra-Thin SOI MOSFETs. IEEE Int. Electron Devices Meeting 2003, 27.3. 1-27.3. 4. (4) Lee, H.; Yu, L.-e.; Ryu, S.-W.; Han, J.-W.; Jeon, K.; Jang, D.-Y.; Kim, K.-H.; Lee, J.; Kim, J.-H.; Cheol, J. S.; Lee, G. S.; Jae-Sub, O.; Chang, P. Y.; Bae, W. H.; Mok, L. H.; Yang, J. M.; Yoo, J. J.; Kim, S. I.; Yang-Kyu, C., Sub-5nm All-Around Gate FinFET for Ultimate Scaling. In IEEE Symposium on VLSI Technology 2006; pp 58-59. (5) Yu, B.; Chang, L.; Ahmed, S.; Wang, H.; Bell, S.; Yang, C.-Y.; Tabery, C.; Ho, C.; Xiang, Q.; King, T.-J. FinFET Scaling to 10 nm Gate Length. IEEE Int. Electron Devices Meeting 2002, 251-254. (6) Franklin, A. D.; Luisier, M.; Han, S.-J.; Tulevski, G.; Breslin, C. M.; Gignac, L.; Lundstrom, M. S.; Haensch, W. Sub-10 nm Carbon Nanotube Transistor. Nano Lett. 2012, 12, 758-762. (7) Schwierz, F.; Granzner, R.; Pezoldt, J. Two-Dimensional Materials and Their Prospects in Transistor Electronics. Nanoscale 2015, 7, 8261-8283. (8) Desai, S. B.; Madhvapathy, S. R.; Sachid, A. B.; Llinas, J. P.; Wang, Q.; Ahn, G. H.; Pitner, G.; Kim, M. J.; Bokor, J.; Hu, C.; Wong, H.-S. P.; Javey, A. MoS2 Transistors with 1-Nanometer Gate Lengths. Science 2016, 354, 99-102. (9) Li, L.; Yu, Y.; Ye, G. J.; Ge, Q.; Ou, X.; Wu, H.; Feng, D.; Chen, X. H.; Zhang, Y. Black Phosphorus Field-Effect Transistors. Nat. Nanotechnol. 2014, 9, 372-7. (10) Reich, E. S. Phosphorene Excites Materials Scientists. Nature 2014, 506, 19. (11) Ling, X.; Wang, H.; Huang, S.; Xia, F.; Dresselhaus, M. S. The Renaissance of Black Phosphorus. Proc. Natl. Acad. Sci. 2015, 112, 4523-4530. (12) Tran, V.; Soklaski, R.; Liang, Y.; Yang, L. Layer-Controlled Band Gap and Anisotropic Excitons in Few-Layer Black Phosphorus. Phys. Rev. B 2014, 89, 235319. (13) Liu, H.; Neal, A. T.; Zhu, Z.; Luo, Z.; Xu, X.; Tománek, D.; Ye, P. D. Phosphorene: an Unexplored 2D Semiconductor with a High Hole Mobility. ACS Nano 2014, 8, 4033-4041. (14) Qiao, J.; Kong, X.; Hu, Z.-X.; Yang, F.; Ji, W. High-Mobility Transport Anisotropy and Linear Dichroism in Few-Layer Black Phosphorus. Nat. Commun. 2014, 5, 4475-4475. (15) Wang, X. M.; Jones, A. M.; Seyler, K. L.; Tran, V.; Jia, Y. C.; Zhao, H.; Wang, H.; Yang, L.; Xu, X. D.; Xia, F. N. Highly Anisotropic and Robust Excitons in Monolayer Black Phosphorus. Nat. Nanotechnol. 2015, 10, 517-521. (16) Xia, F.; Wang, H.; Jia, Y. Rediscovering Black Phosphorus as an Anisotropic Layered Material for Optoelectronics and Electronics. Nat. Commun. 2014, 5, 4458. (17) Das, S.; Demarteau, M.; Roelofs, A. Ambipolar Phosphorene Field Effect Transistor. 13

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ACS Nano 2014, 8, 11730-11738. (18) Du, Y.; Liu, H.; Deng, Y.; Ye, P. D.; Han, L.; Deng, Y.; Ye, P. D. Device Perspective for Black Phosphorus Field-Effect Transistors: Contact Resistance, Ambipolar Behavior, and Scaling. ACS Nano 2014, 8, 10035-10042. (19) Koenig, S. P.; Doganov, R. A.; Schmidt, H.; Castro Neto, A. H.; Özyilmaz, B. Electric Field Effect in Ultrathin Black Phosphorus. Appl. Phys. Lett. 2014, 104, 103106. (20) Viti, L.; Hu, J.; Coquillat, D.; Knap, W.; Tredicucci, A.; Politano, A.; Vitiello, M. S. Black Phosphorus Terahertz Photodetectors. Adv. Mater. 2015, 27, 5567–5572. (21) Buscema, M.; Groenendijk, D. J.; Blanter, S. I.; Steele, G. a.; van der Zant, H. S. J.; Castellanos-Gomez, A. Fast and Broadband Photoresponse of Few-Layer Black Phosphorus Field-Effect Transistors. Nano Lett. 2014, 14, 3347-3352. (22)Engel, M.; Steiner, M.; Avouris, P. A Black Phosphorus Photo-Detector for Multispectral , High-Resolution Imaging. Nano Lett. 2014, 14, 6414–6417. (23) Das, S.; Zhang, W.; Demarteau, M.; Hoffmann, A.; Dubey, M.; Roelofs, A. Tunable Transport Gap in Phosphorene. Nano Lett. 2014, 14, 5733-5739. (24) Li, L.; Engel, M.; Farmer, D. B.; Han, S.-J.; Wong, H. S. P. High Performance P-Type Black Phosphorus Transistor with Scandium Contact. ACS Nano 2016, 10, 4672–4677. (25) Szabo, A.; Rhyner, R.; Carrillo-Nunez, H.; Luisier, M. Phonon-Limited Performance of Single-Layer, Single-Gate Black Phosphorus N- and P-Type Field-Effect Transistors. IEEE Int. Electron Devices Meeting 2015, 12.1.1-12.1.4. (26) Lam, K.-T.; Dong, Z.; Guo, J. Performance Limits Projection of Black Phosphorous Field-Effect Transistors. IEEE Electron Device Lett. 2014, 35, 963-965. (27) Yin, D.; Han, G.; Yoon, Y. Scaling Limit of Bilayer Phosphorene FETs. IEEE Electron Device Lett. 2015, 36, 978-980. (28) Cao, X.; Guo, J. Simulation of Phosphorene Field-Effect Transistor at the Scaling Limit. IEEE Trans. Electron Devices 2015, 62, 659-665. (29) Kang, J.; Liu, W.; Sarkar, D.; Jena, D.; Banerjee, K. Computational Study of Metal Contacts to Monolayer Transition-Metal Dichalcogenide Semiconductors. Phys. Rev. X 2014, 4, 031005. (30) International Technology Roadmap for Semiconductors (ITRS), http://www.itrs2.net/, 2013. (31) Liu, F.; Wang, Y.; Liu, X.; Wang, J.; Guo, H. Ballistic Transport in Monolayer Black Phosphorus Transistors. IEEE Trans. Electron Devices 2014, 61, 3871. (32) Allain, A.; Kang, J.; Banerjee, K.; Kis, A. Electrical Contacts to Two-Dimensional Semiconductors. Nat. Mater. 2015, 14, 1195-1205. (33) Wan, R.; Cao, X.; Guo, J. Simulation of Phosphorene Schottky-Barrier Transistors. Appl. Phys. Lett. 2014, 105, 163511. (34) Haratipour, N.; Namgung, S.; Oh, S.-H.; Koester, S. J. Fundamental Limits on the Subthreshold Slope In Schottky Source/Drain Black Phosphorus Field-Effect Transistors. ACS Nano 2016, 10, 3791-3800. (35) Padilha, J. E.; Fazzio, A.; da Silva, A. J. R. Van der Waals Heterostructure of Phosphorene and Graphene: Tuning the Schottky Barrier and Doping by Electrostatic Gating. Phys. Rev. Lett. 2015, 114, 066803. (36) Avsar, A.; Vera-Marun, I. J.; Tan, J. Y.; Watanabe, K.; Taniguchi, T.; Castro Neto, A. H.; 14

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Özyilmaz, B. Air-Stable Transport in Graphene-Contacted, Fully Encapsulated Ultrathin Black Phosphorus-based Field-effect Transistors. ACS Nano 2015, 9, 4138-4145. (37) Cai, Y.; Zhang, G.; Zhang, Y.-W. Electronic Properties of Phosphorene/Graphene and Phosphorene/Hexagonal Boron Nitride Heterostructures. J Phys. Chem. C 2015, 119, 13929-13936. (38) Hu, W.; Wang, T.; Yang, J. Tunable Schottky Contacts in Hybrid Graphene–Phosphorene Nanocomposites. J. Mater. Chem. C 2015, 3, 4756-4761. (39) Datta, S., Electronic Transport in Mesoscopic Systems. Cambridge University Press: Cambridge, England, 1995. (40) Monkhorst, H. J.; Pack, J. D. Special points for Brillouin-zone integrations. Phys. Rev. B 1976, 13, 5188-5192. (41) Perdew, J. P.; Burke, K.; Ernzerhof, M. Generalized Gradient Approximation Made Simple. Phys. Rev. Lett. 1996, 77, 3865-3868. (42) Cao, W.; Kang, J.; Sarkar, D.; Liu, W.; Banerjee, K. 2D Semiconductor FETs Projections and Design for Sub-10 nm VLSI. IEEE Trans. Electron Devices 2015, 62, 3459-3469. (43) Pan, Y.; Wang, Y.; Ye, M.; Quhe, R.; Zhong, H.; Song, Z.; Peng, X.; Yu, D.; Yang, J.; Shi, J.; Lu, J. Monolayer Phosphorene-Metal Contacts. Chem. Mater. 2016, 28, 2100–2109. (44) Zhong, H.; Quhe, R.; Wang, Y.; Ni, Z.; Ye, M.; Song, Z.; Pan, Y.; Yang, J.; Yang, L.; Lei, M.; Shi, J.; Lu, J. Interfacial Properties of Monolayer and Bilayer MoS2 Contacts with Metals: Beyond the Energy Band Calculations. Sci. Rep. 2016, 6, 21786. (45) Ni, Z.; Ma, J.; Ye, M.; Wang, Y.; Quhe, R.; Zheng, J.; Dai, L.; Yu, D.; Shi, J.; Yang, J.; Watanabe, S.; Lu, J. Performance Upper Limit of Sub-10 nm Monolayer MoS2 Transistors. Adv. Electron. Mater. 2016, 2, 1600191. (46) Yoon, Y.; Ganapathi, K.; Salahuddin, S. How Good Can Monolayer MoS2 Transistors be? Nano Lett. 2011, 11, 3768-3773. (47) Datta, S., Quantum Transport: Atom to Transistor. Cambridge University Press: Cambridge, England, 2005. (48)Liu, Y.; Wu, H.; Cheng, H.-C.; Yang, S.; Zhu, E.; He, Q.; Ding, M.; Li, D.; Guo, J.; Weiss, N. O.; Huang, Y.; Duan, X. Toward Barrier Free Contact to Molybdenum Disulfide Using Graphene Electrodes. Nano Lett. 2015, 15, 3030-3034. (49) Deng, Y.; Conrad, N. J.; Luo, Z.; Liu, H.; Xu, X.; Ye, P. D. Towards High-Performance Two-Dimensional Black Phosphorus Optoelectronic Devices: the Role of Metal Contacts. IEEE Int. Electron Devices Meeting 2014, 5.2.1-5.2.4. (50) Wood, J. D.; Wells, S. A.; Jariwala, D.; Chen, K.-S.; Cho, E.; Sangwan, V. K.; Liu, X.; Lauhon, L. J.; Marks, T. J.; Hersam, M. C. Effective Passivation of Exfoliated Black Phosphorus Transistors against Ambient Degradation. Nano Lett. 2014, 14, 6964-6970. (51) Liu, Y.; Stradins, P.; Wei, S.-H. Van der Waals Metal-Semiconductor Junction: Weak Fermi Level Pinning Enables Effective Tuning of Schottky Barrier. Sci. Adv. 2016, 2, e1600069. (52) Farmanbar, M.; Brocks, G. Ohmic Contacts to 2D Semiconductors Through van der Waals Bonding. Adv. Electron. Mater. 2016, 2, 1500405. (53) Chanana, A.; Mahapatra, S. Prospects of Zero Schottky Barrier Height in a Graphene-Inserted MoS2-Metal Interface. J. App. Phys. 2016, 119, 014303. 15

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(54) Farmanbar, M.; Brocks, G. Controlling the Schottky Barrier at MoS2/Metal Contacts by Inserting a BN Monolayer. Phys. Rev. B 2015, 91, 161304. (55) Du, Y.; Yang, L.; Zhang, J.; Liu, H.; Majumdar, K.; Kirsch, P. D.; Ye, P. D. MoS2 Field-Effect Transistors with Graphene/Metal Heterocontacts. IEEE Electron Device Lett. 2014, 35, 599-601. (56) Lee, S.; Tang, A.; Aloni, S.; Philip Wong, H. S. Statistical Study on the Schottky Barrier Reduction of Tunneling Contacts to CVD Synthesized MoS2. Nano Lett. 2016, 16, 276-281. (57) Miao, J.; Zhang, S.; Cai, L.; Scherr, M.; Wang, C. Ultrashort Channel Length Black Phosphorus Field-Effect Transistors. ACS Nano 2015, 9, 9236-9243.

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Table 1. Performance metrics of the SG sub-10 nm ML BP and ML MoS2 SBFETs calculated at ab initio level. EOTs are 0.7 and 0.5 nm in BP and MoS2 devices, respectively. The supply voltage is set to Vdd = Vds = |Vg(on)-Vg(off)| = 0.5 V. The off-state current Ioff is set to be 0.1 µA/µm in term of the ITRS requirements for the HP applications, and the on-state current Ion as the drain current at a fixed gate voltage difference of Vdd from the voltage at which Ioff occurs.

Lg (nm) 10 SG BP-x/Ti

201

2.0×10

122

6.8×101

206

150

3

136

2

146

2

199

3

83

3

121

2

10 7

62

6.2×10

769 493 a

7.7×10 4.9×10

101

1.0×10

234

460

4.6×103

75

300

3

86

3

118

2

195

3

73

5 10

a

7.6×10

5

3 SG MoS2/Ti

76

1.5×10

10 7

45

79

3

2.1×10

68 a

5

SG BP-y/Gr

SS (mV/dec)

3

5 7

SG BP-x/Gr

214

Ion/Ioff

7 10

SG BP-y/Ti

Ion (µA/µm)

157 40 287

3.0×10 1.6×10

4.0×10 2.9×10

3

8

178

1.8×10

93

6

55

5.5×102

155

Ioff = 1 µA/µm.

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Table 2. Comparison of the ballistic performance metrics upper limit of the DG ML BP SBFETs (with graphene electrodes) with the ITRS standards for the HP and LP devices.

DG BP-x/ Gr DG BP-y/ Gr ITRS HP DG BP-y/ Gr ITRS LP a

Lg

EOT

Vdd

Ion

(nm)

(nm)

(V)

(µA/µm)

10 7 5 10 7 5

0.64 0.56 0.49 0.64 0.56 0.49

0.78 0.74 0.69 0.78 0.74 0.69

Ioff (µA/µm)

5449 (4904)

a

5164 (4648)

a

b

730 (657)

0.1

2559 (2303)

a

2543 (2289)

a

1994 (1795)

a

0.25 0.1

0.29

0.042

4

0.24

0.034

3

0.17

0.161

4

0.17

0.051

4

0.14

0.042

4

2.9×10

2.5×10

0.1

2.0×10

0.12

0.042

4

0.93

0.477

9.7

0.56

0.74

1450

0.1

1.5 × 10

7.3

0.49

0.69

1170

0.1

1.2 × 104

0.77

0.451

3

5.1

0.41

0.64

900

0.1

9.0 × 10

0.60

0.423

10

0.59

0.75

1049 (944)a

2 × 10-5

5.2 × 107

0.18

0.129

-5

9.3 × 10

6

0.14

0.155

4.8 × 10

6

0.11

0.247

2.3 × 10

7

7 5

0.45 0.43

0.66 0.65

598 (538) b

a

290 (261)

4 × 10 a

-5 b

6 × 10

-5

10.1

0.54

0.72

461

2 × 10

1.00

1.556

7.0

0.45

0.66

337

4 × 10-5

8.4 × 106

0.77

1.514

259

-5

6

0.69

1.493

5.9

0.41

0.64

5 × 10

5.2 × 10

Estimated value with inclusion of the electron-phonon scattering in terms of the calculated

ballisticity of 90% for Lg = 10.5 nm 25. b

(ps)

2.6×10

0.1

τ

(fF/µm)

5.2×10 b

Cg

4

5.4×10

0.1

a

Ion/Ioff

Ioff = Imin.

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Figure 1. Device structures and performances of the SG ML BP SBFETs. (a-d) Schematic models of the SG ML BP SBFETs using (a-b) Ti and (c-d) graphene as electrodes, respectively. The red rectangles in (c-d) indicate the supercells of graphene and BP heterostructures. (e-h) Anisotropic transfer characteristics of the SG ML BP SBFETs with (e-f) Ti and (g-h) graphene electrodes, respectively. The bias voltage is Vds = -0.5 V. BP-x and BP-y: the transport directions are along the x- and y-directions of BP, respectively.

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Figure 2. (a,c) Spatial resolved local density of states (LDOS) and (b,d) transmission possibilities in the SG ML BP SBFETs. The gate and bias voltages are Vg = Vds = 0 V. In panels (b) and (d), the red curves are folded band structure of the (1×3) ML BP supercell with an artificial energy offset for a better comparison. Metal induced gap states with an extension of 7 nm are apparent with Ti as electrodes.

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Figure 3. Device performance of the graphene contacted SG ML BP SBFETs. (a) LDOS of a 7-nm y-directed SG ML BP SBFET at points I and II, as labeled by the red rectangles in (b). Red and blue arrows show hole and electron transports, and solid and dashed arrows stand for a higher and lower current density, respectively. (b) Transfer characteristics. Inset: Transmission eigenstates (k = (0, 0) and E = Ef) at points I and II, respectively. The isovalue is 0.05 a.u.. (c) Output characteristics.

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(a)

(b)

(c)

104

103

DG BP-y /Gr

7x102

7x10

CNT

SG BP-x /Gr

DG BP-x MOS

3

103

4x103

4x102

Ion (µA/µm)

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DG BP-x /Gr

7x102

DG BP-y /Gr

4x102

DG BP-y MOS

DG BP-y /Gr Si NW ITRS HP

103

SG BP-y /Gr

10

7x101

Si Fin 2

UT SOI

SG MoS2 /Ti

1

4x10

5

7

Lg (nm)

DG MoS2 /Ti

DG MoS2 /Ti

Si NW 2

102

2

4x10 Si Fin

9

ITRS LP

DG BP-x /Ti

7x102

2

7x101

DG BP-y /Ti

5

7

9

Lg (nm)

5

7

9

Lg (nm)

Figure 4. Benchmark of the intrinsic on-state currents of the ML BP and ML MoS2 SBFETs [44] obtained at the ab initio level against (a) the experimental advanced Si MOSFETs and CNT SBFETs, (b-c) and the ITRS HP and LP standards. For the sake of comparison, the intrinsic on-state currents of the DG ML BP MOSFETs are also shown in (b-c). The data are compared under a supply voltage of 0.5 V in (a) and the ITRS standard in (b-c).

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