Composition, Microstructure, and Electrical Performance of Sputtered

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Composition, Microstructure and Electrical Performances of Sputtered SnO Thin Film for p-Type Oxide Semiconductor Seung Jun Lee, Yoon Jin Jang, Han Joon Kim, Eun Suk Hwang, Seok Min Jeon, Jun Shik Kim, Taehwan Moon, Kyung-Tae Jang, Young-Chang Joo, Deok-Yong Cho, and Cheol Seong Hwang ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.7b17906 • Publication Date (Web): 11 Jan 2018 Downloaded from http://pubs.acs.org on January 12, 2018

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ACS Applied Materials & Interfaces

Composition, Microstructure and Electrical Performances of Sputtered SnO Thin Film for pType Oxide Semiconductor Seung Jun Lee1, Younjin Jang 1, Han Joon Kim1, Eun Suk Hwang1, Seok Min Jeon1, Jun Shik Kim1, Taehwan Moon1, Kyung-Tae Jang1, Young-Chang Joo1, Deok-Yong Cho2, and Cheol Seong Hwang1* 1

Department of Materials Science & Engineering, and Inter-University Semiconductor

Research Center, Seoul National University, Seoul, 151-744, Republic of Korea 2

IPIT & Department of Physics, Chonbuk National University, Jeonju, 54896, Republic of

Korea

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ABSTRACT P-Type SnO thin films were deposited on Si substrate by a co-sputtering process using ceramic SnO and metal Sn targets at room temperature without adding oxygen. By varying the DC sputtering power applied to the Sn target while maintaining the RF power to the SnO target constant, the Sn:O ratio could vary from 56:44 to 74:26 at the as-deposited state. After the thermal annealing at 180 oC for 25 min under air atmosphere using a microwave annealing system, the films were crystallized into the tetragonal SnO while the Sn:O ratio became from 44:56 to 57:43. Notably, the metallic Sn remained when the Sn:O ratio was higher than 55:45 at annealed state. When the ratio was lower than 55:45 at annealed state, the incorporated Sn fully oxidized to SnO making the films useful p-type semiconductors, while the films became metallic conductors at the higher Sn:O ratios. At the Sn:O ratio of 55:45 at annealed state, the film showed the highest Hall mobility of 8.8 cm2V-1s-1 and hole concentration of 5.4 x 1018 cm-3. Interestingly, the electrical conduction behavior showed trap-mediated hopping when the Sn metal was co-sputtered, whereas the single SnO film showed regular band conduction behavior. The compressive stress effect could interpret such property variation originated from the sputtering power and post oxidation-induced volumetric effects. This report makes a critical contribution to the in-depth understanding of the composition-structure-property relationship of this technically important thin film material.

KEYWORDS: p-type SnO, Co-sputtering, Oxidation, Stress, Carrier concentration, Mobility


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INTRODUCTION The SnO thin film is the leading candidate material as a channel layer in p-type oxide thin film transistor (p-OTFT), which is necessary for fabricating the complementary TFT circuit.1– 4

In p-OTFT, the carriers (holes) are readily generated through the formation of metal

vacancies, e.g., Sn-vacancy (VSn) in SnO, but their mobility in the valence band (VB) is generally lower than that of electrons in the conduction band (CB) in n-type OTFT (nOTFT).5–8 The lower hole mobility constitutes one of the most significant problems in fabricating high-performance p-OTFT. In SnO, however, the significant hybridization of Sn 5s and O 2p orbitals in VB contributes to the higher hole mobility making the material promising for p-OTFT.9–11 Nonetheless, the thermodynamic stability of SnO over that of SnO2 is lower making the stable SnO thin film deposition rather challenging.12–14 Since the holes are generated by the formation of VSn through Eq. (1), oxygen-ambient annealing is a preferred condition to form the Sn-deficient (or oxygen-rich) SnO. SnSn SnS + VSn″ + 2h+

(1)

, where SnSn, SnS, VSn″, and h+ represent lattice Sn in SnO, surface Sn, and (effectively) doubly negatively ionized VSn, and hole, respectively. Also, in contrast to the amorphous nOTFT materials, such as InGaZnOx, SnO thin film should be well crystallized to achieve high performance, indicating that crystallization annealing at a rather high temperature is necessary.15–16 However, such an annealing process always involves the risk of overoxidation converting the material to n-type SnO2 at least on the film surface. In order to avoid such a problem, two methods have been exploited to deposit the p-type SnO stably. One is to use the co-sputtering process of SnO and Sn, where the appropriate control of respective powers to the two targets has produced a highly promising p-type SnO film. The incorporated metallic Sn appears to intake some of the excessive oxygen during the 3 ACS Paragon Plus Environment


post-deposition annealing (PDA) step alleviating the possibility of the SnO2 formation. The other is to use a self-limited atomic layer deposition (ALD) process adopting metal-organic precursor containing Sn2+ ions, such as bis(1-dimethylamino-2-methyl-2propoxy)tin(II), and H2O as the oxygen source, of which oxidation potential is not too high to change the metastable Sn2+ to stable Sn4+ during the ALD process.17–18 While the latter is a promising chemical method to grow high quality and conformal p-type SnO film, it has a limited capability of controlling the Sn:O ratio compared with the co-sputtering process. Meanwhile, the co-sputtering process also contains a conceptual difficulty because the incorporation of excessive metal (Sn) tends to result in the oxygen-deficient layer, which is unfavorable for fluent hole generation, and the involved oxygen vacancies (VO) may scatter the holes degrading the carrier mobility.19 However, interestingly enough, the recent experimental results on the co-sputtering clearly indicated that there is an optimum range of excessive Sn composition where the p-type semiconductor performance is maximized, i.e., high carrier concentration and mobility are simultaneously achieved.19 Therefore, it is impending to examine the composition-structure-property relationship in co-sputtered SnO film to fully utilize the material for fabricating the high-performance p-OTFT. There are also many reports on the fabrication of SnO phase film using reactive sputtering of Sn target under varying sputtering gas composition (O2/(O2+Ar)).2, 19–21 However, this type of process has a rather limited process window to achieve the single-phase SnO film. The method adopted in this work, i.e., the co-sputtering process of SnO and Sn, provide a reliable method to achieve the SnO film without involving the high risk of SnO2 phase even after the annealing under the air atmosphere for the relatively loosely optimized conditions. In this work, therefore, the SnO films containing metallic Sn were co-sputtered on the bare Si substrate (with ~1nm-thick natural SiO2) using ceramic SnO and metal Sn targets under pure Ar gas plasma atmosphere, which allowed the authors to achieve films with Sn:O atomic 4 ACS Paragon Plus Environment

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ratio ranging from 56:44 (at zero power to Sn target) to 74:26 (at 70 W power to Sn target). In this set of experiments, the DC sputtering power to the Sn target was varied from 0 to 70 W, while the RF power to the SnO target was fixed at 80 W. The films with higher DC power to Sn target contained a higher concentration of metallic Sn, which prohibited the thin films to show any semiconductor properties. Therefore, the films were post-annealed to change the metallic Sn to SnO under the air atmosphere using a microwave annealing system. Since the total power to grow the films were varied, and solid Sn component was converted to SnO by the PDA, the stress on the films (mostly in-plane compressive) varied quite significantly. It was unveiled that the involvement of such compressive stress, and consequent variations in the VSn-concentration and other microstructural effects, caused almost all the variations in the physical and electrical properties of the SnO film as a p-type oxide semiconductor. The optimized SnO film showed a hole concentration and a mobility of 5.4 x 1018 cm-3 and 8.8 cm2V-1s-1, respectively, estimated by the Hall measurement, which are highly promising values to fabricate high-performance p-OTFT.

EXPERIMENTAL METHODS Figures 1a and b show the schematic diagrams of the co-sputtering system and microwave annealing chamber, respectively. The two targets were inclined to the substrate surface, and substrate holder was rotated at 14 round per min speed to make the film uniform over the surface area of a diameter ~5 cm. Typical film thickness was ~30 nm, where the precise thickness was estimated by X-ray reflectivity (XRR, X'pert Pro, PANalytical), which could be achieved by controlling the total deposition time for the different DC power to the Sn target (purity: 99.99%, Thifine, Incheon, Korea; 0 – 70 W) while the RF power to the SnO target remained constant (purity: 99.99%, Toshima, Tokyo, Japan; 80 W). The substrate was 5 ACS Paragon Plus Environment


not intentionally heated, and pure Ar gas with a working pressure of 1.5 mTorr was used as the sputtering gas. PDA was performed using a microwave (2.45 GHz) annealing system (SUX-02, Unicera, Korea). Microwave annealing was used to heat up the film from the interior, especially from the incorporated metallic Sn, which was proven to be efficient to crystallize the film and oxidize Sn to SnO without inducing serious SnO2 formation on the film surface. Through the several screening experiments, the optimized PDA condition was determined to be 180 oC of substrate temperature for 25 min under the air atmosphere for the 30 nm-thick films. Under this condition, the excessive surface oxidation was feasibly suppressed while the internal heating and oxidation of metallic Sn were sufficient to achieve useful p-type SnO films for the DC Sn target power ≤ 40 W (Sn:O ratio = 71:29 at asdeposited state). For the films with the higher Sn:O ratio, the remaining metallic Sn constituted metallic percolation path making the film metallic conductor, which is not useful for p-OTFT. Most of the films were deposited on p-type Si wafer with a thickness of 600 µm, which has a native oxide (~1 nm thickness), except for the films for the electrical measurements and stress measurements. For the stress measurement using the wafer curvature method, the thinner Si wafer (100 µm thickness) and thicker films (100 nm thickness) were necessary to induce sufficient curvature to measure. To completely exclude the possible contribution from the Si substrate during the measurements of the electrical properties, 100nm-thick films were grown on silica glass (Eagle XG) under the identical conditions. The stress levels of the films grown on the silica glass could not be measured due to the too small curvature of the samples (owing to the high thickness (700 µm) and stiffness of the Eagle XG glass), but the similar structural analysis results of the films indicated that the different types of substrate did not critically influence the growth characteristics and phase-evolution during the post-deposition annealing. The thicker films (100 nm) were


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necessary because the 30nm-thick films showed too high resistivity to acquire reliable Hall coefficients. As-deposited and annealed films were characterized using XRR (X'pert Pro, PANalytical) for film density, grazing angle incidence X-ray diffraction (GIXRD, X'pert Pro, PANalytical) for crystal structure, X-ray fluorescence spectroscopy (XRF, Quant'X, Thermo SCIENTIFIC) for layer density of Sn, X-ray photoelectron spectroscopy (XPS, AXIS-HSi, KRATOS) for oxidation state analysis, atomic force microscopy (AFM, JEOL, JSPM-5200), and Auger electron spectroscopy (AES, PHI-700, ULVAC-PHI) for depth profiling, and scanning electron microscopy (SEM, SU9000, Hitachi) for microstructure analysis. High-resolution transmission electron microscopy (HRTEM, JEM-2100F, JEOL) was used to further examine the internal structure of the films. The TEM samples were fabricated by mechanical grinding down to ~1 µm thickness and final thinning by mild ion milling, which involves minimal adverse effect from the sample fabrication process. The residual film stress was estimated using the kSA-MOS system. Carrier concentration and mobility were estimated by four-point probe measurement and Hall-measurement using Van der Paw pattern (HMS-3000, Ecopia). The Hall measurement was performed at temperatures ranging from room temperature to 400 o

C.

RESULTS AND DISCUSSIONS Table I shows the variations in the atomic ratio (Sn:O) of the films deposited under the different Sn DC power conditions at the as-deposited and after the PDA states. These data could be achieved using XRF, which could only detect the Sn atomic layer density, and AES, which could detect oxygen as well as the Sn, and interpolation between the different conditions. The as-deposited film at zero Sn DC power has a slightly Sn-rich composition 7 ACS Paragon Plus Environment


(56% of Sn), but the film with the highest Sn DC power has a Sn concentration as high as 74%. After the PDA, all of the film compositions become closer to the ideal 50:50, but rather significant variations remained. The film with the zero Sn DC power now has a slightly oxygen-rich composition (56% of O), and oxygen concentration of the film with the highest Sn DC power increases from 26% at the as-deposited state to 43% after the PDA by oxidation of the excessive Sn. Figures 2a and b show the GIXRD patterns of the 30 nm-thick films with the different Sn:O ratios at the as-deposited and PDA state, respectively. The thickness numbers in each graph show the estimated film thickness from the XRR fitting. The as-deposited films did not show any notable diffraction peaks when no additional Sn was sputtered, suggesting low crystalline quality film. However, as the DC power to the Sn target increases clear peaks corresponding to metallic Sn emerge (JCPDS No. 04-0673), suggesting that the SnO phase is still not well crystallized and crystallized metallic Sn is incorporated. The PDA efficiently crystallized the film into mostly SnO phase (JCPDS No. 06-0395). However, when the DC power to the Sn target was ≥ 40 W (Sn:O ratio = 55:45 at annealed state), the film still contained metallic Sn peaks indicated by the red A and B characters in Figure 2b. As mentioned previously, these films show metallic conductivity, so they are not of high interest in this work. The films grown with 0 W and 40 W DC power to Sn target represent two typical p-type SnO films, but with highly distinctive properties as discussed later. As the DC Sn power increases, the relative peak intensities of SnO (101) and (110) change possibly due to the different stress levels, microstructural evolution, and the influence of Si substrate with increasing the Sn content during the PDA as discussed below. However, the full-width-at-half-maximum value, which is related to the average grain size of SnO, did not show a notable trend. In contrast, the lattice parameters of the tetragonal SnO phase, estimated from the peak positions, vary quite significantly. The GIXRD patterns of ~100nm-thick films at the as-deposited state and 8 ACS Paragon Plus Environment

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after the PDA at 180 oC were acquired as shown in Figure 2c to confirm that the evolutions of phases during the film growth and PDA on the Si and glass substrates are identical. While the peak intensities and their relative ratios are different from the thinner films (~30 nm), the almost identical patterns of the films on Si and glass substrates for the given conditions indicated that the two substrates did not have a substantial influence on the phase evolution. Figures 3a – d show the variations in the lattice parameters (a), (c), unit cell volume (a2c), and tetragonality (c/a), respectively, as a function of DC power to Sn target of the film after the PDA. Also shown in each graph are the bulk values (orange dashed lines). 22 SnO (110) diffraction peak position was used to calculate parameter a first, and SnO (101) diffraction peak position was then used to calculate parameter c in conjunction with the previously acquired parameter a using standard Bragg’s diffraction equation for tetragonal structure. The a values are almost independent of the Sn DC power and show ~0.378 nm, which is lower than the bulk value (0.3801 nm) by approximately 0.5%, whereas c values vary significantly and complicatedly according to the Sn DC power values. Up to 10 W, it increases rapidly with the increasing Sn DC power but slightly decreases up to 40 W and nearly saturated at ~0.490 nm afterward. However, all the c parameters are higher than the bulk value (0.4835 nm), resulting in the unit cell volume larger than the bulk value (0.0698 nm3) except for the case of zero Sn DC power case as shown in Figure 3c. The tetragonality is also higher than the bulk value (Figure 3d). The origin of these structural variations can be understood from the variation in the stress. Figure 4a shows the variation of the in-plane stress of the 30nm-thick films at the asdeposited (black square) and after PDA (red circle) states. The as-deposited film with zero Sn DC power showed slightly tensile stress state, indicating that the film has rather porous columnar structure, which will be corroborated by the film density data (XRR) and microstructure (SEM) later. As the Sn DC power increases, the film stress changes to the 9 ACS Paragon Plus Environment


compressive value and monotonically increases up to ~150 MPa at the highest Sn DC power region. This effect can be understood from the general theory of stress evolution in the sputtering process; as the total sputtering power increases energetic particle bombardment increases and the film develops compressive stress.23–25 However, at the highest Sn DC power region, the excessive inclusion of ductile Sn phase mitigates the stress evolution, and the stress levels decrease. It is generally expected that the PDA decreases the stress level by lattice relaxation, which is inconsistent with the experimental results shown in Figure 4a. For zero Sn DC power case, the film develops very high compressive stress, which becomes as high as ~380 MPa. This behavior can be understood from the drastic densification of the film accompanied by the crystallization. Figure 4b shows the variations in the film density estimated by XRR for the as-deposited (open black square) and PDA (closed black square) films as a function of the Sn DC power. As can be readily expected from the higher concentration of Sn over O with the increasing Sn DC power and given thickness (~30 nm), the heavier weight of Sn than that of O results in the higher film density for both as-deposited and annealed films. However, there is a critical difference in the density evolution of the films with lower (< 30 W) and higher (> 30 W) Sn DC power regions. In the lower Sn DC power region, the film density abruptly increases after the PDA (most notably at zero power), but in the higher power region, there is almost no increase in the film density. Figure 4b also contains the data for the 30nm-thick as-deposited and PDA samples grown on a glass substrate. They show consistent data to the films on the Si substrate. The quantitative densities of the films on the Si and glass substrates under the identical conditions are tabulated in Table II. From the tensile stress state of the as-deposited film under zero Sn DC power condition and slightly Sn-rich composition, it can be expected that the rather porous material absorbs quite a large amount of oxygen, perhaps through the formed grain boundaries, which would have 10 ACS Paragon Plus Environment

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expanded the unit cell volume. However, as can be seen from the first data point of Figure 3c, the unit cell volume of this annealed film is the smallest among the experimented films. This is perhaps due to the lack of metallic Sn, which would have worked as the stress absorber. Therefore, the film must evolve into the highly compressively stressed state during the PDA as shown in Figure 4a. In contrast, the compressive stress of as-deposited films grown with the Sn DC power of 10 W and 20 W decreases after the PDA, which could be understood from the thermal relaxation of the sputtering-induced stress. However, the compressive stress of the films grown with the Sn DC power > 30 W increases rather significantly after the PDA. This peculiar effect can be understood from the substantial oxidation of the incorporated Sn. The intake of oxygen can increase the internal volume of the material and the compressive stress despite the possible involvement of the thermal annealing effect of the already oxidized as-deposited SnO phase. Such a large increase in compressive stress also changes the crystallization kinetics which may influence the evolution of the grain orientation as shown in Figure 2b. The largest unit cell volume after the PDA was achieved when the Sn DC power was 10 W (Figure 3c), which corresponds to the lowest compressive condition (Figure 4a). This larger unit cell volume might be regarded as the film-microstructureinduced characteristic value of these sputtered SnO phases, which might be ascribed to several features of the film, such as the surface energy and grain size effects. As the film stress increases in the compressive direction, by either decreasing or increasing the Sn DC power, the unit cell volume decreases from this highest value by decreasing mostly c lattice parameter. Considering the layered structure of SnO, where the atomic packing along the adirection is higher than along the c-direction, such structural variation according to the stress evolution can be understood. Nonetheless, the stress and lattice structure evolution for the zero Sn DC power and non-zero DC power (ca. 40 W) results in highly disparate electrical performance evolution as shown later. It should also be noted that even the highest density 11 ACS Paragon Plus Environment


film, which still contains metallic Sn, shows a value lower than the bulk SnO (an orange dashed line). 26 The film with the highest performance (40 W Sn DC power as shown later) still has only ~95% of bulk density, indicating that there could be a further improvement by further optimization. Figure 4c shows the variations in the total layer density of Sn, estimated by XRF, which obviously shows the increasing Sn layer density with the increasing Sn DC power. Since the total film thickness was adjusted to commonly ~30 nm, the trend must be consistent with the film density plot estimated by XRR (Figure 4b), which is indeed the case. PDA did not induce any notable changes in Sn-layer density, which is a quite reasonable consequence of the low vapor pressure of Sn under the adopted PDA condition. Figures 5a – f show the bird-eye-view SEM images of the as-deposited films with the Sn DC power of 0, 5, 10, 20, 30, and 40 W, respectively. The films show smooth and uniform morphology with no notable morphological features even for the films containing rather high Sn portion. However, the increased power improves the adatom mobility on the surface and increases the cluster (or grain) size. Figures 6a – f show the similar SEM images of the films corresponding to Figure 5 after the PDA. While the film with zero Sn DC power maintains uniform and smoother surface morphology, the films with higher Sn concentration show irregular surface morphology containing large protrusions. From the morphological features, it can be conjectured that the included Sn clustered in the as-deposited state first agglomerate and smeared out toward the surface and then oxidized. This sequence of Sn-agglomeration and oxidation can be further confirmed from the PDA temperature dependent electrical properties shown later. As can be imagined from the disconnected shapes of these surface protrusions, the electrical transport of the film, if it is of p-type semiconducting, could be still governed by the more uniform-looking matrix phase portion. The possibility that the large portions of the protrusion still contain remaining metal Sn inside them, which may adversely interfere with the emergence of the p-type semiconductor property as it was the case for the 12 ACS Paragon Plus Environment

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even higher Sn portion films, cannot be completely disregarded. The morphological feature of these large grains (intervened between the uniform and smaller SnO grains as well as located on the film surface) hints that these inclusions increase the in-plane compressive stress, which was indeed the case in Figure 4a. The morphological evolution of the 30nmthick films grown on the Si and glass substrates under the conditions of 0W and 40 W Sn DC powers, respectively, were compared using topographic AFM images as shown in Figure 7. They also indicate that the different types of the substrate do not have a significant impact on the film morphology. The microstructure was further examined by TEM, but the chemical properties are explained beforehand. Figures 8a and b show the Sn 3d and O 2p XPS spectra of the films up to the Sn DC power to 40 W after the PDA, respectively. To avoid the confusion from the contamination and possible oxidation of the film surface during the air exposure before the XPS analysis, the thin surface layer (2-3nm) was in-situ etched using accelerated (1kV) Ar+ ion before the spectrum acquisition. The Sn 3d peaks could be deconvoluted to two components with binding energies of 484.7 eV (Sn0) and 486.2 eV (Sn+2), without involving the peak at 486.9 eV which corresponds to Sn+4 even for the zero Sn DC power case.27–29 The binding energy was calibrated with the C 1s peak position (284.6 eV). Therefore, it can be understood that the possible formation of SnO2 was well suppressed under the entire process conditions. The Sn0/( Sn0+Sn+2) peak area ratio was plotted in Figure 8c, where the increasing trend with the increasing Sn DC power is obvious. Interestingly, the ratio was rather invariant at ~15 % within the DC power range of 10 – 30 W, but increases again at 40 W, suggesting that the oxidation kinetics is rather complicatedly influenced by the stress and composition. Although the Sn0 peak portion is as high as ~18% at 40 W condition, the film still showed p-type semiconducting conductivity, suggesting that these Sn0 clusters do not form the percolation 13 ACS Paragon Plus Environment


path. O 2p XPS peak in Figure 8b could be deconvoluted with two peaks having binding energies of 530.1 eV (bulk oxygen in SnO) and 531.8 eV (surface chemical adsorption), and their relative ratio did not show any notable changes with Sn DC power. The Sn 3d and O 2p peak areas were integrated and converted to the atomic ratio using the sensitivity factor of the XPS equipment, and the results are included in Figure 8b. The as-deposited film with zero Sn DC power had a Sn:O ratio of ~56:44, but it becomes ~44:56 after the PDA, supporting the further oxidation of the residual Sn and oxygen incorporation. For the case of the Sn DC power of 40 W, the as-deposited film had a Sn:O ratio of ~71:29, but it becomes ~55:45 suggesting the significant oxidation of the incorporated Sn occurred during the PDA. AES depth profile results further corroborate these findings. Figures 9a and b show the depth profile results of the as-deposited and PDA films, respectively, when zero Sn DC power was adopted. According to the XPS results, the surface becomes slightly oxygen-rich after the PDA, although the overall uniform profile was mostly retained. The longer sputteretching time to reach the substrate (Si wafer in this case) after the PDA (~ 6 min) compared with the as-deposited film (~5 min) corroborates the densification of this film during the PDA (Figure 4b). By contrast, the film with 40 W Sn DC power shows a drastic change in the depth profile before and after the PDA (Figures 9c and d). First, at the as-deposited state, the film has obviously higher oxygen concentration on the surface compared with the bulk region, suggesting that the metallic portion on the surface is partly oxidized during the air exposure. The long tailing of the Sn and O profiles into the Si substrate region implies that the film consists of regions with different etching properties (mostly SnO and Sn regions) under the Ar ion bombardment during AES depth profile. This is consistent with the emergence of metallic Sn peak in the GIXRD pattern even at the as-deposited state (the remaining SnO region is mostly disordered). However, after the PDA, the film showed almost identical depth profiles, with slightly higher Sn concentration, across the entire 14 ACS Paragon Plus Environment

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thickness to the zero Sn DC power case. Because the area with a diameter of several tens of µm can be probed using the AES, this result cannot discriminate the chemical composition of the uniform region and protruded regions in Figure 6f. Therefore, TEM analysis was performed to further identify the chemical and structural natures of the two regions. Figures 10a and b show the HRTEM image of the cross-section of the as-deposited and PDA film, respectively, with the Sn DC power of 40 W. The as-deposited film shows mostly crystallized polycrystalline microstructure with columnar shape grains, which corroborates the GIXRD results and SEM images above. There are remaining amorphous-like regions between the grains, suggesting incomplete crystallization of the entire film. Careful examination of the lattice fringes and fast-Fourier transformation (FFT) shows the presence of crystallized metallic Sn inclusions, as indicated by the yellow square and its FFT image in Figures 10c and d. The amorphous-like regions almost disappear suggesting the enhanced crystallization to the SnO phase after the PDA. The large protruded region on the film surface was identified as the crystallized SnO, as can be understood from the enlarged HRTEM and FFT images in Figures 10e and f, which corresponds to the red squared region in Figure 10b. The careful examination of the bulk region of the film revealed that a small portion of the metallic Sn is remained, as indicated by the yellow squared region and its FFT image in Figures 10g and h. However, the probability of finding such region was quite a low suggesting that these regions are isolated, so may not induce metallic electrical conduction through the film. Figures 11a and b show the low magnification of the annular dark field image achieved in the scanning TEM mode (STEM), which was also used to acquire the elemental mapping results using energy dispersive spectroscopy (EDS) of the two films in Figure 10. While the as-deposited film did not show any notable features (Figure 11a), the image of the film after 15 ACS Paragon Plus Environment


PDA (Figure 11b) clearly indicates the presence of surface protrusions (indicated by white arrows). The EDS mapping results of Sn and O of the PDA film from the area enclosed by the white rectangle in Figure 11b, shown in Figures 11c and d, respectively, clearly indicate that these protrusions are mostly composed of Sn and O, suggesting that these are SnO. Due to the limited spatial resolution and thick thickness of the TEM specimen, it was not possible to discern the metallic Sn phase from the bulk region of the film. However, the HRTEM image revealed that there are remaining Sn inclusions within the film even after the PDA. Next, electrical properties of the films are discussed. The films shown in Figures 9b and d were taken as the representative films without extra-Sn and with extra-Sn, and the Hall measurement examines their semiconducting properties. To further identify the possibly different trends of the two films, they were also annealed at different temperatures (50 – 400 oC), and Hall measurements were performed at measurement temperatures ranging from room temperature to 300 oC. Figure 12 shows the overall electrical behaviors of the PDA films of all the tested samples, where the black circle, blue square, and red triangle symbols represent hole concentration, Hall mobility, and resistivity, respectively. The as-deposited films were either too insulating (low Sn DC power) or metallic conducting (highest Sn DC power) and none of them showed reasonable p-type conductivity. Also, as previously mentioned, the films grown with Sn DC power higher than 50 W showed metallic conductivity possibly due to the involvement of Snpercolated path even after the PDA, so they are not of concern in this research. When the Sn DC power was lower than 40 W, all the films show reasonable p-type conductivity of which detailed parameters are summarized in Table III. An interesting finding was the abnormal trends of hole concentration and Hall mobility. In a usual crystalline semiconductor, for the other given conditions, the higher the carrier concentration gives the lower Hall mobility due to the increased carrier-to-carrier scattering. In this experiment, the 10 W Sn DC power 16 ACS Paragon Plus Environment

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condition produced the lowest hole concentration (~3 x 1017 cm-3), and the Hall mobility is ~2.8 cm2V-1s-1, which are typical values for sputtered SnO film,30–32 and this film may be taken as the reference film with lowest VSn concentration in this experiment. When the Sn DC power decreases to zero W, the carrier concentration increases to ~1.2 x 1018 cm-3 and the Hall mobility decreases to ~1.5 cm2V-1s-1. The increase in the hole concentration could be ascribed to the increased VSn under this condition due to the lack of excess Sn and incorporation of oxygen during the PDA. The Hall mobility accordingly increases, which coincide with the behavior of a normal crystallized p-type semiconductor. However, as the Sn DC power increases to 40 W, the hole concentration also increases to ~5.4 x 1018 cm-3, which is inconsistent with the general conjecture that the co-sputtered Sn atoms are incorporated into the crystallized SnO grains and decrease the hole concentration. An even further unusual finding is that the mobility also increases up to ~8.8 cm2V-1s-1 along with the increasing hole concentration with the increasing Sn DC power, which cannot be expected from a normal band conducting semiconductor. The simultaneous increase in the carrier mobility and concentration has been extensively reported in n-type amorphous oxide semiconductors, such as ZnSnO, InGaO or InGaZnO.33–36 The well-accepted theory for these cases is that the carriers hop between the trap sites at the mobility edge, rather than the normal conduction within the conduction band.34–36 As the carrier concentration increases, the most mobile carriers become to have lower effective trap depth improving the hopping probability. Therefore, the similar effect must be invoked in this work although the majority carrier is a hole, not an electron. The increased hole concentration with the increasing Sn DC power is an unexpected result because the increased Sn concentration in the SnO may result in the decreasing VSn which must be accompanied by the decreasing hole concentration. Since the SnO film is so highly compressed, by the oxidation of the internal Sn, either oxygen or Sn must be extracted to accommodate the stress. Under the given condition of oxidation 17 ACS Paragon Plus Environment


environment, Sn must be liberated, and the VSn could be induced, which is the only feasible explanation for a more p-type character for Sn-rich film. Several other factors, such as the grain size and their orientation, may influence the detailed electrical properties of the film, but none of them can induce the peculiar feature of the more Sn the more p-type property. To further confirm the different behaviors of the two regions of Sn DC power, the films with zero DC power and 40 W were selected and Hall measurements were performed after the films were annealed at different temperatures (50 – 400 oC) under the identical air atmosphere and time duration (25 min). Figures 13a and b show the results for the zero and 40 W DC power films, respectively. For the former film, the film was not sufficiently crystallized, and no carriers were generated when the PDA temperature was below ~180 oC, and a too high PDA temperature (> 250 oC) may induce too much oxidation, and again no carriers can be generated. In the middletemperature region (180 – 250 oC) the film showed reasonable p-type conductivity with the decreasing carrier concentration and increasing Hall mobility with the increasing PDA temperature. This finding confirms that this film works as a normal valence band conducting p-type semiconductor. In contrast, the 40 W Sn DC power film shows a complicated PDA temperature behavior. At temperatures below ~150 oC, the film was mostly metallic due to the percolation of the incorporated Sn, which are not oxidized yet due to the low PDA temperature. At PDA temperatures higher than ~300 oC, the excessive oxidation of the film makes the film too resistive to be used as a useful semiconductor. Therefore, as for the other case, the useful PDA temperature region was determined to be 180 – 250 oC. However, the increasing PDA temperature decreases the carrier concentration which is consistent with the other case, but it is accompanied by the decreasing Hall mobility. In fact, such trend is maintained within the high PDA temperature region, suggesting that this film contains a high density of traps near the VB edge, making the film rather disordered p-type semiconductor. 18 ACS Paragon Plus Environment

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This peculiar behavior must be related to the oxidation of incorporated Sn during the PDA, which increased the compressive stress. To further understand these critical differences in the electrical performances, the Hall measurements were performed at different measurement temperatures to identify the possible band conduction in the former case and hopping conduction in the latter case. Figures 14a and b show the results of the Hall test from the two samples in Figure 13 after the PDA at 180 oC, respectively, when the test was performed at temperatures from room temperature to 300 oC. The measurement was performed under the air ambient with increasing temperature, and the entire test sequence requires more than 4 hrs per sample. Therefore, the risk of oxidizing the film cannot be disregarded, and the transition of both films into the n-type semiconductor at temperatures higher than 180 oC indeed indicates that the significant oxidation of the films has occurred during the Hall measurements. Therefore, the data in the high-temperature region should not be taken to have the significance regarding the purpose of this work. At lower temperature regions, the two films show consistent behaviors to the data shown above. For the film grown with the zero Sn DC power, the carrier concentration decreases with the increasing temperature, which is inconsistent with the usual band conducting semiconductor. Therefore, the oxidation of the film to the SnO2 phase (at least on the film surface) still plays a role to produce traps or to decrease carrier concentration, which is consistent with the absence of excessive Sn. The increasing Hall mobility, however, with the decreasing hole concentration clearly reveal that this is a typical band conduction semiconductor. For the case of the film grown with the 40 W of Sn DC power shows an opposite trend in carrier concentration with the increasing Hall measurement temperature, i.e., it increases with the increasing temperature up to 175 oC. While the possible oxidation of the film into the undesired SnO2 might be suppressed by the absorption of oxygen into the remaining Sn 19 ACS Paragon Plus Environment


metallic phase, the thermal activation of the carriers from the deep trap state to shallower traps or even to the valence band induced the abrupt carrier concentration increase. This is accompanied by the slight increase in the Hall mobility up to 100 oC, which is consistent with the hopping conduction mechanism near the mobility edge. An interesting finding could be made in the measurement temperature range from 125 to 175 oC, where the Hall mobility decreases with the increasing hole concentration, which is consistent with the band conduction behavior. This appears a reasonable consequence of the carrier excitation from the deep level to the valence band at such high-temperature region, i.e., when the carrier concentration reaches to a level ~5 x 1019 cm-3, the shallow traps are fully saturated with the thermally excited carriers, and further generated carriers move into the valence band and conduct electricity via the band conduction mechanism. Finally, to estimate the possible correlation between the disparate electrical behaviors of the two types of films with their stress, the stress evolution of the two films as a function of PDA temperature was estimated. In this case, thicker 100 nm-thick films were sputtered under the zero and 40 W Sn DC power conditions on 100 µm-thick Si wafer to achieve even more accurate results and see thickness effects. The results are summarized in Figure 15 for the films after the PDA at temperatures ranging from 180 to 250 oC for 25 min in an air atmosphere. Apart from the results in Figure 4a, all the films are under the tensile stress condition, suggesting that the thicker films were more effectively influenced by the porous microstructure effect, i.e., the open region between the crystallized grains attracts the grains to each other (zipping stress).37–39 However, even under this circumstance, the film with 40 W Sn DC power condition has lower tensile stress, which must be due to the compensation effect by the possible compressive stress effect induced by the oxidation of excess Sn during the PDA. This means that the SnO grain itself could be under the influence of more compressive stress in this film, which may induce higher disorder or defects within the 20 ACS Paragon Plus Environment

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semiconducting SnO region. These effects, in turn, induce more disordered structure compared with the other film, and trap-mediated hopping conduction behavior dominates the overall electrical conduction property.

CONCLUSION In conclusion, the p-type semiconducting SnO films could be grown by a sputtering process adopting the SnO and Sn targets. By varying the DC power applied to the metal Sn target from 0 to 70 W while maintaining the RF power to SnO target at 80 W, the film composition (Sn:O ratio) could be varied from 56:44 to 74:26. After the PDA using the microwave annealing system at 180 oC for 25 min under the air atmosphere, the film composition changes within the range from 44:56 to 57:43 for the zero to 70 W Sn DC power cases. When the Sn:O ratio was higher than 56:44 after the PDA, the film showed metallic behavior due possibly to the involvement of the Sn metallic percolation path. So, the film with 44:56 and 55:45 were taken as the representative Sn-deficient and Sn-excessive p-type SnO films and their semiconducting properties were examined in detail. For the case of the Sn-deficient film, the electrical behavior corresponds to the typical band conduction of p-type semiconductor with a typical carrier concentration and Hall mobility of ~1018 cm-3, and 1-2 cm2V-1s-1 near room temperature, respectively. However, the Sn-excessive film showed peculiar behaviors; it has disordered p-type semiconductor performance where the hole transport was mediated by hopping mechanism, i.e., the Hall mobility increases with the increasing carrier concentration. Because of this peculiar behavior, the Hall mobility of the Sn-excessive SnO film at 40 W of Sn DC power is higher than the Sn-deficient SnO film at zero W of Sn DC power by ~ one order of magnitude at a similar carrier concentration near room temperature. This film showed an even higher Hall mobility of ~20 cm2V-1s-1 and 21 ACS Paragon Plus Environment


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carrier concentration of ~5 x 1019 cm-3 near 100 oC of measurement temperature, which indicates that this film could be a highly feasible candidate for the high-performance p-type oxide TFT. The careful examination of film microstructure, lattice structure, and stress evolution revealed that the compressive stress induced by the oxidation of the incorporated metallic Sn during the PDA constitutes the main contributor to these performance enhancements. Therefore, a theoretical study on the influence of the mechanical stress on the material property and defect generation would be an impending task.

AUTHOR INFORMATION Corresponding Author *E-mail: [email protected]. Tel: 82-2-880-7535. Notes The authors declare no competing financial interest. ACKNOWLEDGEMENT This

work

was

supported

by

the

Global Research

Laboratory

2012K1A1A2040157) of National Research Foundation of Korea (NRF).


Program

(No.

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(26) Choi, M.-J.; Cho, C. J.; Kim, K.-C.; Pyeon, J. J.; Park, H.-H.; Kim, H.-S.; Han, J. H.; Kim, C. G.; Chung, T.-M.; Park, T. J.; Kwon, B.; Jeong, D. S.; Baek, S.-H.; Kang, C.-Y.; Kim, J.-S.; Kim, S. K. SnO2 Thin Films Grown by Atomic Layer Deposition Using a Novel Sn Precursor. Appl. Surf. Sci. 2014, 320, 188–194. (27) Pei, Y.; Liu, W.; Shi, J.; Chen, Z.; Wang, G. Fabrication and Characterization of p-Type SnO Thin Film with High c-Axis Preferred Orientation. J. Electron. Mater. 2016, 45, 5967– 5973. (28) Wahila, M. J.; Butler, K. T.; Lebens-Higgins, Z. W.; Hendon, C. H.; Nandur, A. S.; Treharne, R. E.; Quackenbush, N. F.; Sallis, S.; Mason, K.; Paik, H.; Schlom, D. G.; Woicik, J. C.; Guo, J.; Arena, D. A.; White Jr., B. E.; Watson, G. W.; Walsh, A.; Piper, L. F. J. Lone-Pair Stabilization in Transparent Amorphous Tin Oxides: A Potential Route to p-Type Conduction Pathways. Chem. Mater. 2016, 28, 4706–4713. (29) Hwang, S.; Kim, Y. Y.; Lee, J. H.; Seo, D. K.; Lee, J. Y.; Cho, H. K. Irregular Electrical Conduction Types in Tin Oxide Thin Films Induced by Nanoscale Phase Separation. J. Am. Ceram. Soc. 2012, 95, 324–327. (30) Yabuta, H.; Kaji, N.; Hayashi, R.; Kumomi, H.; Nomura, K.; Kamiya, T.; Hirano, M.; Hosono, H. Sputtering Formation of p-Type SnO Thin-Film Transistors on Glass Toward Oxide Complimentary Circuits. Appl. Phys. Lett. 2010, 97, 072111. (31) Hsu, P.-C.; Chen, W.-C.; Tsai, Y.-T.; Kung, Y.-C.; Chang, C.-H.; Hsu, C.-J.; Wu, C.-C.; Hsieh, H.-H. Fabrication of p-Type SnO Thin-Film Transistors by Sputtering with Practical Metal Electrodes. Jpn. J. Appl. Phys. 2013, 52, 05DC07. (32) Kim, Y.; Um, J.; Kim, S.; Kim, S. E. P- to n-Type Conductivity Inversion of NitrogenIncorporated SnO Deposited via Sputtering. ECS Solid State Lett. 2012, 1, P29–P31. 26 ACS Paragon Plus Environment

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FIGURES

Figure 1. The schematic diagrams of (a) a co-sputtering method with SnO and Sn targets and (b) a microwave annealing equipment.


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Figure 2. GIXRD patterns showing phase formation of 30 nm-thick (a) as-deposited films, (b) annealed films at 180 °C on the Si substrate according to the Sn DC power with the fixed SnO RF power at 80 W at a deposition pressure of 1.5 mTorr. The estimated film thickness from the XRR fitting for each sample added to each graph. (c) shows the similar data for 100 nm-thick films on the glass (lower portion) and Si (upper portion) substrates.



Figure 3. (a) Lattice parameter a, (b) lattice parameter c, (c) lattice volume (a2c), and (d) tetragonality (c/a) as extracted from the peak positions of SnO (101) and (110) from the GIXRD result at annealed films with different Sn DC power with the fixed SnO RF power at 80 W. The horizontal orange-colored dashed lines indicate the literature bulk p-type SnO values.


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Figure 4. (a) Measured film stresses, (b) film densities by the XRR, and (c) Sn layer densities and its Sn atom concentrations by the XRF results of 30 nm-thick as-deposited and annealed films on the Si substrate according to the Sn DC power with the fixed SnO RF power at 80 W. The horizontal orange-colored dashed lines indicate the literature bulk p-type SnO values. The XRR results also include the film densities of the 30 nm-thick as-deposited and annealed films on the glass substrate.



Figure 5. Bird’s-eve-view SEM images of the 30 nm-thick as-deposited films on the Si substrate under the different Sn DC power at (a) 0 W, (b) 5 W, (c) 10 W, (d) 20 W, (e) 30 W, and (f) 40 W with the fixed SnO RF power at 80 W.


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Figure 6. Bird’s-eve-view SEM images of the 30 nm-thick annealed films at 180 °C on the Si substrate under the different Sn DC power at (a) 0 W, (b) 5 W, (c) 10 W, (d) 20 W, (e) 30 W, and (f) 40 W with the fixed SnO RF power at 80 W.



Figure 7. AFM topographic images of the 30 nm-thick films on the Si substrate under the Sn DC power of 0 W at the (a) as-deposited and (b) annealed states, and the Sn DC power of 40 W at the (c) as-deposited and (d) annealed states. And the images for the 30 nm-thick films on the glass substrate under the Sn DC power of 0 W at the (e) as-deposited and (f) annealed states, and the Sn DC power of 40 W at the (g) as-deposited and (h) annealed states.


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Figure 8. The XPS spectra of (a) Sn 3d, (b) O 1s, (c) Sn0 peak portion in total Sn 3d peaks for the 30 nm-thick annealed films at 180 °C on the Si substrate according to the Sn DC power with the fixed SnO RF power at 80 W. The atomic percentages of Sn and O atoms for the films are included on the left side of the Figure 7b.



Figure 9. AES depth profiles of the 30 nm-thick films on the Si substrate under the Sn DC power at 0 W at (a) as-deposited and (b) annealed states, and the Sn DC power at 40 W at (c) as-deposited and (d) annealed states.


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Figure 10. HRTEM images of the 30 nm-thick (a) as-deposited and (b) annealed films at 180 °C on the Si substrate under the Sn DC power at 40 W with the fixed SnO RF power at 80 W. (c) The enlarged image and (d) the fast Fourier transform pattern corresponding to the yellow square regions at the as-deposited film in HRTEM images. (e), (g) The enlarged images and (f), (h) the fast Fourier transform patterns corresponding to each red and yellow square region at the annealed film in HRTEM images.



Figure 11. STEM-EDS analyses showing electron images of the 30 nm-thick (a) as-deposited and (b) annealed films at 180 °C on the Si substrate under the Sn DC power at 40 W with the fixed SnO RF power at 80 W with (c) Sn, (d) O elemental mappings of the annealed film.


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Figure 12. The plot of carrier transport data of the 100 nm-thick films on the glass substrate annealed at 180 °C in the Sn DC power ranging from 0 to 70 W.



Figure 13. The plot of carrier transport data of the 100 nm-thick films on the glass substrate in the annealing temperatures ranging from RT to 400 °C at the Sn DC power of (a) 0 W and (b) 40 W.


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Figure 14. The plot of carrier transport data of the 100 nm-thick annealed films at 180 °C on the glass substrate in the measurement temperatures ranging from RT to 300 °C at the Sn DC power of (a) 0 W and (b) 40 W.



Figure 15. Measured film stress of 100 nm-thick films on the 100 µm-thick Si substrate in the annealing temperatures ranging from 180 to 250 °C at the Sn DC power of 0 W and 40 W.


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TABLES

Table I. The Sn:O atomic composition ratios at as-deposited and annealed films on the Si substrate according to the Sn DC power ranging from 0 to 70 W with the fixed SnO RF power at 80 W. These values were calculated from the XRF results with the AES results based on 40 W of Sn DC power at as-deposited and annealed films.

Sn DC

As-deposited Sn:O

Annealed Sn:O

0W

56:44

44:56

10 W

61:39

48:52

20 W

67:33

53:47

30 W

70:30

54:46

40 W

71:29

55:45

50 W

72:28

56:44

60 W

73:27

57:43

70 W

74:26

57:43



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Table II. The film densities estimated by the XRR at as-deposited and annealed films on the Si and glass substrates at the Sn DC power of 0 W and 40 W with the fixed SnO RF power of 80 W.

Si substrate

Glass substrate

Sn DC

As-deposited [g/cm3]

Annealed [g/cm3]

As-deposited [g/cm3]

Annealed [g/cm3]

0W

5.3

5.9

5.3

5.7

40 W

6.2

6.2

6.3

6.3


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Table III. Carrier concentration, Hall mobility, resistivity as extracted from Hall effect measurements dependence on the Sn DC power ranging from 0 to 70 W with the fixed SnO RF power at 80 W. (Note that the reported values are the average of 5-10 valid results which obtained from the Hall measurements of several tens of times performed on the given sample of every condition).

Annealed at 180℃ ℃

p-Type semiconducting behavior

Metallic behavior

Sn DC [W]

0

10

20

30

40

50

60

70

Mobility [cm2/Vs]

1.5

2.8

5.0

6.7

8.8

0.545

0.818

0.499

Carrier conc. [cm-3] Resistivity [Ohm·cm]

1.2×1018 2.8×1017 4.8×1017 7.1×1017 5.4×1018 -2.8×1022 -1.1×1023 -2.1×1023

3.7

8.4

2.6

1.5

1.3×10-1 6.0×10-4 1.1×10-4 1.0×10-4



ToC/Abstract Graphic


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Composition, Microstructure, and Electrical Performance of Sputtered

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