Computers of the Next Generation. Stretch - 100 Times Faster than the

vanced machine development project of the IBM Corp., which ... program digital computers will run is limited by the ... vantage of these idle times co...
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Computers of the Next Generation Stretch -100 times faster than the IBM 704

STRETCH

is the name given to an advanced machine development project of the IBM Corp., which is the result of a contract between the U. S. Atomic Energy Commission and IBM. This paper indicates some of the problems encountered in developing the organization of the Stretch computer. The speed at which modern storedprogram digital computers will run is limited by the speed of the storage device used. Most intermediate and low-speed computers use magnetic drum storage and most high-speed computers use magnetic core storage. The fastest magnetic core storage available a t the time of signing the contract was only twice that of the Type 704. However, new core materials gave promise of a 2-microsecond cycle time and new winding techniques with multipath cores gave promise of 0.5-microsecond cycle times in small arrays. T o back up these increased memory speeds, a very fast arithmetic unit had to be developed. One of the limiting factors in building an ultra-high-speed computer is physical size. As the speed limit of a particular component is approached, many more components are required to perform a given logical task. The 4000 square feet required for a 704 installation had expanded to over 20.000 feet for a single Sage computer, only doubling or tripling speed. Clearly, a new device was needed. Bench testing of a new type of transistor had indicated speed potential in the IO-megapulse range. I t was felt that a n arithmetic unit could be constructed, using the new transistor, to give floating point addition in about 0.6 microsecond and floating point multiplication in about 1.2 microseconds. Transistors had the additional appeal of lower heat dissipation and much higher reliability than vacuum tubes. Speed Objectives. The speed goal is 100 times the performance of the Type 704. The main bulk of storage, however, will have a speed of 2 microsecondsonly six times that of the 704. The highspeed storage, necessarily available in smaller arrays, has a speed of 0.5 microsecond-only 24 times that of the 704. Obviously, the Stretch computer could not be organized in the same way as the Type 704. Examination of the operation of the 704 shows that in some operations, like fixed point addition, the memory is busy full time-two memory cycles being required. I n operations like floating point addition, multiplication, and division, the

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memory is busy only 10 to 25% of the time. A machine which could take advantage of these idle times could run faster. To accomplish this, Stretch has been organized so that portions of the machine operate independently of each other. The main computer delegates such things as indexing and input-output control to other parts of the machine organization, each of which runs independently until it requires information from another section. Instead of one storage array, several independent storages, each with its own register complement, feed into a common memory buss. The heart of this organization is a built-in “scheduler,” which is constantly aware of the progress of the program and the status of each unit. Its function is to “optimum progqam” the operation and interaction of ad sections for maximum efficiency. I n the evaluation of possible design configurations, it was necessary to test Stretch on actual problems. As expected, the speed advantage of Stretch over the 704 is heavily dependent on the sequence of operations required. The timing of programs was an extremely onerous task, because all parts of the machine had to be evaluated at 0.1-microsecond intervals throughout an entire problem. T o aid in this study, a simulation program has been written for the 704 which will accept a Stretch program and analyze it for speed. The 704 program also gathers statistics on such things as the percentage activity in various parts of the machine and the number of times each part had to wait on another part. In this way, it has been possible to evaluate the effect, for example, of increasing the number of independent memory units us. increasing the speed of each unit. Machine characteristics are as follows : The word size is 64 binary bits, plus eight check bits. Instructions are single addresses with provision for variable field length arithmetic in both the binary and decimal modes. A full complement of single and double precision floating point commands is provided. A floating point word consists of a 48-bit mantissa plus sign and an 11-bit exponent plus sign. There are 16 index registers. Particular attention is being paid to reliability and serviceability. An errorcorrecting code will automatically correct all single errors during data transmission. Error-recording devices will keep track of the number of error corrections made by the machine, and indicate the area of the fault. Machine features which contribute to programming ease will also be provided. An automatic interrupt feature allows the

INDUSTRIAL AND ENGINEERING CHEMISTRY

program to take action on any or all of 64 machine conditions. An address limit may also be set to give an alarm in case the program tries to address memory outside of a designated area. Working along with the Stretch development is a project for development of a programming system. Close cooperation is maintained between these two groups to ensure that machine features are included in the design which will assist in automatic programming. Findings to date indicate that the goal of achieving 100 times the 704 speed is achievable. The development program is still on schedule and it is planned to deliver the first machine to Los Alamos in 1960.

L. C. HUBBARD lnternational Business Machines Corp., 3625 West 6th St., Los Angeles 5, Calif. RECEIVED for review April 25, 1958 ACCEPTEDJuly 29, 1958

Analogs-reaching every field

into

C o m m I s o N of present activity levels reveals a certain domination of the computer field by digital equipment. However, the modern electronic analog computer has been in existence for less than two decades and it is unlikely that it adequately represents the total analog class and its potentialities. To achieve a true perspective for any investigation of the future of analog computation, knowledge of the history of analog computers and the present state of the art is necessary. Man’s application of the method of analogy has taken diverse forms. From direct models there has been progression through indirect models of increasing flexibility and utility, culminating in an instrument currently identified as the electronic analog computer. I t is generally accepted that electronic analog computers represent the best expression of analog techniques yet attained. The electronic analog computer is an aggregate of high gain direct-coupled operational amplifiers with associated passive impedances, and other elements such as potentiometers, diodes, multipliers, and function generators that can be programmed by interconnection to generate problem solutions for presentation on readout equipment. Soon after the direct current operational amplifier was introduced as the basic analog computer element, a number of refinements