Article pubs.acs.org/crystal
Crystal Shape Engineering of Topological Crystalline Insulator SnTe Microcrystals and Nanowires with Huge Thermal Activation Energy Gap Muhammad Safdar,† Qisheng Wang,† Misbah Mirza, Zhenxing Wang, and Jun He* National Center for Nanoscience and Technology, Beijing 100190, P.R. China S Supporting Information *
ABSTRACT: Since different high-symmetrical crystal planes of topological crystalline insulator possess their own topological electronic structure, manipulating crystal shapes with distinct facets of SnTe nanostructures is crucial for the realization of desired topological surface properties. Here, we developed crystal shapes engineering for the controllable synthesis of SnTe microcrystals and nanowires with specific exposed surfaces by optimizing experimental parameters in the chemical vapor deposition process. Crystal shapes of SnTe microcrystals are tailored from {100} surface-covered cubes, {100} and {111} surface-coated truncated octahedron, to a {111} surface-terminated octahedron. Significantly, with gold nanoparticles as the catalyst, two novel SnTe nanowires, octahedron-attached SnTe nanowires, and truncated octahedron-assisted SnTe nanowires, are achieved. The requirement of minimizing the overall surface energy drives the formation of various crystal shapes of SnTe microcrystals and nanowires. In addition, SnTe nanowires possess a huge thermal activation energy gap (350 ± 17 meV), 14 times larger than the energy scale of room temperature. This huge thermal activation energy gap can protect topological surface states of SnTe nanowires against the disturbance of thermal excitation. Our work provides the building block for the realization of unique topological surface effects on specific facets and novel spintronic devices.
1. INTRODUCTION
Low-dimensional TI nanostructures holds superior merits in the investigations of the surface topological nature due to their large surface-to-volume ratio, which tremendously enhances the contribution of topological surface carriers.10−12 In addition, low-dimensional TI nanostructures are the key for the fundamental investigation of materials such as unique quantum mechanics phenomena and applications such as the nanoscale electronic and spintronic devices.10,11,13 As a result, it is extremely important to develop the synthesis strategy for highquality single crystalline SnTe nanostructures. SnTe has a rocksalt structure with space group Fm3̅m. It holds a special mirror symmetry in the face-centered-cubic Brillouin zone. Importantly, the stoichiometric ratio of SnTe is much simpler compared with other TCIs, such as Pb1−xSnx(Te, Se),6,7 which makes it easier to be synthesized. In the past few years, considerable effort has been devoted to the fabrication of
The discovery of topological crystalline insulators (TCIs) greatly extends the family of topological insulators (TIs).1−4 TCIs are different from conventional TIs in that the crystalline symmetry takes the place of the role of time-reversal symmetry in guaranteeing the topological protection. 1,3,5 In the topological crystalline insulator, highly symmetric crystal surfaces such as {001}, {110}, and {111} possess gapless metallic surface states. Since the theoretical predication of tin telluride (SnTe)2 and its related alloys PbxSn1−x(Te, Se)6,7 as TCIs, they have quickly sparked the immense research interest of theorists and experimentalists from all over the world. Soon after theoretical predication, the Dirac cones of SnTe and its related alloys PbxSn1−x(Te, Se) on surface (001) are confirmed by angle-resolved photoemission spectra.4,8 Significantly, the electronic structure of SnTe or PbxSn1−x(Te, Se) is proved to be continuously tunable by applying external perturbation, such as elastic strain and magnetic field.2,9 This novel property makes TCIs a promising materials system in the applications of tunable electronic and spintronic devices. © 2014 American Chemical Society
Received: February 12, 2014 Revised: March 16, 2014 Published: March 21, 2014 2502
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Figure 1. (a) SEM image and (b) magnified SEM image of smooth nanowires deposited at 550 °C. (c) SEM image of beaded nanowires and smooth nanowire mixture deposited at 500 °C. (d) Magnified SEM image of single-beaded nanowire. (e) SEM image of microcrystal-assisted nanowires deposited at 450 °C. (f) Magnified SEM image of microcrystal-assisted nanowires.
temperature (25 meV).24 Inspired by our previous work where we found the Aharonov−Bohm (AB) interference of SnTe nanowire remains robust at near liquid-nitrogen temperature (40 K), we believe SnTe nanowires have a great thermal activation thermal energy gap, which protects topological surface states against the disturbance of thermal excitations. Here, the growth of perfect cubic and octahedral SnTe micorcrystals and truncated octahedral SnTe micorcrystals with special facets are demonstrated via the chemical vapor deposition (CVD) process. It is worth noting that the crystal shapes can be precisely manipulated by tailoring the deposition temperature due to the fact that the dominated facets with the lowest surface energy are different at the distinguishing temperature region. Significantly, the competing relations of surface energy between the {111} and {100} surfaces leads to unique octahedral microcrystal-attached SnTe nanowires and truncated octahedral microcrystal-assisted SnTe nanowires at the intermediate temperature range. Specific crystal shapes with distinct facets obtained in our work provides building blocks for the realization of novel topological surface effect and spintronic devices. Moreover, by investigating temperature-dependent conductive behavior, we found thermal activation energy gap of the synthesized single crystalline SnTe nanowire reaches up to 350 ± 17 meV, which is 14 times larger than the energy scale of room temperature (∼25 meV).21 We believe the huge thermal activation energy gap is crucial for the observation of apparent Aharonov−Bohm (AB) interference of the SnTe nanowire at a relatively high temperature (40 K) in our previous work.16 Thus SnTe nanowires are the promising materials to achieve room-temperature observation of unique quantum mechanics behavior and applications of low-dissipation nanoscale electronic and spintronic devices.
one-dimensional SnTe nanostructures by solution-based methods.14,15 However, the synthesized SnTe nanorods or nanowires are short and polycrystalline, which cannot meet the requirements of materials for the observation of topological surface nature and the utilization of surface states in microelectronics and spintronics. Recently, our group, for the first time, successfully synthesized the highly single crystalline SnTe nanowire via gold (Au)-catalyst chemical vapor deposition (CVD) and realized the observation of topological surface states in SnTe nanowire by magnet-transport measurements.16 This work supplies the basis of materials for the experimental research in low-dimensional TCIs and opens the door for the applications of SnTe nanowire as nanoelectronics and spintronics devices. Subsequently, Z. Li et al. applied the CVD method to realize the growth of smooth SnTe nanowires dominated by the {100} crystal plane and zigzag SnTe nanowires with both {100} and {111} facets, combining density functional theory (DFT) calculations.17 However, the morphologies of SnTe nanowires with distinct highly symmetric crystal surfaces are far more than smooth and zigzag nanowires, as demonstrated in this work. And the structural evolution processes of different morphology are very complicated due to the competing growth of different facets at different temperatures, since different highly symmetry crystal surfaces hold their own special topological surface states.7,18 Controllable synthesis and clear understanding of the growth mechanism of various low-dimensional SnTe nanostructures with distinct highly symmetric crystal surfaces is essential for the realization of strongly expected quantum mechanics phenomena and device applications. Furthermore, in order to realize the practical applications of dissipationless electronic devices, the quantum mechanics behaviors are intensely expected to be obtained at ambient, or at least liquid-nitrogen, temperatures.19 However, current observation of the topological surface states is all at low temperature, typically at liquid-helium temperature.10,11,13,20,21 This is because low temperature can prevent the fragile topological surface states from the disturbance of bulk carriers induced by thermal excitations.10,22,23 As a result, for the purpose of pragmatic needs, TIs must have the large thermal activation energy gap, which makes TIs more immune from bulk carriers at relative high temperature. However, thermal activation energy gap of most reported TIs is very low.24−27 For example, thermal activation energy gap of ultrathin Bi2Se3 is only 2 meV, even smaller than the energy scale at room
2. EXPERIMENTAL SECTION 2.1. Synthesis of SnTe Nanowires and Microcrystals. SnTe nanowires and microcrystals were synthesized using a horizontal vacuum tube furnace with single temperature zone. Si substrates covered with an 8 nm gold (Au) layer were used as the growth substrates. SnTe powder was loaded (99.99%, alfa aesar) in the center of quartz tube. Si substrates covered by Au thin film were placed in the downstream area. The quartz tube was first sealed and then it was evacuated and flushed a few times with high purity Ar gas in order to provide an oxygen-free environment. During the experiment, Ar gas was fed with a constant flow rate 100 sccm by maintaining tube pressure of 150 Torr. The furnace temperature was adjusted to 900 °C for the source and 400−600 °C for the substrate. The whole reaction 2503
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Figure 2. (a) SEM image of cubic SnTe microcrystals deposited at 550 °C. (b) Magnified SEM image of cubic microcrystal. (c) SEM image of truncated octahedral SnTe microcrystals deposited at 450 °C. (d) Magnified SEM image of truncated octahedral SnTe microcrystals. (e) SEM image of octahedral SnTe microcrystals deposited at 425 °C. (f) Magnified octahedral SnTe microcrystal. process was maintained for 1 h. And then the furnace was allowed to cool naturally down to room temperature. 2.2. Characterizations. SnTe morphologies were characterized by field-emission scanning electron microscopy (FESEM) S4800 (Tokyo, Japan) at 10 KV. Transmission electron microscopy (TEM) and highresolution transmission electron microscope (HRTEM) were done on FEI Tecnai F20 at an accelerating voltage of 200 kV. Selected area electron diffraction (SAED) and electron energy-dispersive X-ray spectroscopy (EDX) attached to the TEM were used to characterize the crystal structure composition. XRD (Philips X’Pert Pro Super with Cu Kα radiation) at room temperature was done at a tube voltage of 40 kV and a tube current of 200 mA. 2.3. Device Fabrication. SnTe nanowires were first mechanically separated in acetone by 10 s sonication. And then they were transferred onto a cleaned Si substrate with SiO2 dielectric layer of 300 nm. The Pt electrodes were fabricated by the FEI Nanolab 600i SEM/ FIB dual beam system. 2.4. Measurement of Thermal Activation Energy Gap. Temperature-dependent conductivity of SnTe nanowire was executed by using a Keithley 4200 semiconductor characterization system. The resistance was measured by using a standard two-terminal device. The temperature ranged from room temperature to high temperature 423 K.
the growth of lead chalcogenide nanowires are characterized by special catalyst-like element lead or low-melting-point metals, including In, Ga, and Bi, which is likely due to the unique physical and chemical nature of lead chalcogenide.28,29 In addition, here we found beaded nanowires (Figure 1, panels c and d) at 500 °C and microcrystal-assisted SnTe nanowires (Figure 1, panels e and f) at 450 °C. The shape of the beads on the SnTe nanowires is octahedral structures. And the base of microcrystal-assisted SnTe nanowires is truncated octahedral structures. All of these results reflect the competing thermal dynamic growth process of crystal planes {100} and {111}. This is likely because the facets with the minimizing surface energy are different at a special temperature region and the stable facets are determined by surface energy minimization.30 In addition, microcrystal-assisted SnTe nanowires only grow on selected crystal faces instead of all faces with parallel orientation (Figure 1, panels e and f). The detailed growth process and mechanism will be elucidated in the later discussion. It should be noted that the growth of beaded SnTe nanowires and microcrystal-assisted SnTe nanowires are carried out on Au-coated Si substrates. The following analysis on the morphology of SnTe microcrystals without Au nanoparticles as the catalyst proves the growth of beaded SnTe nanowires and microcrystal-assisted SnTe nanowires take the VLS process. However, the octahedral microcrystal attachments on the SnTe nanowires and truncated octahedral microcrystals base of microcrystal-assisted SnTe nanowires take the vapor-solid (VS) growth procedure. We now turn to analyze the morphology of SnTe microcrystals, as shown in Figure 2. Here the SnTe microcrystals are directly deposited on Si substrates without the Au catalyst. Although the deposition temperature is set as the same with that of smooth SnTe nanowires and microcrystal-assisted SnTe nanowire, only cubic (Figure 2, panels a and b) and truncated octahedral (Figure 2, panels c and d) SnTe microcrystals are obtained at 550 and 450 °C, respectively. This supports the VLS growth mechanism of three types of SnTe nanowires, as mentioned above. Further decrease of deposition temperature (425 °C) results in perfect octahedral SnTe microcrystals (Figure 2, panels e and f). The structure evolution process of SnTe microcrystals with the change of deposition temperature also indicates that the dominated facets are different at different temperature regions. It is known that the SnTe are rocksalt type with isotropic face-
3. RESULTS AND DISCUSSION SnTe nanowires and microcrystals are synthesized through a chemical vapor deposition (CVD) method with SnTe powder as the evaporation source. More experimental details are described in the Experimental Section. Crystal shapes with distinct facets of SnTe nanowires and microcrystals can be manipulated by deposition temperature, as shown in the scanning electron microscopy (SEM) images of Figures 1 and 2. First, let us focus on the Au catalyst-assisted growth of SnTe nanowires, as displayed in Figure 1. Three types of distinguishing SnTe nanowires are acquired at deposition temperatures 550, 500, and 450 °C, respectively. They are smooth SnTe nanowires, beaded SnTe nanowires, and microcrystal-assisted SnTe nanowires. The smooth SnTe nanowires (Figure 1, panels a and b) have been characterized and analyzed in our previous work.16 It has been pointed out that the SnTe nanowires grow along the ⟨100⟩ direction with both triangle and rectangle cross-section shapes. The growth of smooth SnTe nanowires follow the vapor−liquid−solid (VLS) growth model with Au nanoparticles as the catalyst. The CVD has also been applied to the synthesis of lead chalcogenide nanowires, which shares the same crystal structure as SnTe.28,29 However, 2504
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Figure 3. (a) TEM image of truncated octahedral SnTe microcrystals; inset is the XRD of truncated octahedral SnTe microcrystals, as shown in Figure 2c. HRTEM images in (b) and (c) are taken from the edges of truncated octahedral SnTe microcrystals in (a), as shown by the arrows. The lattice spacing of 3.1 and 1.8 Å corresponds to the crystal planes {200} and {222} respectively, indicating that the surface facets of truncated octahedral SnTe microcrystals are {100} or {111}. (d) TEM image of microcrystal-assisted SnTe nanowire with gold nanoparticle on the top. (e) EDX spectra obtained from body and (f) from the top of the SnTe nanowire; the peaks of gold suggest the microcrystal-assisted SnTe nanowires follow the VLS growth mechanism. (g) HRTEM image of microcrystal-assisted SnTe nanowire; inset is the SAED pattern of this SnTe nanowire, crystallization plane of {100} means the growth of microcrystal-assisted nanowires starts from the {100} surfaces of truncated octahedral SnTe microcrystals.
centered cubic (fcc) structure.31 Thus it is obvious that the six square surface of cubic SnTe microcrystals are {100} facets orientation and eight equilateral triangle surface of octahedral SnTe microcrystals are {111} facets orientation. However, it is difficult to identify the crystal plane index of truncated octahedral by direct observation, due to its complicated shape. In the following transmission electron microscopy (TEM) analysis, we will see both {100} and {111} crystal planes appear on a truncated octahedral SnTe microcrystal. In addition, the ultralow deposition temperature (≤425 °C) could not meet required driving force for nucleation and growth of SnTe crystals. The SnTe structure between 400 and 425 °C is the particles’ film without growth of prominent morphology, as shown in Figure S1 of the Supporting Information. On other hand, very high temperature (>600 °C) is not favorable for collection and condensation of SnTe vapors. In order to characterize the growth orientation of truncated octahedral SnTe microcrystals and the formation process of truncated octahedral microcrystal-assisted SnTe nanowires, transmission electron microscopy (TEM) and high-resolution TEM (HRTEM) are taken on truncated octahedral SnTe microcrystals and microcrystal-assisted SnTe nanowires. Figure 3a shows the TEM image of a corner of truncated octahedral SnTe microcrystal. X-ray diffraction (XRD) pattern of truncated octahedral SnTe microcrystals as shown in Figure 2c is given in Figure S2 of the Supporting Information. The XRD proves truncated octahedral SnTe microcrystal is a pure cubic phase of SnTe (JCPDS 08-0487). HRTEM taken from the edges of the microcrystal labeled by two yellow circles shows the lattice fringe of truncated octahedral SnTe microcrystal. Lattice spacing of 3.1 Å (Figure 3b) and 1.8 Å (Figure 3c) corresponds to {100} and {111} lattice planes, respectively. Thus we can conclude that the truncated
octahedral SnTe microcrystal holds {100} and {111} crystal planes. Taking careful consideration of the crystal shape difference between truncated octahedral SnTe microcrystal and octahedral SnTe microcrystal, we can indeed see the that truncated octahedral SnTe microcrystals are formed by cutting off the corners of the octahedral SnTe microcrystal. As a result, square and hexagonal surfaces are constructed as shown in Figure 4b. The square and hexagonal facets belong to {100} and {111} crystal planes, respectively. As discussed above, the microcrystal-assisted SnTe nanowires oriented in a special direction. Here, combining TEM analysis, we further find that the nanowires occur only on the {100} crystal plane. As indicated by Figure 3d, microcrystal-assisted SnTe nanowire presents smooth surfaces with the gold nanoparticle at the top. Energy dispersive X-ray spectroscopy (EDS) from the body of SnTe nanowires in Figure 3e verifies the stoichiometric ratio of Sn to Te is 1:1. And EDS from the top of SnTe nanowires in Figure 3f simultaneously show the peaks of Au, Sn, and Te, further ascertaining that the microcrystal-assisted SnTe nanowires meets the VLS growth mechanism. Importantly, the HRTEM of microcrystal-assisted SnTe nanowires (Figure 3g) suggests SnTe nanowires crystallize along the ⟨100⟩ direction. Lattice fringe spacing 3.1 Å is half the distance between two adjacent {100} planes in the fcc SnTe structure. It means microcrystal-assisted SnTe nanowires perpendicularly grows from the {100} facets of the truncated octahedral SnTe microcrystal. Au nanoparticles favors the epitaxial growth of SnTe nanowires from {100} facets of truncated octahedral SnTe microcrystal. The above results show the crystal shapes of SnTe nanowires and microcrystals with distinct facets that can be precisely tailored by the deposition temperature, as shown in Figure 4. In essence, the formation of different crystal shapes of SnTe 2505
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Figure 4. (a−c) are cubic, truncated octahedral, and octahedral SnTe microcrystals, respectively, with the crystal plane index labeled on them. (d) Beaded SnTe nanowires. (e) Microcrystal-assisted SnTe nanowires. (f and g) are the schematic drawing of beaded SnTe nanowires and microcrystalassisted SnTe nanowires, respectively. The temperature range and surface free-energy orders are given in the first and second lines, respectively.
section shape can be obtained at a relatively high temperature, as mentioned in our previous work16 and ref 17. However, {111} crystal planes are predominant at Sn-poor conditions due to its smallest surface energy. Since Sn and Te prefer to form SnTe+Te at a low deposition temperature (425 °C). Thus, the ECS is predicated to be octahedral SnTe microcrystals with dominance of the {111} facets at low temperature, as shown in Figure 4c. Interestingly, the morphology of the SnTe microcrystal and nanowires could be complicated due to the competing surface energy relation between {111} and {100} at the intermediate temperature. In accordance with the calculated surface energy, either γ{100} or γ{111} could be the lowest between the Sn-rich and Sn-poor region. As a result, SnTe microcrystals are composed of the truncated octahedral shapes at an intermediate temperature (450 °C). The truncated octahedral microcrystals are terminated by both a square {100} surface and a hexagonal {111} surface, as shown in Figure 4b, which is consistent with the Wulff construction given in ref 31. More intriguingly, at the intermediate temperature range, the Au-catalyst SnTe nanowires display a novel growth style with the interesting microcrystal attachment, as revealed by Figure 4d. With the relative high-growth temperature (500 °C), the SnTe atoms nucleate and grow along the ⟨100⟩ direction with continuous supply of the SnTe vapor. The final products of SnTe nanowires are terminated by four identical {100} facets. However, the surface energy of Te-terminated {111} facets is very close to that of the {100} facets. The matched surface energy between {111} and {100} results in epitaxial growth of
nanowires and microcrystals at different deposition temperatures is guided by minimizing the surface energy. Normally, during the nucleation and growth, the vapor atoms prefer to fuse with the high energy crystallographic planes in the crystal lattice system. The high-energy planes preferentially disappear after growth, and then the final crystals are terminated by lowenergy planes.32 Theoretical calculation on the stability of the SnTe crystal surface points out that the surface energy γ of the Sn-terminated {111} surface (denoted as γ{111}:Sn) is always larger than that of the Te-terminated {111} surface (denoted as γ{111}:Te) and that of the Sn- and Te-terminated {100} surface (denoted as γ{100}) at both Sn-rich and Sn-poor environment.17,31 Thus the Sn-terminated {111} surface can not appear on the Wulff shape (i.e., the crystal shape with the lowest overall surface energy).17,31 For the {100} surfaces, it holds the lowest surface energy in the Sn-rich region. In consideration of the phase diagram of the Sn−Te compound,33,34 Sn-rich SnTe crystals incline to crystallize at high temperature (550 °C). The top of Figure 4 gives the surface energy (γ) relationship of crystal facets at different temperature ranges based on the theoretical predication17,31 and phase diagram of the Sn−Te compound.33,34 As a result, the equilibrium crystal shape (ECS) of the SnTe microcrystals at high temperature is a perfect cube dominated by the {100} facets, as shown in Figure 4a. With the help of the Au catalyst, the cubic microcrystal further expitaxially grows along one of the ⟨100⟩ directions, as presented in Figure 3 (panels d and g). Consequently, the SnTe nanowire with a rectangle cross2506
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Figure 5. (a) SEM image of SnTe nanowire-based two-terminal device. (b) Current−voltage curves with the increase of temperature from 303 to 423 K. (c) The temperature-dependent sensitivity ΔG/G, indicating the conductivity of SnTe nanowire is insensitive to temperature around room temperature. Inset is the current−voltage curves magnified from (b) with the increase of temperature from 303 to 393 K. (d) Dependence of ln R on 1000/T gives a thermal activation energy Ea of 350 ± 17 meV, which is 14 times larger than the energy scale of room temperature (∼25 meV).
crystals with parallel orientation. It should be noted that no {110} surfaces are observed on all the crystal shapes, which is agreement with the results in the reference.17 Obviously, this is because the surface energy of the {110} planes cannot be the lowest one at all temperature ranges. It is important to emphasize that three types of SnTe microcrystals with specific high symmetric surfaces, the cube with {100} facets, octahedron with {111} facets, and truncated octahedron with a mixture of {100} and {111}, are significant for the fundamental physical investigation of topological surface states due to the differences of topological surface electronic structures between {100} and {111}.7 In addition, two novel SnTe nanowires with mixed crystal planes of {111} and {100}, octahedral microcrystal-attached SnTe nanowires and truncated octahedral microcrystal-assisted SnTe nanowires, are also expected to obtain unique quantum mechanics behavior by electronic transport measurement. A large thermal activation gap means materials have strong resistance to thermal excitation. For the topological insulator, the large thermal activation gap can prevent the fragile topological surface state from the disturbance of thermal excited carriers. In order to investigate the thermal activation energy gap of the SnTe nanowire, we have constructed a SnTe nanowire-based two-terminal device by the FEI Nanolab 600i SEM/FIB dual beam system, as shown in Figure 5a. The
perfect octahedral SnTe microcrystals on smooth SnTe nanowires as the schematic diagram in Figure 4f presents. The additional growth of perfect octahedral SnTe microcrystals on SnTe nanowires will further reduce their surface energies. With further decrease of deposition temperature (450 °C), the perfect octahedron attachments disappear, and SnTe nanowires grow from the base of truncated octahedral microcrystals that is microcrystal-assisted SnTe nanowires (Figure 4e). Above TEM, analysis exposes the truncated octahedral microcrystals that are surrounded by both Te-terminated {111} and {100} surfaces. And the microcrystal-assisted SnTe nanowires grows perpendicularly from the {100} surface of truncated octahedral microcrystals (Figure 4g). Here the truncated octahedral microcrystals are initially formed due to the competing growth of the {100} and {111} surfaces. And then Au nanoparticles promote further growth of SnTe nanowires from the {100} surface. An interesting phenomenon lies in the selected growth of SnTe nanowires on the {100} surface but not the {111} surface, although Te-terminated {111} surface possibly has the lowest surface energy at the intermediate temperature. This is likely because the kinetic barriers of facet-to-facet diffusion from the {111} to {100} facets is smaller than that from {100} to {111}.35,36 Thus the principle of minimizing overall surface energy leads to the perpendicular growth of SnTe nanowires from the {100} basic surface of truncated octahedral micro2507
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Table 1. Comparison of Thermal Activation Energy Gap of SnTe Nanowire in This Work and Other Topological Insulators thermal activation energy gap (meV)
SnTe nanowire
Bi2Se3 nanoplates24
Bi2Se3 nanowire27
Bi2Te3 nanowire26
Sn-doped Bi2Te2Se25
350 ± 17
2 ± 0.08.1
330 ± 10
210−290
95−125
sweeping voltage from −2 to 2 V is applied on the device at different temperatures, varying from 303 to 423 K. As displayed in Figure 5b, linear and symmetric current−voltage curves indicate superior Ohmic contacts between the electrodes and the SnTe nanowire. It is apparent that the conductance of the SnTe nanowire increases very slowly from 303 to 413 K. It is likely due to the fact that the thermal energy scale in this range is not strong enough to completely excite the bound intrinsic carriers. The sharp increase of conductance at 423 K may be because the energy scale of 423 K is sufficient to activate the bound excitons, which results in rapid increase of free carriers. From Figure 5c, we can see that the conductance of SnTe nanowires is insensitive to the temperature. Here G is the conductance of the SnTe nanowire, ΔG represents the increment of conductance relative to that at room temperature. The sensitivity ΔG/G does not even exceed 1 when the temperature increases to 343 K, indicating that SnTe nanowires are highly immune to thermal excitation around room temperature. In accordance with the semiconductor physics theory, resistance of the semiconductor is related to temperature as the following law:37,38 ln(RT ) = ln(R 0) + Ea /2kT
Surface energy minimizing drives the growth of various crystal shapes with distinct facets. Since the minimizing surface energies at high and low temperature are γ{100} and γ{111}:Te, respectively. The perfect cubic microcrystals with exposed {100} facets and perfect octahedral microcrystals with exposed {111} facets can be achieved at high (550 °C) and low (425 °C) temperature, respectively. Intriguingly, the competing surface energy relation between {111} and {100} at the intermediated temperature (450 °C) causes the incomplete growth of octahedral microcrystals terminated by both {111} and {100}. Significantly, with the help of Au catalyst, two interesting SnTe nanowires, octahedral microcrystal-attached SnTe nanowires and truncated octahedral microcrystal-assisted SnTe nanowires, are obtained at the intermediate temperature (500−450 °C). Notably, the microcrystal-assisted SnTe nanowires highly selectively grow on the {100} basic surface. The formation of these novel SnTe nanowire styles are ascribed to (1) the matched surface energy between {111} and {100} at the intermediate temperature; (2) the Au catalyst favors the epitaxial growth of the SnTe nanowires along the ⟨100⟩ direction and (3) the lower kinetic barriers of facet-to-facet diffusion from {111} to {100}. The crystal shape engineering of the SnTe nanowires and microcrystal developed in our work is fundamentally important for the exploration of unique topological surface effects and applications of novel spintronics devices. Moreover, temperature-dependent conductance of SnTe nanowires reveals that SnTe nanowires holds a huge thermal activation energy gap (350 meV), which signifies that topological surface states on the SnTe nanowires have a very strong immunity to thermal excitations. And thus, SnTe nanowires seem to be ideal material for the realization of room-temperature quantum mechanics behavior and practical spintronic applications.
(1)
where RT represents the resistance of temperature sensor at T (K), Ea denotes the thermal activation energy gap for conduction, R0 is the resistance at ∞ K, and k signifies the Boltzmann constant. As shown in Figure 5d, the plot of ln(RT) vs 1000/T shows very good linearity between 303 and 393 K. After well-fitting with the experiments data as a red line shown in Figure 5d, the thermal activation energy gap (Ea) is estimated to be 350 meV with an uncertainty of 17 meV, which is 14 times higher than the energy scale of room-temperature (∼25 meV). It is also larger than that of most reported TIs. The ultrathin Bi2Se3 nanoplate has a thermal activation energy gap of only 2 ± 0.081 meV.24 The thermal activation energy gap of Sn-doped Bi2Te2Se is no more than 125 meV.25 Table 1 gives the thermal activation energy gap of most reported TIs and the SnTe nanowire in this work. The large thermal activation energy gap illustrates that the conductance of SnTe nanowire has strong resistivity to thermal excitation. In our previous work,16 we observed the AB interference of the SnTe nanowire at 40 K, which is the highest reported temperature for the observation of AB interference on TIs. This is likely due to the fact that SnTe nanowires have a large thermal activation energy gap, which makes the thermal excitation of bulk charges very difficult. And thus, the topological surface states could escape from the disturbance of bulk carriers aroused by thermal excitations. It should be noted that the thermal activation energy gap estimated in our work is very close to the optical absorption gap (360 meV) of SnTe in ref 39. We believe SnTe nanowires are promising materials for the realization of the room-temperature topological surface transport effect and the nanoscale electronic and spintronic devices applications.
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ASSOCIATED CONTENT
S Supporting Information *
SEM of SnTe nanoparticles, XRD of truncated octahedral and octahedral SnTe microcrystals. This material is available free of charge via the Internet at http://pubs.acs.org.
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AUTHOR INFORMATION
Corresponding Author
*Address: National Center for Nanoscience and Technology (NCNST) No. 11 Zhong Guan Cun Bei Yi Tiao, 100190 Beijing, P.R. China. E-mail:
[email protected]. Tel: 86-1082545670. Author Contributions †
M.S. and Q.W. contributed equally. The manuscript was written through the contributions of all authors. All authors have given approval to the final version of the manuscript. Notes
The authors declare no competing financial interest.
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ACKNOWLEDGMENTS This work at the National Center for Nanoscience and Technology was supported by the 973 Program of the Ministry of Science and Technology of China (Grant 2012CB934103),
4. CONCLUSION The crystal shapes of SnTe nanowires and microcrystals with distinct high-symmetric crystal surfaces can be acquired by optimizing the deposition temperature in the CVD process. 2508
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the 100-Talents Program of the Chinese Academy of Sciences (Grant Y1172911ZX), and the National Natural Science Foundation of China (Grants 21373065 and 21307020).
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dx.doi.org/10.1021/cg5002122 | Cryst. Growth Des. 2014, 14, 2502−2509