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Defect-Free Graphene Synthesized Directly at 150 #C via Chemical Vapor Deposition with No Transfer Byeong-Ju Park, Jin-Seok Choi, Ji-Ho Eom, Hyunwoo Ha, Hyun You Kim, Seon-Hee Lee, Hyunjung Shin, and Soon-Gil Yoon ACS Nano, Just Accepted Manuscript • DOI: 10.1021/acsnano.8b00015 • Publication Date (Web): 01 Feb 2018 Downloaded from http://pubs.acs.org on February 2, 2018
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Defect-Free Graphene Synthesized Directly at 150 °C via Chemical Vapor Deposition with No Transfer Byeong-Ju Park,1 Jin-Seok Choi,1,2 Ji-Ho Eom,1 Hyunwoo Ha,1 Hyun You Kim,1 Seonhee Lee,3 Hyunjung Shin,3 and Soon-Gil Yoon,1,* 1
Department of Materials Science and Engineering, Chungnam National University, Daeduk Science Town, 34134, Daejeon, South Korea
2
Analysis Center for Research Advancement (KARA), Korea Advanced Institute of Science and Technology, 291 Daehak-ro, Yuseong-gu, 34141, Daejeon, South Korea
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Department of Energy Science, Sungkyunkwan University, 300 CheonCheon-dong, Jangangu, 16419, Suwon, Gyeonggi-do, Republic of Korea
S: Supporting Information
ABSTRACT Direct graphene synthesis on substrates via chemical vapor deposition (CVD) is an attractive approach to manufacturing flexible electronic devices. The temperature for graphene synthesis must be below ~200 °C to prevent substrate deformation while fabricating flexible devices on plastic substrates. Herein, we report a process whereby defect-free graphene is directly synthesized on a variety of substrates via the introduction of an ultra-thin Ti catalytic layer, due to the strong affinity of Ti to carbon. Ti with a thickness of 10 nm was naturally oxidized by exposure to air before and after the graphene synthesis, and the various functions of neither the substrates nor the graphene were influenced. This report offers experimental evidence of high-quality graphene synthesis on Ti-coated substrates at 150 °C via CVD. The proposed methodology was applied to the fabrication of flexible and transparent thin-film capacitors with top electrodes of high-quality graphene. Keywords: Direct graphene synthesis via CVD, Ti buffer layer, flexible substrate, synthesis temperature of 150 °C, defect-free monolayer graphene
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Graphene synthesis via CVD allows the production of large-area graphene on a variety of metal films such as micrometer-thick Cu, Ni, Ga, and Ge catalytic substrates.1-6 However, large-scale graphene synthesis requires processing temperatures as high as 1,000 °C or more, which requires a transfer process. Therefore, a reduction in the graphene synthesis temperature remains a critical challenge for application to electronic devices. To date, ~300 °C is the lowest temperature that has been recorded during graphene synthesis via oxygen-free atmospheric pressure CVD (APCVD) using benzene on 25-µm-thick copper foil, as reported by Jang et al.7 Graphene synthesized on copper foil must be transferred to functional substrates, when synthesized at temperatures as low as ~ 300 °C. Recently, Fujita et al. reported a reduction of 50 °C during graphene CVD on sapphire and 100 °C on a polycarbonate via dilute methane as the source with molten gallium as a catalyst.8 With this method, however, in this method, molten gallium for the graphene nuclei was prepared on a sapphire substrate at 1,050 °C for 300 sec, which meant molten gallium with a graphene nuclei still required transferral to a polycarbonate substrate to accomplish low-temperature graphene synthesis. For practical applications, a system that would allow the reliable synthesis of graphene directly onto insulating substrates is highly desirable. Recently, many studies have explored catalyst-free synthesis of graphene on various substrates.9-13To this point, however, directly synthesized graphene has featured a localized crystalline morphology with high-defect density, which results in low conductivity and diminished optical performance. Additionally, synthesis temperature has remained above 800 °C because the graphene synthesis is achieved via a surface-limited process, which is not applicable to flexible electronic device applications. 2
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Therefore, a direct synthesis of graphene with no transfer at temperature below 200 °C is required for application to flexible electronic devices. As far as we could ascertain, a method for direct defect-free graphene synthesis on a flexible substrate such as polyethylene terephthalate (PET) at low temperature via chemical vapor deposition has not been reported. Our method was inspired by the frequent use of Ti in dental implants, which is a process that takes advantage of the close affinity of Ti to the carbon in teeth. Herein, we report a micrometer-scale graphene synthesis via CVD at approximately 150 °C using two separate Ti (~10 nm)-coated substrates: eagle glass (700 µm) and polyethylene terephthalate (PET) (130 µm). First, we annealed a 10-nm-thick Ti layer at high temperature under hydrogen without breaking the vacuum, after which the deposited Ti was changed to TiO2 following exposure to air. The resultant TiO2 layer exerted no influence on the functions of the substrates. Second, we verified graphene synthesis on Ti-coated substrates at 150 °C, and investigated the defect-free properties of the resultant graphene. Third, we examined how the Ti underneath a monolayer graphene was changed to TiO2 after exposure to air, whereupon the various functions of graphene were not influenced. Finally, monolayer graphene films were assessed for their utility as the top-electrode in transparent and flexible thin-film capacitors. RESULTS and DISCUSSION A thermally stable, nonconductive, and optically transparent TiO2 buffer layer Before investigating direct CVD graphene synthesis on Ti-coated substrates, we examined the properties of ultra-thin Ti deposited onto glass and PET substrates under the same conditions as those used for the CVD graphene synthesis (hydrogen atmosphere and 3
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temperatures as high as 150 and 400 °C for Ti/PET and Ti/glass, respectively, which revealed the most important parameters in graphene-CVD). Ti deposited at room temperature via direct current (dc) sputtering was in situ annealed at different temperatures under hydrogen without breaking the vacuum. In situ-annealed Ti was naturally oxidized by exposure to air, which changed it to TiO2, as illustrated via the XPS Ti 2p core level of a layer etched for 300 s on the surface shown in Fig.1a. Therefore, for the remainder of this paper, Ti-coated substrates are referred to as either TiO2/PET or TiO2/glass after exposure to air before and after graphene synthesis. A 10 nm-thick-Ti layer deposited via dc sputtering was chosen in this study, because it had a smooth morphology and exerted no influence on the transmittance of the substrates (Figure S1).14 To ensure the thermal stability of the Ti layer during graphene synthesis via CVD, we examined the surface roughness, transmittance, and electrical conductivity of a 10-nm-thick layer of TiO2 measured under an air atmosphere following the in situ annealment of Ti under hydrogen at 150 and 400 °C (Figs. 1b-e). The root-meansquare (rms) roughness revealed no significant changes compared with Ti-coated substrates that had not been annealed (Fig. 1b). As shown in Fig. 1c, the step-height along a lateral distance of up to 1 µm (inset AFM image with a white solid line) showed no noticeable changes compared with that of an as-deposited sample, which indicated an excellent level of thermal stability under these conditions. Regarding transmittance (see Method sections), the as-deposited samples annealed at 150 and 400 °C for 2 h showed a minute decrease in transmittance (0.4 ± 0.05% at a wavelength of 550 nm) compared with that of a bare glass substrate (Fig. 1d). The inset in Fig. 1d shows the transmittance (at wavelength of 550 nm) of bare PET, as-deposited, and annealed at 150 °C. No sample showed a change in transmittance. Furthermore, the TiO2/glass displayed a sheet resistance similar to that of glass, and no
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resistance changes were observed after annealment at 400 °C (Fig. 1e). The 10-nm-thick TiO2 layer influenced neither the electrical conductivity nor the optical transmittance properties of the substrates, and it showed a predominant thermal stability under annealment under a hydrogen atmosphere at temperatures as high as 400 °C. This experimental observation suggests that Ti could be directly utilized for graphene synthesis in microelectronic devices without the need for additional transfer processes. Optimization of micrometer-scale graphene synthesis at 150 °C via thermal CVD on Ti- buffered substrates In this study, we demonstrated the feasibility of direct graphene synthesis at low temperatures via CVD on Ti with no transfer. In our synthesis process, once the Ti-coated substrates were removed from the sputtering chamber they were then transferred to the CVD chamber for graphene synthesis (see Methods section). During the transfer of the Ti-coated substrate between the two chambers, the Ti was oxidized naturally to TiO2 via exposure to air. The reduction process (Figure S2a) and graphene synthesis on reduced Ti (Figure S2b) is described in detail in the Methods section. To investigate the synthesis mechanisms of the directly synthesized graphene on titanium buffer layer, we used density functional theory calculations (DFT) to study the influence that the naturally formed TiO2 layer exerted on the energetics of the formation of graphene. The calculated binding energy of a carbon atom on a Ti (0001) layer suggests that the strong chemical interaction between them stabilizes the carbon sources on a Ti-coated substrate. The formation energy, Eform, of a monolayer of graphene on a Ti (0001) lattice from separately adsorbed carbon atoms was negative (-0.06 eV/C atom, -2.22 eV/nm2), confirming that the 5
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formation is significantly thermodynamically driven (Figure S3a). Considering the local geometry of a monolayer of graphene formed on Ti (0001), we believe that a large portion of this negative Eform can be attributed to the formation of a well-confined carbon nucleus on Ti (0001) (yellow highlighted nuclei, Figure S3a). For subsequent carbon atom diffusion along the titanium sites of the Ti (0001) surface for monolayer graphene synthesis, we calculated the low-diffusion energy barriers of 0.26 eV, demonstrating the synthesis of monolayer graphene. It is noteworthy that in the presence of the oxidized surface of Ti atoms, a carbon atom continued to preferentially bind to the Ti rather than to the oxidized Ti atoms. The calculated Eform of a monolayer of graphene on the partially oxidized Ti (0001) lattice was highly positive, (Eform = 0.22 eV/C atom, 8.54 eV/nm2), which showed that the formation of a monolayer of graphene is thermodynamically unfavorable in the presence of TiO2 (Figure S3b). Based on our DFT calculation results, we experimentally studied the correlation between the degree of the hydrogen reduction of naturally formed TiO2 (under hydrogen (5.3 × 10-3 Pa) at 150 °C in the CVD chamber) and the area of the graphene layer. The direct graphene synthesis at 150 °C on 10 nm-thick-TiO2 layer was not confirmed via various experiments using different synthesized parameters (Figure S4), which clearly supported the theoretical expectations (Figure S3b). The reduction process was performed for 1 to 4 h under hydrogen at 150 °C using TiO2 (10 nm)/PET substrates. The Raman spectra of the graphene synthesized at 150 °C on Ti-coated PET that was reduced for different times at 150 °C revealed a defect-free monolayer of graphene (Fig. 2a). The I2D/IG and ID/IG intensity ratios and the FWHM of the 2D- and G-
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bands were improved with increases in the reduction time (Fig. 2b and 2c, respectively). The I2D/IG and ID/IG intensity ratios observed with a reduction time of 4 h were 2.1 ± 0.08 and 0.02 ± 0.01, respectively, which indicated that the quality of these monolayers was superior to that of the graphene synthesized directly on SiO2 substrates via CVD at 800 °C, which had a relatively high defect density (ID/IG of 0.3).15 The ID/IG ratio of our defect-free graphene was comparable to that of defect-free single-crystalline graphene synthesized on hydrogenterminated germanium at 900 to 930 °C (ID/IG
