DOI: 10.1021/cg1000232
Controlled Synthesis of Copper-Silicide Nanostructures
2010, Vol. 10 2983–2989
Shaozhou Li, Hui Cai, Chee Lip Gan,* Jun Guo, Zhili Dong, and Jan Ma School of Materials Science and Engineering, Nanyang Technological University, 50 Nanyang Avenue, Singapore 639798, Singapore Received January 7, 2010; Revised Manuscript Received March 16, 2010
ABSTRACT: Octahedral-shaped, spindle-shaped, and wire-shaped Cu3Si nanostructures were synthesized through a silicon void-filling process. Faceted silicon voids were observed to spontaneously grow at the SiO2/Si interface through the catalytic effect of Cu3Si, and their shapes were modified by the stresses at the Si/Cu3Si interfaces. By controlling the relative amount of stress relief, it is possible to form differently shaped silicon voids. This work shows that different patterned nanostuctures of other materials may also be created through this growth mechanism.
Introduction The study of metal-silicon interactions and their resulting silicides is important to both fundamental science and the semiconductor industry.1 In traditional applications, metallic silicide thin films have been used for Schottky diodes, metalgates, and local interconnections in complementary metaloxide-semiconductor (CMOS) devices.2-4 Semiconducting silicides such as CrSi2 and β-FeSi2 are used as thermoelectric materials and show promise in photovoltaic applications.5-8 With the transition of the integrated circuits (IC) industry from the micro to the nano era, the feature size of silicides inevitably falls into the nanometer regime. More recently, a diversity of metal silicide nanostructures have been successfully synthesized by different techniques such as silicidation, chemical vapor transport (CVT), and chemical vapor deposition (CVD).9,10 With the increase in research on the bottomup approach, silicide nanostructures can also be employed as the building blocks for future hybrid nanoelectronics architectures.11-13 Fabricating silicide nanostructures and investigating their properties have become one of the main challenges of the IC industry and laboratory research.11-14 Copper-silicon reactions have been investigated intensively since Dash first used copper to decorate dislocations in silicon crystals in 1956.15 There are three stable Cu-Si alloy phases at room temperature and η00 -Cu3Si is the most commonly observed one.16 Besides being studied for microelectronics applications,1-4 Cu3Si also has applications as catalysts of hydrogenation, chlorosilanes formation, and gas etching of silicon.17-19 Recently, shape-controlled syntheses of contacted Cu3Si nanostructures on differently oriented silicon wafer surfaces have been reported.20-22 Growth of the Cu3Si nanostructures were carried out in inert conditions with CuO and graphite mixture as the vapor source. This growth approach is different from that of the contacted silicide nanostructures of other metals, for example, CoSi2, NiSi and rare earth silicides, that were grown by the sublimation of pure metals on cleaned silicon surfaces in an ultrahigh vacuum condition (>10-10 Tor).23-25 This disparity might be due to the differences in growth mechanisms between copper silicide and other metallic silicides nanostructures. The mechanisms
for other silicides nanostructures grown in ultrahigh vacuum conditions have been extensively studied,26,27 for example, anisotropic lattice mismatch and spontaneous symmetrybreaking. However, relatively little is known about the formation mechanism of Cu3Si nanostructures. Varied, and sometimes contradictory, reports on the synthesis of Cu3Si nanostructures have resulted because of this obscurity.20-22 In this paper, we present our experimental results that support the hypothesis that the Cu3Si nanostructures were synthesized through a silicon void-filling process. We also demonstrate that this void-filling mechanism can be extended to grow aligned germanium nanowires (Ge NWs) on silicon substrates. Experimental Section The growth of Cu3Si nanostructures was carried out in a homemade tube furnace. The vapor source (Cu or CuO powder) was placed at the center of the furnace and a 1 1 cm silicon (001) wafer was placed downstream 2 cm from the vapor source. When copper was chosen as the vapor source, silicon (001) wafers with a thin oxide layer (∼2 nm, formed by thermal oxidation in 1 atm O2 pressure at 700 C for 30 min) were used as the substrates. Argon gas was used to purge the air in the tube before the experiments were carried out. The furnace was heated up with a temperature ramp rate of 20 C/min and held at the desired temperature (between 650 to 900 C) for 30 min to 5 h. The samples were then cooled down naturally. Morphologies of the Cu3Si nanostructures were observed by field emission scanning electron microscopy (FE-SEM; JEOL 6340F). The transmission electron microscopy (TEM) samples were prepared using Carl Zeiss NVison 40 Crossbeam focus ion beam (FIB) system. A thin layer of Pt was deposited on the area of interest’s surface to protect the subsurface of the sample. Next, the Cu3Si nanostructures were cut along Si [110] and Si [110] directions. The samples were milled with an acceleration energy of 30 keV until the thickness of the lamella was approximately 100 nm. Then, it was further cleaned by milling with a lower acceleration energy of 5 keV before being transferred onto a copper grid. The TEM characterization and selected area diffraction (SAD) pattern analysis were carried out using JEOL 2100F with an accelerating voltage of 200 keV.
Results and Discussion
*To whom correspondence should be addressed. E-mail: CLGan@ ntu.edu.sg.
Morphology and Structure of Cu3Si Nanostructures. When CuO was used as the vapor source, octahedral Cu3Si nanostructures (o-Cu3Si) grew on the Si (001) wafers in ambient air condition over the temperature range of 650 to 900 C. In argon condition, the growth of o-Cu3Si only occurred within
r 2010 American Chemical Society
Published on Web 05/27/2010
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Figure 1. SEM characterizations of Cu3Si nanostructures. (a) o-Cu3Si on Si (001) wafer surface, (b) s-Cu3Si on Si (001) wafer surface, (c) w-Cu3Si on Si (001) wafer surface, and (d) nano-octahedral Cu3Si on Si (001) substrate.
two temperature zones (either from 650 to 680 C or from 750 to 900 C). Between these two zones, wire-shaped Cu3Si nanostructures (w-Cu3Si) were obtained. With copper as the vapor source, o-Cu3Si was obtained at relatively low temperatures (650-700 C) and w-Cu3Si became the dominant products at elevated temperatures (700-900 C). Without specific mention, the following characterization results were all taken from the samples grown with copper as the vapor source. Figure 1a,c shows FE-SEM images of the o-Cu3Si and w-Cu3Si grown on SiO2/Si (001) substrates. Both had developed from half-filled nano-octahedral voids (Figure 1d). From top view, the nano-octahedral voids appear squareshaped and their four sides are parallel to Si Æ110æ. The small voids grew to become o-Cu3Si at low temperatures (650700 C), with the size increasing from less than 100 nm to around 1 μm (Figure 1a). However, once the size of the o-Cu3Si reached about 1 μm, they only continued to grow marginally while the crystal density per unit area increased. The nano-octahedral voids could also evolve to w-Cu3Si at higher reaction temperatures (700-900 C). In a short growth time (15 min at 720 C), the nano-octahedral voids grew to become spindle-shape nanostructures (Figure 1b). By
increasing the growth time, w-Cu3Si with a length distribution from several micrometers to tens of micrometers and widths between 100 and 200 nm were obtained as shown in Figure 1c. All the wires were aligned along the Si Æ110æ directions. A small amount of o-Cu3Si was also found on the sample surface. However, different from the o-Cu3Si that is shown in Figure 1a, these o-Cu3Si structures were half-filled with precipitates (see Supporting Information, Figure S1). FIB microscopy was used to localize the sites of interest and prepare the TEM samples for the exploration of η00 -Cu3Si microstructures and Cu3Si/Si interfaces. There are three polymorphs of Cu3Si and they can be transformed by varying the temperature: η (stable above 600 C) f η0 (stable above 531 C) f η00 phase.28 All three polymorphs are composed of similar structural units. The η phase Cu3Si has a space group of P3m1 and lattice parameters of a = 4.06 A˚ and c = 7.33 A˚.28 The η0 -Cu3Si has a superlattice structure of the η phase with a space group of R3, and the η00 -Cu3Si is constructed by the special faulted stacking of the η0 phase.28,29 Therefore, for simplicity, plane spacings based on the η phase were used for the structural analysis. Figure 2 shows the TEM images and SAD pattern analysis of the o-Cu3Si nanocrystals prepared by FIB. The o-Cu3Si
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Figure 2. TEM characteraiztions of o-Cu3Si. (a) Cross-sectional TEM image of o-Cu3Si viewed along the Si Æ110æ directions, (b) HRTEM image of o-Cu3Si taken along the [0001]η direction with diamond shape Moire patterns, (c) HRTEM image of Cu3Si/Si interface viewed along the [0001]η direction, (d) HRTEM image of Cu3Si/Si viewed along the [1120]η direction, (e) simulated η-Cu3Si DP along the [0001]η zone axis, (f) SAD patterns of the o-Cu3Si sample taken along the [0001]η zone axis, and (g) 3-D model of o-Cu3Si.
shows a sectorial cross section projected from Si Æ110æ directions (Figure 2a). Both interfacial planes between Si and Cu3Si are at 54 to the Si surface and the angle between these two interfaces is 72, which matches well with the octahedral crystal model (Figure 2g). Diamond-shaped Moire patterns are shown on the TEM image taken from the [0001]η direction (Figure 2b). Such patterns are a result of a long-period antiphase domain (LPAPD) and have also been reported previously for epitaxial Cu3Si thin films grown on silicon.30 High-resolution TEM (HRTEM) images (Figure 2c,d) of the Cu3Si/Si interfaces taken along [0001]η and [1120]η directions show that the four interfaces between Si {111} and Cu3Si are all lattice incoherent, which is the same as that reported for Cu3Si precipitates in faceted silicon voids.31 The SAD pattern taken along the [0001]η zone axis and the simulated diffraction pattern (DP) of the η phase Cu3Si with the same orientation are shown in Figure 2, panels e and f, respectively. Double diffraction is observed on the DP, and this is because of the existence of LPAPD along the [0001]η direction, where the initial diffraction beam is rediffracted at the domain boundaries and forms satellite spots around the primary reflections.28,32 The 3-D model of the o-Cu3Si based on the TEM results is shown in Figure 2g. The o-Cu3Si is constructed from a combination of a half octahedron and a spherical cap. The half octahedron is buried in silicon and surrounded by four Si {111} planes (the octahedron corner is sometimes truncated by the Si (001) plane), and the spherical cap is buried within SiO2. All the four interfaces between Cu3Si and Si {111} are lattice incoherent and a small lattice rotation of 2 between η-Cu3Si [0001] and Si [110] is observed (such a rotation was not seen in w-Cu3Si as shown in Figure 3c).
Figure 3 shows the TEM images and SAD of the w-Cu3Si. Similar to the o-Cu3Si, it is also buried at the SiO2/Si interface and exhibits a sectorial shaped cross-section. Moire patterns which resulted from the formation of LPAPD are also observed (Figure 3b). However, unlike the diamondshaped Moire patterns obtained from o-Cu3Si, Cu3Si films or w-Cu3Si samples (which became polycrystalline by the irradiation of a strong electron beam, see Supporting Information, Figure S2), parallel Moire fringes with a spacing of 0.6 nm were observed in the w-Cu3Si cross-sectional image. The transformed pattern is related to the strain produced by the lattice mismatch between Cu3Si (0001)η and Si {110}. Figure 3c,d shows the HRTEM images of the Cu3Si/Si interface and single Cu3Si phase, respectively. Different from the o-Cu3Si, zigzag lattice coherent interfaces between Cu3Si and Si are observed on the w-Cu3Si sample. The unevenness of the coherent interfaces is associated with the elastic strain field that accommodates the lattice mismatch.33 Compared with an atomic flat coherent interface, this structure increases the interfacial energy between Si and Cu3Si. The strain created at the Cu3Si/Si interfaces changes the relative weights of the structure factors of different Cu3Si planes, and further transforms the Moire patterns. The SAD pattern along the [1120]η zone axis and the simulated DP of η phase Cu3Si with the same orientation are shown in Figure 3, panels g and h, respectively. Compared with the simulated DP, two-dimensional stackings are observed in the η00 -Cu3Si nanowire. The superlattice reflections along the [0001]η direction are not periodic, which results in an irrational vector length along the c-axis on the diffraction pattern. Two kinds of stackings along the [1100]
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Figure 3. TEM characterizations of w-Cu3Si. (a) Cross-sectional TEM image of w-Cu3Si viewed along the [0001]η direction, (b) HRTEM image at the Cu3Si/Si interface with parallel-shaped Moire fringes, (c) HRTEM image of Cu3Si/Si interface viewed along the [0001]η direction, (d) TEM image of single phase Cu3Si region with Moire patterns viewed along the [0001]η direction. The scale bars in (c) and (d) are 1 nm. (e) Cross-sectional TEM image of w-Cu3Si viewed along the [1120]η direction with inset SAD patterns, (f) HRTEM image of w-Cu3Si taken along the [1120]η direction, (g) enlarged SAD pattern of w-Cu3Si taken along the [1120]η zone axis, (h) simulated η-Cu3Si DP along the [1120]η zone axis, and (i) 3-D model of w-Cu3Si.
direction have been observed. A periodic stacking with 3d-1100 spacing along the [1100] direction is recorded. Besides this, similar to the stacking of 3C-SiC and η0 -Cu3Si,28,34 a layer-by layer stacking is also seen in the same direction. Considering a hexagonal layer as one stacking unit, the second layer is shifted -1/3a þ 1/3b relative to the first layer, and the third layer has the same shift relative to the second layer, and so on. Because of this layer-by-layer stacking, the column of reflections is slanted as shown by the solid white lines in Figure 3g.28 A 3-D model of the Cu3Si nanowire based on the TEM results is shown in Figure 3i. Buried at the interface of SiO2/Si (001), the single-crystalline w-Cu3Si displays a similar cross sectional view with the o-Cu3Si, and grows anisotropically along the Si Æ110æ directions. Growth Mechanism. Although both CuO and Cu can be used as the vapor source for the growth of Cu3Si nanostructures under slightly different experimental conditions, Cu was preferred as the source in our experiments. If CuO is chosen as the vapor source, the reaction 2CuO þ Si f 2Cu þ SiO2 will occur and the reduced metal copper atoms will continue to react with silicon to form silicide: 3Cu þ Si f Cu3Si.35 However, the formation of SiO2 hinders the diffusion of copper ions from the surface into silicon and thus inhibits the silicide growth. The diffusivity of copper in intrinsic silicon was reported to be DSi = (3.03 ( 0.3) 10-4 e(-0.18(0.01)eV/kBT cm-2/s by the transient ion drift
technique, while the value in SiO2 is only DSiO2 = 7.6 10-6 e-1.82eV/kBT cm-2/s.36,37 To avoid such a situation, we chose copper as the vapor source and used SiO2 capped Si wafer (tSiO2 ≈ 2 nm) as the substrate. On the basis of our characterization results, we propose that the formation of o-Cu3Si is a result of the complete filling of the silicon voids with Cu3Si precipitates. The TEM characterizations of the o-Cu3Si have shown that the Cu3Si/Si interfaces are lattice incoherent (Figure 2c,d). Calculations indicate that the reaction 3Cu þ Si f Cu3Si in our experiments is diffusion limited within the whole temperature range (650-900 C) (see Supporting Information), and the Cu3Si precipitates have enough time to minimize the system energy through phase and shape transformations. If the growth of Cu3Si is not restricted by the silicon void templates, spherical shaped Cu3Si will be favored to minimize the interfacial energy.38 On the other hand, half-filled silicon voids (Figure 4a,b, Supporting Information, Figure S1) formed by the faster growth of silicon voids than that of Cu3Si precipitates have been observed, which also implies that the formation of Cu3Si nanostructures comes from the filling of the silicon voids with Cu3Si precipitates. Since the formation of o-Cu3Si is due to the void filling process, the study on the o-Cu3Si growth mechanism is focused on the void formation and growth process. A series of verification experiments were carried out, and FE-SEM characterizations demonstrated that the silicon void growth
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Figure 4. SEM image of (a) half-filled o-Cu3Si and silicon voids on the w-Cu3Si sample surface, (b) Cu3Si nanowires grown from octahedral Cu3Si and voids shown at the tips of NWs, and (c) Ge NWs grown along Si Æ100æ with half-filled o-Cu3Si as catalyst. The scale bar in the inset image is 200 nm.
was enhanced with the assistance of Cu3Si precipitates. For example, at the same reaction temperature, we observed that the o-Cu3Si structures grew faster when copper was used as the vapor source instead of CuO. In addition, no faceted void was observed by simply annealing a cleaned silicon wafer between 650 and 900 C in inert condition. Further experiments also showed that the silicon void formation was affected by the initial thickness of the SiO2 layer. In a control experiment, both large irregular particles (which are polycrystalline Cu3Si as proven by X-ray diffraction characterizations) and shaped nanostructures were obtained on a HF cleaned silicon (001) wafer surface. In our experimental growth conditions, it was impossible to create the microsized voids simply through the diffusion of silicon because of the large activation energy for silicon self-diffusion (4.15.1 eV).39 Considering the strong catalytic ability of Cu3Si to silicon oxidation, we believe that the observed silicon voids in the experiments are due to the formation and desorption of SiO at high temperatures with the assistance of Cu3Si. Cu3Si has been reported to show extraordinarily high catalytic ability to silicon oxidation even at room temperature,40 and the formation of the Si-O bond.41 It is believed that Cu3Si can also catalyze the reverse reaction of Si-O bond breaking under special conditions.42 The SiO2 decomposition reaction Si þ SiO2 f 2SiOv usually takes place at temperatures above 1000 C in an ultrahigh vacuum condition. However, the formation of SiO by heat treatment of a mixture of Si and SiO2 in ambient argon was also reported.43 Studies have also shown that this process is strongly enhanced when trace amount of copper is deposited on the SiO2 surface.42,44 It seems that such enhancement of SiO2 decomposition is due to the formation of Cu3Si because copper reacts with SiO2 and forms Cu3Si at a high temperature in ultrahigh vacuum conditions.45 The formation process of silicon voids can be described as follows: During the initial reaction, Cu3Si precipitates at the oxide/silicon interface and catalyzes the reaction between silicon and SiO2. Si-Si bonds in silicon and Si-O bonds in SiO2 are broken by the catalysis of Cu3Si, which leads to the reaction Cu3 Si
Si þ SiO2 sf 2SiOv . Because Si {111} planes have the highest surface atomic density of all silicon planes, this reaction will take place along Si Æ111æ directions kinetically. Thus, SiO2 at the oxide/silicon interface is decomposed to SiO with the catalysis of Cu3Si
first. The formed SiO then acts as the oxygen transporter and its desorption from the oxide/silicon interface accelerates the void formation process. The growth of voids along Si Æ111æ occurs continually with the desorption of SiO at high temperatures. But the volatized SiO is oxidized to SiO2 again on the wafer surface because of the inevitable presence of a trace amount of oxygen in the reactor. Similar to the Cu3Si precipitates filled silicon voids that we have observed, empty faceted silicon voids formed by high temperature annealing of the SiO2/Si wafer have also been reported.46-51 Compared with the previous reports, we found that silicon voids can form at a much lower temperature with the assistance of Cu3Si (Itsumi et al. observed silicon voids formation at around 1000 C46-51), and the growth rate is also accelerated. By monitoring the formation process of o-Cu3Si with FESEM, it is interesting to find that the growth of o-Cu3Si is due to repeated cycles of the site saturation process.52 Initial nucleation occurs almost concurrently in the beginning, which results in narrow distributed crystal sizes. This observation also demonstrates that the voids must grow from defect sites that are already present at the SiO2/Si interface before the growth begins. The growth of o-Cu3Si generates new defects at the SiO2/Si interface because of the extra volume created by the formation of Cu3Si.38 New nucleation sites and growth dominates once the o-Cu3Si sizes reach around 1 μm (Figure 1a). The above observations can be explained by the kinetic competition between the generation of new voids and the growth of existing voids. At the initial stage, void growth is favored to lower the system energy. However, once the void size becomes larger than the critical value, the continued growth of these voids is reduced by the nucleation of new sites. Compared with the formation of o-Cu3Si, the growth of w-Cu3Si seems more complicated since the body of w-Cu3Si is not fixed by the original void shape. The lattice strain between w-Cu3Si and Si, and the crystal microstructure at the Cu3Si nanowire tip regions, were studied by HRTEM to understand the driving force behind the anisotropic growth of Cu3Si. The lattice strain along the w-Cu3Si growth direction was confirmed by the uneven lattice coherent Cu3Si/Si interfaces (Figure 3c). Small faceted copper silicide precipitates near the w-Cu3Si tips are also observed in the TEM image (see Supporting Information, Figure S3). These precipitates accumulate at the tip regions of w-Cu3Si and exhibit the same crystal shapes as the Cu3Si precipitates in silicon crystal.31 These results imply that the anisotropic growth of
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Scheme 1. Formation Process of o-Cu3Si and w-Cu3Sia
a
The scale bars are 5 μm.
w-Cu3Si is fueled by the faster coarsening of the Cu3Si filled voids along the axial directions than that of the radial directions. If the Cu3Si/Si interfaces are incoherent (Figure 2c,d), the isotropic growth of the voids along Si < 111> is expected. However, this scenario is unlikely with the increased copper concentrations in silicon. Coherent interfaces between w-Cu3Si and silicon (Figure 3c) are formed. The ultrasmall Cu3Si filled voids (
