Universal linear-optical logic gate with maximal intensity contrast ratios

next-generation information technology (IT) because of the low power consumption and rapid response. ... the next generation of technology bases.1,2 R...
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Universal linear-optical logic gate with maximal intensity contrast ratios Changnan Peng, Jiayu Li, Huimin Liao, Zhi Li, Chengwei Sun, Jianjun Chen, and Qihuang Gong ACS Photonics, Just Accepted Manuscript • DOI: 10.1021/acsphotonics.7b01566 • Publication Date (Web): 15 Jan 2018 Downloaded from http://pubs.acs.org on January 16, 2018

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Universal linear-optical logic gate with maximal intensity contrast ratios Changnan Peng, #,† Jiayu Li, #,† Huimin Liao, † Zhi Li,*,† Chengwei Sun, †,‡ Jianjun Chen, *,†,‡,§ and Qihuang Gong†,‡,§ †

School of Physics, Peking University, Beijing 100871, China

‡

State Key Laboratory for Mesoscopic Physics, Collaborative Innovation Center of Quantum

Matter, Peking University, Beijing 100871, China §

Collaborative Innovation Center of Extreme Optics, Shanxi University, Taiyuan, Shanxi

030006, China KEYWORDS: Logic gate, linear-optical, universal, surface plasmons

ABSTRACT: Linear-optical logic gates have the potential to be the bases of the next-generation information technology (IT) because of the low power consumption and rapid response. This study proposes a general theoretical model to obtain the optimal solutions for linear-optical logic gates. All common logic gates (AND, OR, NOT, NAND, NOR, XOR, and XNOR) are experimentally demonstrated with one single sample structure based on ultracompact plasmonic waveguides. The measured intensity contrast ratio between the output-logic “1” and “0” states reaches 28 dB for the OR gate and 9.4 dB for the AND gate, thereby approaching the theoretical maximum of infinity and 9.5 dB, respectively. The proposed logic gates provide uniform output intensities for identical output logics when the input logics are different. The measured intensity discrepancies are below 1% for the three output-logic “1” states of the OR gate and the three output-logic “0” states of the AND gate. This phenomenon is favored in practical applications and the cascading of logic gates. The proposed universal linear-optical logic gate with maximal intensity contrast ratios may find important future applications in the field of IT. ACS Paragon Plus Environment

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Logic gates are the bases of modern information technology (IT). However, the development of electronic logic gates is facing the bottlenecks of power consumption, heat dissipation, and response speed. With nearly immediate responses, optical logic gates have the potential to be the next generation of technology bases.1,2 Recent studies on optical logic gates exhibit two trends, namely, using nonlinear optical effects3–7 and seeking in the linear region.8–26 The nonlinear effects require high optical power to operate because the nonlinear optical coefficients of natural materials are small, which hinders their applicability. By contrast, linear-optical approaches may identify a practical method that, in principle, can work at arbitrarily-low intensity levels. Present studies on linear-optical logic gates mainly focus on the types of optical structures that can implement optical logic. 8–26 Common logic gates, such as AND, OR, NOT, NAND, NOR, XOR, and XNOR, have been demonstrated in various sample structures, including photonic crystals,9–14 nanowire networks,15,

16

slot waveguides,17–19 and

dielectric-loaded surface plasmon polariton (SPP) waveguides.20–22 However, a systematic theoretical analysis is missing in these studies. Therefore, the intensity contrast ratios of these gates between the output-logic “1” and “0” states are not optimized, which is an important performance index for practical applications. In addition, the output intensities for identical output logics are not uniform for different input-logic states. For example, the AND gate is often implemented by constructive interference of two input lights or SPPs.18 If the input logic is (1, 1), then the output intensity is 4, which is the square of the output amplitude of 2. When the input logics are (0, 0) and (1, 0), the output intensities of 0 and 1 are obtained, respectively. To fulfil an AND gate, the output intensities of 0 and 1 must be treated as output-logic “0” by setting the logic threshold to a value between 1 and 4. This type of inconsistency of output intensities for the identical output-logic states could bring difficulties to practical applications and logic-gate cascading. Moreover, it is inefficient that each logic gate requires a specific sample structure to realize. In this study, we propose a general theoretical model to obtain the optimal solutions for double-input–single-output linear-optical logic gates. We find that the maximal intensity contrast ratios between the output-logic “1” and “0” states are theoretically infinite for the OR, NOT, NAND, XOR, and XNOR gates and 9:1 (9.5 dB) for the AND and NOR gates if a ACS Paragon Plus Environment

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third invariant port is introduced. We also find that the realization of the uniform output intensities for identical output-logic states is possible. To test our proposal and analysis, we experimentally fabricate a single universal sample structure based on ultracompact plasmonic waveguides. All the seven common logic gates are successfully demonstrated in the single structure, which well confirms the theoretical analysis. The measured intensity contrast ratio between the output-logic “1” and “0” states reaches 28 dB for the OR gate and 9.4 dB for the AND gate, thereby approaching the theoretical maximum. The measured intensity discrepancies are below 1% for the three output-logic “1” states of the OR gate and three output-logic “0” states of the AND gate.

Theoretical model and analysis In linear optics, the major physical quantities are the amplitude (|z|) and phase (θ) of the light field, which can be represented together by the complex amplitude (|z|eiθ). The complex amplitude of the output field of a linear-optical logic gate has additivity due to linearity, and the output intensity equals the module square of the complex amplitude. The seven common logic gates (i.e., AND, OR, NOT, NAND, NOR, XOR, and XNOR) are double-input– single-output logic gates. That is, these gates have two input-logic ports and one output-logic port. Therefore, for linear-optical approaches, the output fields of these logic gates can be written as a linear superposition of all the input fields (Figure 1), which can be specified as follows:  =  +  + ,

(1)

where S is the complex amplitude of the output field at the output-logic port. The first and second terms on the right hand side of Equation (1) denote the components in the output field that is contributed by the first and second input-logic ports (called inputs A and B), respectively. The binary variables A and B indicate the logic states of the inputs A and B, which can be either ON (= 1) or OFF (= 0). The complex parameters of α and β represent the contributions of the inputs A and B to the output field when the input-logic state is ON (A, B = 1), respectively. The third term γ denotes the sum of all other fixed components in the output field that are unrelated to the states of inputs A and B. For a specific logic gate, γ is a

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constant complex parameter. Experimentally, γ can be controlled by adding a third invariant input port (called invariant C, as shown in Figure 1). In the following analysis, we will demonstrate that introducing such an invariant port may significantly improve the performance of the linear-optical logic gates. According to Equation (1), we can obtain the output fields for the different input-logic states, and the results are listed in Table 1. Evidently, the output fields depend on all of the parameters α, β, and γ. Therefore, adjusting the values of α, β, and γ will enable us to obtain the different output results for the same input-logic states, thereby realizing different logic actions. A specific logic action is actually determined by the relative intensities between different output states. Therefore, the effective physical quantities are the relative values of α, β, and γ. That is, the logic action keeps unchanged when the three parameters are all multiplied by an arbitrary complex number, and only the absolute output intensities alter proportionally. Thus, only specific solutions of the optimal conditions of the logic gates are provided in the following analysis. Note that Equation (1) and the theoretical analysis in this study do not depend on specific sample structures, meaning that they are applicable to all double-input–single-output linear-optical logic gates.

Figure 1. Schematic diagram of the theoretical description of double-input–single-output linear-optical logic gates. Apart from the two input-logic ports A and B, an invariant input port C is introduced to represent the total effects of all other fixed control ports. The binary variables A and B indicate the logic states of the inputs A and B, which can be either ON (= 1) or OFF (= 0). Complex parameters α, β, and γ represent the contributions of the input ports A, B (when the input-logic state is ON), and C to the output field, respectively.

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input (A, B)

(0, 0)

(1, 0)

(0, 1)

(1, 1)

output field S

γ

α+γ

β+γ

α+β+γ

TABLE 1: The expressions for the output field S of a double-input–single-output linear-optical logic gate at different input-logic states, according to Equation (1).

We first consider the OR gate as an example. An ideal OR gate should provide zero output intensity when the two input-logic ports are both OFF. That is, when (A, B) = (0, 0), the output amplitude should be |S| = |γ| = 0, thereby giving γ = 0. Meanwhile, an ideal OR gate should provide uniform non-zero output intensities for the other three input-logic states of (A, B) = (1, 0), (0, 1), and (1, 1). Without loss of generality, we assume |S| = 1 when (A, B) = (1, 0), (0, 1), and (1, 1), thereby providing that |α+γ| = 1, |β+γ| = 1, and |α+β+γ| = 1, respectively. By considering γ = 0, we obtain |α| = |β| = 1 and |α+β| = 1. These conditions are satisfied when α and β have equal modules of 1 and a phase difference of 2π/3. Thus, an ideal OR gate can be realized in principle. For example, we can take α = 1, β = ei2π/3, and γ = 0 as a specific solution. Figure 2 intuitively shows the complex amplitudes of the corresponding field contributions in vectors. For the input logics of (A, B) = (0, 0), (1, 0), (0, 1), and (1, 1), the output intensities are 0, 1, 1, and 1, respectively. Unless otherwise noted, we refer to this input-logic order when we discuss the output intensities throughout this study. For the OR gate, the output logics that correspond to the four input-logic states should be “0,” “1,” “1,” and “1.” Therefore, the output intensity equals 0 for the output-logic “0” state and the output intensities all equal 1 for the three output-logic “1” states. The intensity contrast ratios between the output-logic “1” and “0” states are theoretically infinite. Meanwhile, the results satisfy the consistency of the output intensities for the identical output-logic states.

Figure 2. A specific solution for realizing an ideal OR gate: α = 1, β = ei2π/3, and γ = 0. The left panel intuitively shows the complex parameters α, β, and γ by vectors. The right panel

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indicates that the output intensities are 0, 1, 1, and 1 for input logics of (A, B) = (0, 0), (1, 0), (0, 1), and (1, 1), corresponding to output-logic states of “0,” “1,” “1,” and “1,” respectively. The three output-logic “1” states have uniform output intensities of 1. The intensity contrast ratios between the output-logic “1” and “0” states are theoretically infinite.

We then discuss the AND gate. An ideal AND gate requires the output intensities to be 0, 0, 0, and 1 for the input-logic states of (A, B) = (0, 0), (1, 0), (0, 1), and (1, 1). The first term (|γ|2 = 0) provides that γ = 0. Then, the second (|α+γ|2 = 0) and third (|β+γ|2 = 0) terms provide that α+γ = 0 and β+γ = 0, respectively. By considering γ = 0, we obtain α = β = 0. Consequently, the fourth term (|α+β+γ|2 = 1) cannot be satisfied. This contradiction indicates that an ideal AND gate is impossible with linear-optical approaches. However, we can determine a non-ideal but relatively optimal AND gate. We evaluate the performance of an AND gate by the intensity contrast ratios between the output-logic “1” and “0” states. Accordingly, the intensities of the output-logic “0” states may no longer be zero. We assume that the maximum intensity of the output-logic “0” states is μ2, in which μ is a non-negative real number. Therefore, we should derive the following inequalities for the three output-logic “0” states of the AND gate:

|| ≤ , | + | ≤ , | + | ≤ .

(2)

We want the amplitude of the output-logic “1” state to be as large as possible to increase the output intensity contrast ratio. However, an upper bound exists as follows:

| +  + | = | +  +  +  − | ≤ | + | + | + | + |−| ≤ 3 .

(3)

Therefore, the output intensity contrast ratio of an AND gate satisfies |α+β+γ|2:μ2 ≤ 9:1. Equality is obtained if and only if |α+γ| = |β+γ| = |γ| = μ and α+γ = β+γ = −γ. The former condition provides that the consistency of the output intensities for the three output-logic “0” states is naturally satisfied when the output intensity contrast ratio reaches the maximum. The latter condition provides a specific solution of the optimal situation: α = β = 2/3 and γ = −1/3. Here, the absolute magnitudes of α, β, and γ are chosen that they just provide an output intensity of 1 when the output-logic state is “1”. Figure 3 intuitively shows the complex amplitudes of the corresponding field contributions in vectors for the specific solution. In this case, the output intensities are 1/9, 1/9, 1/9, and 1 for the four different input states, thereby ACS Paragon Plus Environment

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providing a maximum output intensity contrast ratio of 9:1 between the output-logic “1” and “0” states. For comparison, the typical traditional AND gate is realized by constructive interference of two input signals.18 This gate can be fitted in our model with α = β = 1/2 and γ = 0. The corresponding output intensities are 0, 1/4, 1/4, and 1. By setting the output logic threshold to a value between 1/4 and 1, this gate works as an AND gate. Evidently, the output intensities are not uniform for the three output-logic “0” states. More importantly, the output intensity contrast ratio is only 4:1 (6.0 dB), which is not as good as the maximum of 9:1 (9.5 dB). A high output intensity contrast ratio can considerably reduce the error rate and is substantially flexible in practical applications. Thus, the preceding comparison evidently shows that adding a third invariant port apart from the two input-logic ports may significantly improve the performance of a linear-optical logic gate.

Figure 3. A specific solution for realizing a non-ideal but optimal AND gate: α = β = 2/3 and γ = −1/3. The output intensities are 1/9, 1/9, 1/9, and 1 for input logics of (A, B) = (0, 0), (1, 0), (0, 1), and (1, 1), corresponding to output-logic states of “0,” “0,” “0,” and “1,” respectively. The three output-logic “0” states have uniform output intensities of 1/9. The maximum output intensity contrast ratio in theory is 9:1 (9.5 dB).

Similar analyses are also applied to the other five logic gates. Table 2 lists the main results. Detailed vector diagrams for these gates are provided in the Supporting Information. In summary, the optimal OR, NOT, NAND, XOR, and XNOR gates can be intensity-ideal. That is to say, the intensity contrast ratios between the output-logic “1” and “0” states are theoretically infinite. These gates can provide zero output intensities for output logics of “0” and uniform output intensities of 1 for output logics of “1.” However, the AND and NOR gates, which have one output-logic “1” and three output-logic “0” states, cannot be

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intensity-ideal because of the limitation of linearity. The best performance that these two gates can achieve is an output intensity contrast ratio of 9:1, which provides a uniform output intensity at the three output-logic “0” states that is one-ninth of the output-logic “1” intensity.

Types of

Optimal parameters

Output intensities for different inputs

Output intensity

gates

α

β

γ

(0, 0)

(1, 0)

(0, 1)

(1, 1)

contrast ratios

OR

1

ei2π/3

0

0

1

1

1

infinity

AND

2/3

2/3

-1/3

1/9

1/9

1/9

1

9:1

NOT

1

0

-1

1

0

1

0

infinity

NAND

1

ei2π/3

e−i2π/3

1

1

1

0

infinity

NOR

2/3

2/3

-1

1

1/9

1/9

1/9

9:1

XOR

1

-1

0

0

1

1

0

infinity

XNOR

1

1

-1

1

0

0

1

infinity

TABLE 2: Parameter sets for realizing the optimal linear-optical logic gates and corresponding output intensities for different input-logic states. The OR, NOT, NAND, XOR, and XNOR gates can provide output intensity contrast ratios of infinity between the output-logic “1” and “0” states; while the AND and NOR gates can only obtain a maximal output intensity contrast ratios of 9:1 (9.5 dB). These optimal logic gates have uniform output intensities for identical output-logic states when the input logics are different.

Experimental demonstration of the universal linear-optical logic gate To experimentally verify the theoretical analysis, a sample based on plasmonic waveguide is designed and then fabricated by the direct focused-ion-beam (FIB) etching in a 450-nm-thick gold film evaporated on a glass substrate. The sample has a footprint of only 8 µm × 11 µm, which is ultracompact, due to the subwavelength feature of the plasmonic waveguide. Figure 4a shows a scanning electron microscope (SEM) image of the sample. The sample’s structure mainly comprises a central straight SPP groove waveguide and two curved SPP groove waveguides connected to it. The widths and depths of the groove waveguides are approximately 200 and 250 nm, respectively. Details of the cross-section and mode analysis

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of the SPP waveguide are provided in the Supporting Information. At the lower end of each groove waveguide, 100 nm × 300 nm nanoholes that penetrate through the gold film are fabricated using FIB. These nanoholes serve as input A and B and invariant C ports. Three laser beams are focused on these nanoholes from the substrate side and excite SPPs in the groove waveguides. The excited SPPs propagate to the center waveguide junction and then propagate along the upper part of the central waveguide. A 45° reflecting surface is fabricated at the upper end of the central waveguide by gradually reducing the etching time of FIB. This reflecting surface can efficiently scatter SPPs in the groove waveguide to free-space radiations27 and acts as the output S port. Note that the optical logic action is actually performed by the center waveguide junction. Therefore, the waveguide junction functions as an optical logic gate. The input and output waveguides in Figure 4a are fabricated to be relatively long to facilitate the measurements. In principle, these waveguides can be further shrunk and the footprint of the sample can be greatly reduced.

Figure 4. (a) An SEM image of the sample, which comprises a central straight SPP groove waveguide and two curved SPP groove waveguides connected to it. At the lower end of each waveguide, 100 nm × 300 nm nanoholes that penetrate through the gold film serve as input A and B and invariant C ports. A 45° reflecting surface at the upper end of the central waveguide acts as the output S port. (b) Schematic of the experimental setup. The laser is split into three beams to independently excite the input A and B and invariant C ports. The polarization states of the beams are indicated. The parameters α, β, and γ in the theoretical

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model are experimentally adjusted by varying the amplitudes and phases of the three excitation beams. The amplitudes are independently controlled by three attenuators and relative phases are controlled through the two SBCs. By carefully adjusting the relative values of α, β, and γ to the corresponding theoretical values in Table 2, this single sample structure is capable of demonstrating all seven common logic gates.

Figure 4b schematically illustrates the experimental setup. The polarization direction of a linear-polarized beam from a He–Ne laser (λ=632.8 nm) is rotated to a 45° angle from the horizontal by a half-wave plate (λ/2). The horizontal- and z-polarized components obtain a certain phase difference after passing through a Soleil–Babinet compensator (SBC). Thereafter, these two components are split by a polarization beam splitter (PBS). The horizontal-polarized component excites the central invariant C port. The z-polarized component is rotated once again into a 45° polarization by a second half-wave plate and goes through another SBC and another PBS, thereby resulting in two beams to excite the input A and B ports. Note that the excitation lights should be polarized along the short axis of the 100 nm × 300 nm rectangular nanoholes to obtain high SPP excitation efficiencies. Therefore, the horizontal-polarized light split from the second PBS is rotated into the z polarization by a third half-wave plate. Lastly, the three beams are focused by an objective (100×, NA = 0.85) to the three input ports of the optical logic gate from the substrate side. The size of the focused light spot is below 1 µm, which is much smaller than the separations between the input ports (at least 5 µm). Therefore, the three beams can independently excite the three input ports without influences on each other. Scattered lights from the output S port are collected by another objective (100×, NA = 0.85) from the air side and imaged onto a charge coupled device (CCD). The incident laser power is low (below 0.1 mW after passing through the attenuators), thereby ensuring that only linear effects are considered. An input logic state is experimentally defined as “0” or “1” depending on whether the corresponding excitation light is blocked or not. Thus, the parameters α, β, and γ in the theoretical model are experimentally determined by the total effects of the excitation fields on the input ports and subsequent SPP propagations from the input ports to the output port. This fact means that two basic approaches can be implemented to experimentally adjust α, β, and γ. ACS Paragon Plus Environment

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One approach is to fix the excitation fields on the three input ports and change the waveguide structures (the SPP propagation lengths and losses) to adjust the corresponding transmission coefficients from the input ports to the output port. The other approach is to fix the waveguide structures and adjust the intensities and phases of the excitation fields on the three input ports. These two approaches are equivalent in the theoretical model. In the current experiment, we choose the latter one for simplification because this approach has no strict restrictions on the waveguide lengths or losses and all adjustments are easily performed through outside optical elements. The amplitudes of the three excitation fields are independently controlled by the three attenuators in the light paths, and the phase differences are controlled through the two SBCs. By carefully adjusting the relative values of α, β, and γ to the corresponding theoretical values in Table 2, all seven common logic gates are demonstrated with this single sample structure. That is, a universal optical logic gate is realized. A more detailed description of how the experiment was performed is provided in the Supporting Information. Figure 5 shows the experimental results for the OR gate. The beam for exciting the invariant C port is constantly blocked in this case because an optimal OR gate is realized with the condition of γ = 0. Therefore, the three excitation beams are all blocked at the input-logic state of (A, B) = (0, 0) and no light signal appears in the CCD image in Figure 5a. An ideal output-logic “0” state is acquired and the output intensity is theoretically zero if the background signal is excluded. When the input logic is (A, B) = (1, 0) or (0, 1), only one input-logic port is illuminated (Figures 5b, 5c). The output port is bright, thereby corresponding to an output-logic “1” state. For the input logic of (A, B) = (1, 1), the input A and B ports are both illuminated (Figure 5d). However, the output port is as bright as that shown in Figure 5b or 5c because a phase difference of 2π/3 exists between the signals contributed by inputs A and B. We can quantitatively evaluate the output intensity by integrating over the CCD detected output light spot and excluding the background signals in the same region (i.e., signals in Figure 5a with all excitation beams blocked). In the experiment, the relative intensities of different output states are the effective physical quantities which determine the output logic states. Therefore, we set the detected output intensity of one output-logic “1” state to unity and focus on the intensity ratios. The ACS Paragon Plus Environment

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output-intensity ratio of the four input-logic states turns out to be 0:1:1.006:1.008. This result ideally matches the theoretical prediction of 0:1:1:1. The three output-logic “1” states present highly uniform output intensities and the measured intensity discrepancies are below 0.8%. The intensity contrast ratio between the output-logic “1” and “0” states is ultrahigh because the output-logic “0” state is extremely dark after excluding the background signal. In this case, we can estimate the upper limit of the output-logic “0” intensity by the noise signal, which is approximately 0.0015. This result corresponds to an output intensity contrast ratio of as high as 28 dB.

Figure 5. Experimental results for the OR gate. To realize α = 1, β = ei2π/3, and γ = 0, output signals contributed by inputs A and B are experimentally adjusted to have equal amplitudes and a phase difference of 2π/3, and the excitation beam for invariant C is constantly blocked. Figures 5a–5d show CCD images for input logics of (A, B) = (0, 0), (1, 0), (0, 1), and (1, 1). The output intensities of the four figures have a ratio of 0:1:1.006:1.008, after excluding a background signal of 0.051 evaluated from Figure 5a.

Figure 6 shows the experimental results for the AND gate. In contrast to the optimal OR gate with γ = 0, the optimal AND gate is realized with γ = −1/3. That is, the invariant C port is constantly illuminated. Therefore, the output port for the input-logic state of (A, B) = (0, 0) still has a nonzero weak signal that comes from the invariant C port (Figure 6a). This weak output signal corresponds to a non-ideal output-logic “0” state. When the input logic is (A, B) = (1, 0) or (0, 1) (Figure 6b, 6c), the output port is as dark as that in Figure 6a. This result is attributed to that the output signal contributed by input A or B destructively interferes with that contributed by the invariant C (α = β = 2/3, γ = −1/3). All the three input ports are

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illuminated for the input logic of (A, B) = (1, 1) (Figure 6d). The output signal is dominated by the constructive interference between inputs A and B, while the contribution from the invariant C only partly weakens the total signal. Therefore, the output port looks bright in Figure 6d, thereby corresponding to an output-logic “1” state. Quantitative evaluation provides that the output intensities have a ratio of (1/8.67):(1/8.72):(1/8.75):1 for input logics of (0,0), (1,0), (0,1), and (1,1), approximately matching the theoretical prediction of (1/9):(1/9):(1/9):1. The three output-logic “0” states present highly-uniform output intensities because the measured intensity discrepancies are below 0.9%. The experimental output intensity contrast ratio between the output-logic “1” and “0” states is at least 8.67:1 (9.4 dB). This value approaches the theoretical maximum value of 9:1 (9.5 dB). Note that the invariant C port looks considerably brighter than the input A and B ports in Figure 6 because of our detection scheme. To reduce the strong directly scattered lights from the input A and B ports, an x-polarized polarizer is inserted before the CCD throughout the experiment. Therefore, the y-polarized lights scattered from the input A and B ports are generally filtered, whereas the x-polarized lights from the output S and invariant C ports are affected in a limited manner. For this reason, the input A and B ports and related waveguides are designed to have orientations different from the output port. However, the polarizer is engaged only for better observations, and it has little influence on the optical measurement. The reason is that the scattered lights from the input A and B ports can be spatially separated from the signal light of the output port (the input ports obviously locate at regions far away from the output port in the CCD images). Therefore, the polarizer is actually not necessary for the detection. In addition, similar experiments are performed on the same sample for the NOT, NAND, NOR, XOR, and XNOR gates. The results are provided in the Supporting Information. These experimental results are in accord with the theoretical predictions.

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Figure 6. Experimental results for the AND gate. To realize α = β = 2/3 and γ = −1/3, output signals contributed by inputs A and B are experimentally adjusted to have equal amplitudes and equal phases, and the signal contributed by the invariant C has half of that amplitude and an opposite phase. Figures 6a–6d show CCD images for input logics of (A, B) = (0, 0), (1, 0), (0, 1), and (1, 1). The output intensities of the four figures have a ratio of (1/8.67):(1/8.72):(1/8.75):1, after excluding the background signal.

Conclusions To conclude, we have proposed a general theoretical model to describe all double-input– single-output linear-optical logic gates. We use this model as basis to show that the maximal intensity contrast ratios between the output-logic “1” and “0” states for the OR, NOT, NAND, XOR, and XNOR gates are theoretically infinite, while the AND and NOR gates have a maximal output intensity contrast ratio of 9:1 (9.5 dB). Under settings with maximal output intensity contrast ratios, identical output-logic states can have uniform output intensities for different input logics. The theoretical analyses are experimentally verified by using one single sample structure based on ultracompact plasmonic waveguides, in which the seven common logic gates are successfully demonstrated. Such a universal logic gate may substantially reduce the complexity of designing or producing complicated computational devices in the future. The measured intensity contrast ratio between the output-logic “1” and “0” states reaches 28 dB for the OR gate and 9.4 dB for the AND gate, thereby approaching the theoretical maximum. The measured intensity discrepancies are below 1% for the three output-logic “1” states of the OR gate and the three output-logic “0” states of the AND gate. Compared with previously reported gates with non-uniform output intensities for identical output-logic states, the current result of uniform output intensities is favored in practical

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applications and the cascading of logic gates. The current result does not offer the final solution to the optical-gate cascading in which the output phases need to be manipulated as well as the intensities. However, in principle, if the uniform output intensities are combined with some phase normalization techniques, further gate cascading is possible. Note that although the current experiment was performed with the specific sample structure in this study, the theoretical results are general and can be applied to other sample structures and types of waveguides. Thus, the proposed model and universal logic gate represent an important advancement in optical logic gates and may have extensive application in the field of IT.

ASSOCIATED CONTENT Supporting Information. Vector diagrams for demonstrating the specific solutions of the optimal NOT, NAND, NOR, XOR, and XNOR gates and corresponding experimental results are provided in the Supporting Information. Mode analysis of the SPP waveguide and detailed descriptions of the experiment are also provided. AUTHOR INFORMATION Corresponding Author * Email: [email protected]; [email protected]

Author Contributions #

C. P. and J. L. contributed equally to the work.

Notes The authors declare no competing financial interests.

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ACKNOWLEDGMENT This work was supported by the National Basic Research Program of China (Grant Nos. 2016YFA0203500 and 2013CB328704) and the National Natural Science Foundation of China (Grant Nos. 61475002, 61435001, 11674014, 61475005, 11527901, and 11134001).

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