Electrografted Fluorinated Organic Ultrathin Film as Efficient Gate

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Electrografted Fluorinated Organic Ultrathin Film as Efficient Gate Dielectric in MoS Transistors 2

Hugo Casademont, Laure Fillaud, Xavier Lefevre, Bruno Jousselme, and Vincent Derycke J. Phys. Chem. C, Just Accepted Manuscript • DOI: 10.1021/acs.jpcc.6b01630 • Publication Date (Web): 11 Apr 2016 Downloaded from http://pubs.acs.org on April 12, 2016

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The Journal of Physical Chemistry

Electrografted Fluorinated Organic Ultrathin Film as Efficient Gate Dielectric in MoS2 Transistors Hugo Casademont, Laure Fillaud, Xavier Lefèvre, Bruno Jousselme*, Vincent Derycke* Laboratory of Innovation in Surface Chemistry and Nanosciences (LICSEN), NIMBE, CEA, CNRS, Université Paris-Saclay, CEA Saclay 91191 Gif-sur-Yvette Cedex, France. Organic dielectrics, fluorinated diazonium salt, electrografting, MoS2 transistors

ABSTRACT

Dielectric films with nanometer thickness play a central role in the performances of field effect transistors (FETs). In this article, a new class of organic gate dielectric based on the electrochemical grafting of diazonium salts on metallic electrodes is investigated. The versatile diazonium salt strategy is a local and room-temperature process that provides robustness and performances. Moreover, this process produces ultrathin (4-8 nm) and smooth films. To prove their efficiency as gate dielectric, they were integrated in MoS2-FETs gate stacks. The devices display excellent switching behavior for reduced gate bias swing (down to 1V) and suppressed hysteresis thank to the highly hydrophobic nature of the fluorinated grafted film. Furthermore, the devices exhibit steep subthreshold slopes (as low as 110 mV/decade), demonstrating excellent gate coupling.

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INTRODUCTION Dielectric films with nanometer thickness (nano-dielectrics) are a key constituent of microelectronic devices. For metal-oxide-semiconductor field effect transistors (MOSFETs), progresses at the dielectric level accounted for a very significant part of the performance improvement over the years. Silicon dioxide (SiO2) remained for a long time the most used dielectric in integrated circuit technologies. Yet, its limited dielectric constant (k=3.9) requires the use of thinner and thinner layers down to a point where the gate leakage current becomes a severe issue and prevents further scaling. It strongly stimulated research on inorganic high-k dielectrics such as hafnium oxide (HfO2), aluminum oxide (Al2O3) or zirconium dioxide (ZrO2) and on the associated oxide deposition techniques such as atomic layer deposition (ALD), metal organic chemical vapour deposition (MOCVD) and molecular beam deposition. Modern complementary metal-oxide-semiconductor (CMOS) processors have incorporated HfO2 in gate stacks since the 45 nm technological node. Beside the mainstream CMOS technology, other fields such as organic electronics, large-area and/or printable electronics, sensors and display technologies could also benefit from improved dielectrics but with additional advantages in terms of mechanical flexibility, low temperature processes, conformability to structured substrates and equipment cost and simplicity. In this respect, the development of organic nano-dielectrics represents a high potential route. In this context, Vuillaume et al. evidenced that self-assembled monolayers could constitute good insulators and integrated them as gate dielectric in transistors based on sexithiophene.1, 2 Then, Marks and Facchetti demonstrated that molecular monolayers of π-conjugated systems, with a


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donor moiety on one side and an acceptor moiety on the other side (so-called push-pull systems) form highly polarizable insulating films with dielectric constant k ~ 7-8.3–5 These SANDs (selfassembled nano-dielectrics) seem very attractive and were implemented as gate-dielectrics in field-effect transistors (FETs) with a wide variety of semiconducting channel materials: semiconducting oxides, polymers, carbon nanotubes (CNTs) and nanowires (NWs).3–5 It notably highlighted the benefits of combining new dielectrics and new semiconducting materials. In the recent years, transition metal dichalcogenide mono- and multi-layers, and in particular MoS2 (molybdenum disulfide) layers, have received increasing attention,6–8 due to their potential applications in optoelectronics,9–11 low power electronics ,12 and flexible electronics.13–16 Unlike graphene, MoS2 is a 2D semiconductor with a band gap in the 1.2-1.9 eV range depending on the number of layers. The use of ultimately-thin semiconductors as channel material in FETs is highly beneficial in terms of performances provided that they are combined with efficient gate dielectrics allowing optimum gate-channel coupling. So far, MoS2 FETs used mostly SiO2, HfO2 or Al2O3 as gate dielectrics which allowed the fabrication of efficient transistors.17, 18 In this context, we have investigated a new class of organic gate dielectrics based on the electrochemical grafting of diazonium salts on metallic electrodes. This method produces rapidly and at room temperature, robust and densely-packed films of thickness in the 4-8 nm range,19, 20 thanks to respectively: (i) a strong covalent link between the substrate and grafted aromatic rings obtained after reduction of the diazonium salts,19, 21, 22 and (ii) radical attacks on available positions of the grafted aryl groups, which leads to thin multilayer films.23 This electro-localized process was used in FET based on carbon nanotubes network to selectively remove the metallic contribution,24 or to involve specificity for sensors and biosensors applications.25


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To demonstrate the potential of such robust organic dielectric, nanometer thin films were integrated in the local-gate stack of double-gate MoS2 FETs without additional lithography step. The transistors exhibit high ON/OFF ratio for small gate swings and steep subthreshold slopes. The choice of a hydrophobic organic material additionally allows suppressing totally the waterinduced surface charge trapping effect responsible for severe hysteresis issues in the transfer characteristics of back-gated FETs on SiO2. Overall, this study represents the first demonstration of FETs with diazonium-based electrografted thin-films as gate dielectric. EXPERIMENTAL SECTION First, gold coated on silicon wafers were functionalized with the 4-heptadecafluorooctylbenzene diazonium tetrafluoroborate (C8F17BD) which is represented in Figure 1a. The synthesis of this diazonium compound from the amino derivative is described in the Supporting Information (SI). The electrochemical grafting of this diazonium was conducted in a glovebox. The gold-coated silicon substrate was completely immersed in a solution of C8F17BD (10-3 M) dissolved in tetrabutylammonium hexafluorophosphate (10-1 M)/Acetonitrile electrolyte. The substrate was connected with a passivated tungsten tip. Cyclic voltammetry technique between 0 and -0.8V vs Ag/Ag+ (Figure S2) was used to produce a smooth thin layer film of C8F17BD on the gold-coated substrate. The success of the grafting step was proved by XPS measurements (Figure S3). Besides, AFM roughness analyses were conducted on gold substrates before and after the grafting of C8F17BD. The RMS roughness barely increases from 0.5 (before grafting) to 0.7 nm (after grafting), proving the smoothness of the grafted film.


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Figure 1. (a) Chemical structure of C8F17BD. (b) Schematic representation of the electrografted film on gold. (c) AFM image (left) and height profiles (right) of three gold electrodes. Only the middle one has been electrografted. Based on these results, we decided to integrate these ultrathin films as gate dielectrics of MoS2 FETs. The MoS2 FETs were fabricated on degenerately p-doped Si wafers (resistivity 0.0010.005 Ω.cm) covered with 150 nm of thermally grown SiO2. First, local metallic gate electrodes (Cr 0.8 nm / Au 25 nm) were patterned by e-beam lithography followed by Joule evaporation at low temperature (110 K, for reduced roughness) and lift-off. The electrodes were then cleaned by oxygen reactive ion etching (RIE) and functionalized as described above with the C8F17BD (Figure 1a) to form the local dielectric film. This compound was selected for its hydrophobic properties coming from the fluorinated alkyl chain and his ability to form compact and


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homogeneous thin films. Figure 1b shows a schematic representation of the film structure. According to the number of grafting cycles, the film thickness is in the 4-8 nm range. The organic layer thickness was determined by AFM as shown in Figure 1c by comparison with nongrafted electrodes. Thinner films, below 4 nm, are generally not homogeneous and the deposition is not reproducible. Similarly, thicker films cannot be obtained since the electronic transport becomes impossible in the insulating layer formed during the electrodeposition of the diazonium salt. Then, MoS2 flakes were mechanically exfoliated from a natural crystal and transferred onto the patterned substrate (note however that the process flow is independent of the MoS2 source and could in principle be applied to 2D-semiconductors exfoliated in solution,26 or to CVD (chemical vapor deposition) materials associated with a transfer step 27). Optical microscopy was used to locate MoS2 flakes located on a local gate electrode. Thanks to the strong covalent grafting of the dielectric film, a second step of e-beam lithography, evaporation and lift-off can be performed to pattern Source/Drain contacts (Cr 0.8 nm / Au 25 nm) on appropriate MoS2 flakes. The final structure of our FETs is depicted in Figure 2a. The FETs are doubly-gated with: a local gate (LG) based on the electrografted dielectric (AFM profiles of 4 nm thick and 7 nm thick electrografted films used in FETs are presented in Figure S4) and a back-gate (called global gate (GG) in the following), consisting of the Si p-doped wafer covered with 150 nm of SiO2. This double-gate geometry, typical in the literature,28, 29 allows controlling independently the conductivity of the access areas (i.e. the MoS2 sections labelled (i) and (iii) located between the source or drain contact and the local gate) with the global gate. It is thus powerful to assess separately the impact of the channel and of the dielectric efficiency in the overall device performance.


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Figure 2. (a) Schematic representation and SEM image (scale bar = 500 nm) of a MoS2 FET with a local-gate electrode electrografted with C8F17BD. The sections of the MoS2 flake in contact with SiO2 are labelled (i) and (iii) while the section on the organic dielectric is labeled (ii). (b) Transfer characteristic ID(VLG) and gate-leakage current ILG measured at VDS = 1.5 V and VGG = 40 V for an organic dielectric thickness of 7 nm. (c) Output characteristics ID(VDS) at VGG = 40 V for different values of VLG. (d) Output characteristics ID(VDS) at VLG = 0.8V for different values of VGG.


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RESULTS AND DISCUSSION Electrical measurements were carried out in air at room temperature using a semiconductor parameter analyzer (Agilent 4156C). The results for a gate dielectric thickness of 7 nm are first presented. Figure 2b and Figure 2c display respectively the transfer characteristic ID(VLG) at fixed VGG and the output characteristics ID(VDS) at fixed VGG for different values of the local gate bias. ID(VDS) curves correspond to typical n-type FET characteristics with current saturation at moderate VDS for all values of VLG. At low source-drain bias, the characteristics have a nonohmic behavior which is typical of FETs limited by charge injection issues which originate from both the Schottky barriers at the metal/MoS2 interfaces,30 and the limited back-gate-induced doping of the access sections. Increasing VGG reduces the barriers width and increases the conductivity of the access sections thus improving performances as shown in Figure 2d. The transfer characteristic ID(VLG) of Figure 2b was thus measured at VGG = 40 V. Remarkably, a small gate swing of 1 V (-0.25 to 0.75 V) allows tuning the drain current by a factor of ~3×103. In the OFF-state, the subthreshold slope is ~145mV/dec, indicating that the gate dielectric/MoS2 capacitive coupling is very efficient. In this 1V window of operating gate bias, the gate-leakage current ILG through the organic dielectric is very low and does not impact the performances, as can be seen in Figure 2b. To compare the efficiency of the organic dielectric with the one of the SiO2 layer, we also measured the transfer characteristics as a function of the global gate potential while fixing the local gate one at VLG = 0.8 V. In this configuration, the MoS2 area on top of the electrografted dielectric (labelled (ii)) is in its ON-state and the current is limited by the modulation of the conductivity in the access sections (i) and (iii) controlled by the global gate potential. The subthreshold slope associated with 150 nm of SiO2 is ~1.8 V/dec. Both transfer characteristics


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(using either the local gate or the global gate) are superimposed at the same scale in Figure 3a which highlights the remarkable efficiency of the local gate associated with the small dielectric thickness. Knowing the thickness ratio between the two dielectrics, we can estimate the permittivity ratio from the subthreshold slopes (further details on this estimation can be found in the SI). Indeed, the subthreshold slope can be expressed as: =

×

× ln(10) × (1 +

),

where k is the Boltzmann constant, T is the temperature, q is the electron charge, CD is the depletion capacitance, CIT is the capacitance associated with interface traps and =

×

is the capacitance of the dielectric (where ε0 is the vacuum permittivity, εdiel is the relative dielectric permittivity and tdiel is the dielectric thickness).31 From these formulas and considering that CD dominates over CIT, one can deduce the permittivity ratio as a function of the !"

subthreshold slopes:

#

%$=

&#$% '( & !" '(

!"

×

#

%$with ) =

×

× ln(10). The obtained ratio is close

to unity indicating that the permittivity of our organic dielectric is close to the one of SiO2.


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Figure 3. (a) Transfer characteristics ID(VLG) in red and ID(VGG) in black for both directions of the gate bias sweep. (b) Zoom on ID(VLG) showing the absence of hysteresis for the organic dielectric. Insert: water contact angle measured on a gold surface electrografted with C8F17BD. In Figure 3a, one can also note that, when the state of the device is controlled by the global gate, a large hysteresis in the transfer characteristics occurs when changing the direction of the gate bias sweep. SiO2 is well known to induce such hysteresis in the transfer characteristics of back-gated FETs for most types of channel materials (organic semiconductors, CNTs, NWs, etc.). This hysteresis is related to charge traps located in the dielectric layer, at the dielectric surface and in adsorbates. In particular, water is known to play an important role as it can mediate the charging of trap states through redox reactions.32 To hinder this detrimental


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hysteresis behavior, our organic dielectric was designed to be hydrophobic through the use of a large amount of Fluor atoms in the alkyl chain. Contact angle measurements on gold surfaces grafted with C8F17BD confirmed the hydrophobicity of the dielectric: as shown in the insert of Figure 3b, a contact angle of 108° was estimated. As a result, our FETs are hysteresis-free when the local gate is used to control the state of the device (Figure 3b). This represents a very important advantage of trap-free hydrophobic organic dielectrics over conventional inorganic dielectrics. Additional performance improvement can be achieved by reducing further the organic dielectric thickness. Figure 4a and Figure 4b display respectively the transfer and output characteristics obtained with a 4 nm-thick organic layer. Remarkably, the subthreshold slope improved to 110 mV/dec, the ION/IOFF ratio is >104 for 1.5 V of gate-swing and the gate-leakage current remains very small. This subthreshold performance compares very well with state-of-theart transistors based on SANDs, highlighting the promising potential of our electrografted dielectric.33–36 Nevertheless, the performances obtained with high-k inorganic dielectrics remain superior (S < 90 mV/decade, ION/IOFF > 107).12,17,18,29 One can also note in Figure 4b that the ID(VDS) curves are ohmic at low VDS. This comes from better metal/MoS2 contact resistance and/or higher initial doping level of the MoS2 flake when compared with Figure 2. It thus confirms that the performances reported in Figure 2 were not limited by the characteristics of the organic dielectric and that further improvement can be expected with optimized channel materials. Moreover, as it was shown in previous articles,17, 18, 29, 30 enhanced performances can also be obtained by encapsulating the MoS2.


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Figure 4. (a) Transfer characteristic ID(VLG) and gate-leakage current ILG measured at VDS = 0.5 V and VGG = 40 V for a MoS2 FET with an organic dielectric thickness of 4 nm. (b) Output characteristics ID(VDS) at VGG = 40 V for different values of VLG. CONCLUSION In summary, we reported MoS2-FETs based on ultrathin (4-8 nm) organic dielectric that display excellent switching behavior for reduced gate bias swing (down to 1V) and suppressed hysteresis in the transfer characteristics. It proves that the type of organic electrografted films described here are suitable as gate dielectric in high performance FETs. Additionally, the dielectric formation is performed at room temperature, allows the localization of the dielectric on selected


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electrodes without additional lithography steps and does not require any underlying inorganic oxide layer as substrate. This latter key advantage will notably enable the integration of such dielectric in flexible devices. The devices performances are due to the thin thickness and compactness of the electrografted film. They could be further improved by changing the molecular structure of the organic thin film to increase his dielectric constant while keeping the decisive advantages of the diazonium grafting route. The results obtained here are not specific to MoS2 materials and similar performances are expected for different channel materials such as graphene and carbon nanotubes. ASSOCIATED CONTENT Supporting Information. -

C8F17BD synthesis,

-

Electrografting process,

-

XPS measurements,

-

Measurements of film thickness (AFM profiles),

-

Estimation of the dielectric permittivity.

This material is available free of charge via the Internet at http://pubs.acs.org. AUTHOR INFORMATION Corresponding Author *(V.D.) E-mail: [email protected]. Phone : + 33 (0)1 69 08 55 65


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*(B.J.) E-mail: [email protected]. Phone : + 33 (0)1 69 08 91 91 ACKNOWLEDGMENT This work was supported by ANR through the SAGe III–V project (ANR Blanc 2011). REFERENCES (1)

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(30) Das, S.; Chen, H.-Y.; Penumatcha, A. V.; Appenzeller, J. High Performance Multilayer MoS2 Transistors with Scandium Contacts. Nano Lett. 2013, 13, 100–105. (31) Sze, S. M.; Ng, K. K. Physics of Semiconductor Devices, Third Edition; Wiley: Hoboken, U.S.A., 2007. (32) Aguirre, C. M.; Levesque, P. L.; Paillet, M.; Lapointe, F.; St-Antoine, B. C.; Desjardins, P.; Martel, R. The Role of the Oxygen/Water Redox Couple in Suppressing Electron Conduction in Field-Effect Transistors. Adv. Mater. 2009, 21, 3087–3091. (33) Wang, L.; Yoon, M.-H.; Lu, G.; Yang, Y.; Facchetti, A.; Marks, T. J. High-Performance Transparent Inorganic–Organic Hybrid Thin-Film N-Type Transistors. Nat. Mater. 2006, 5, 893– 900. (34) Ha, Y.; Emery, J. D.; Bedzyk, M. J.; Usta, H.; Facchetti, A.; Marks, T. J. SolutionDeposited Organic–Inorganic Hybrid Multilayer Gate Dielectrics. Design, Synthesis, Microstructures, and Electrical Properties with Thin-Film Transistors. J. Am. Chem. Soc. 2011, 133, 10239–10250. (35) Everaerts, K.; Emery, J. D.; Jariwala, D.; Karmel, H. J.; Sangwan, V. K.; Prabhumirashi, P. L.; Geier, M. L.; McMorrow, J. J.; Bedzyk, M. J.; Facchetti, A.; et al. Ambient-Processable High Capacitance Hafnia-Organic Self-Assembled Nanodielectrics. J. Am. Chem. Soc. 2013, 135, 8926–8939. (36) DiBenedetto, S. A.; Frattarelli, D. L.; Facchetti, A.; Ratner, M. A.; Marks, T. J. Structure−Performance Correlations in Vapor Phase Deposited Self-Assembled Nanodielectrics for Organic Field-Effect Transistors. J. Am. Chem. Soc. 2009, 131, 11080–11090.


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Electrografted Fluorinated Organic Ultrathin Film as Efficient Gate

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