f Noise Level in Top

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Carrier-number-fluctuation induced ultra-low 1/f noise level in top-gated graphene field effect transistor Songang Peng, Zhi Jin, Dayong Zhang, Jingyuan Shi, Dacheng Mao, Shaoqing Wang, and Guanghui Yu ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.6b15862 • Publication Date (Web): 08 Feb 2017 Downloaded from http://pubs.acs.org on February 9, 2017

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ACS Applied Materials & Interfaces

Carrier-number-fluctuation induced ultra-low 1/f noise level in top-gated graphene field effect transistor Songang Peng, † Zhi Jin, †,＊ Dayong Zhang, † Jingyuan Shi, † Dacheng Mao, † Shaoqing Wang, † and Guanghui Yu ‡ †

Institute of Microelectronics, Chinese Academy of Sciences, Beijing, 100029, China, and ‡State

Key Laboratory of Functional Material for Informatics, Shanghai Institute of Microsystem and Information Technology, Chinese Academy of Sciences, Shanghai 200050, China ABSTRACT

A top-gated graphene FET with an ultra-low 1/f noise level of 1.8×10-12

µm2Hz-1 (f =10 Hz) has been fabricated. The noise has the least value at Dirac point, it then increases fast when the current deviates from that at Dirac point, the noise slightly decreases at large current. The phenomenon can be understood by the carrier-number-fluctuation induced low frequency noise, which caused by the trapping-detrapping processes of the carriers. Further analysis suggests that the effect trap density depends on the location of Fermi level in graphene channel. The study has provided guidance for suppressing the 1/f noise in graphene-based applications. KEYWORDS: graphene, transistor, 1/f noise, charge trap, carrier fluctuation

ACS Paragon Plus Environment

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Graphene is a unique material system in the context of 1/f noise because of its twodimensional (2D) nature, unusual linear energy dispersion, zero-energy bandgap and specific scattering mechanisms.1-5 The 1/f noise amplitude in graphene field effect transistor (GFET) always reveals a V-shape or M-shape gate-bias dependence, which can be attributed to the scattering and fluctuating charges in close proximity to the graphene.

6-9

Several methods have

been attempted to reduce the 1/f noise level in GFETs. Liu et al proposed a new type of GFET with graded thickness in the direction from the contacts toward the channel.10 The device behaves a lower noise level due to the smaller potential barrier fluctuations at metal/few layer graphene interface. Hossain et al found that bombardment of graphene devices with 20-keV electrons can reduce the normalized noise spectral density.11 Stolyarov et al reported that 1/f noise in GFET can be strongly suppressed by introducing h-BN barrier layer to screen the scattering from the substrate.12 It is worth noting that all above reports are based on the backgated GFETs. However, the top-gated GFET is the backbone in the practical graphene based device applications. Liu et al investigated the 1/f noise in top-gated GFET using HfO2 as gatedielectric.13 However, there was no obvious reduction of the noise level compared to the backgated GFET. It is necessary to understand the 1/f noise mechanism and to reduce further the noise level in GFET. In this letter, we report a top-gated GFET with ultra-low current normalized spectral density SI/IDS2 of 1.8×10-12 µm2 Hz-1 at f =10 Hz, which is three orders of magnitude lower than the reported results of micrometer size graphene devices.1 Based on the McWhorter model, we attribute this phenomenon to the carrier-number-fluctuation caused by the trapping and detrapping processes of the carriers in conducting channel through tunneling.


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Figure 1. (a) Optical micrograph of the top-gated GFET. (b) The output current-voltage characteristics of the device. (c) The top-gated transfer characteristics at several bottom-gate voltages (VBG) varying from -10 V to 20 V with a drain bias of 0.5 V. The Dirac voltage varies linearly with the top and bottom-gate voltages (inset). (d) Total resistances (symbols) and the corresponding fitting results (solid line) as a function of VTG at different VBG changing from -10 V to 20 V. (e) The carrier mobility and parasitic resistance as a function of VBG. The device fabricating processes can be found in supporting information. Figure 1a shows the optical micrograph of the top-gated GFET. The distance between source and drain electrode, the top gate length (LTG) and width (W) are 6 µm, 4 µm and 40 µm, respectively. The transport measurements were done by using B1500 semiconductor parameter analyzer in ambient atmosphere at room temperature. Figure 1b represents the output current-voltage characteristics of the device. The drain voltage (VDS) sweeps from 0 V to 1 V, while the top gate voltage (VTG) changes from 0 V to 8 V with a step of 1 V. The drain current (IDS) exhibits linear VDS dependence due to the absence of a band gap in graphene. Using the Si substrate as a global


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bottom-gate allows for dual gating of the device and subsequent determination of the top-gate dielectric capacitance. Figure 1c shows the top-gate control transfer characteristics at several bottom-gate voltages (VBG) at a drain bias of 0.5 V. With the VBG increasing from - 10 V to 20 V, the Dirac voltage (VDirac) of the top-gated transfer curves shifts negatively due to the n-type electrostatic doping induced by the back gate. In addition, the position of VDirac is linearly dependent on the VBG, which is shown in the inset of Figure 1c. The slope extrapolated from this linear shift gives the ratio of the bottom-gate and top-gate capacitances (CBG/CTG).14 Using the capacitance of 300 nm SiO2 of CBG = 11.5 nF/cm2 and the determined slope of 0.02, the top-gate capacitance is estimated to be CTG = 570 nF/cm2. Because the height for CVD graphene layer on SiO2 is usually to be about 1.5 nm, the thickness of the dielectric layer in our device is 17 nm according to the AFM data in Figure 2Se. As a result, the dielectric constant of Al2O3 is estimated to be 10, which is higher than the typical value reported for the Al2O3 film on graphene flake.15,16 We attribute the higher dielectric constant of Al2O3 to the 30 cycles of TMA/O3 ALD process. Different from the Al2O3 film prepared with H2O, ozone-based atomic layer deposition technique can decrease the number of defect states like Al-Al and OH bonds. This low defect states can improve the quality of Al2O3 film, leading to the higher dielectric constant of Al2O3 in our device. In order to eliminate the effect of parasitic resistance, we have used a device model proposed by Kim et al to extract the carrier mobility (µFE).16 It is expressed as:

RT = RS +

LTG Weµ FE n0 2 + n 2

,

(1)

where RT is total device resistance, e is the electron charge, n is the carrier concentration controlled by top-gate, n0 is the residual carrier concentration. In addition, RS is the parasitic resistance which consists of the contributions from both the access regions and contact regions.


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Figure 1d shows a plot of total device resistances as a function of VTG at different VBG biases. The measured RT (symbols) is fitted with the modeling results (solid line), showing good agreement with the experimental data. The carrier mobility, the residual carrier concentration and the parasitic resistance at each VBG bias can thus be derived. Figure 1e shows the carrier mobility and parasitic resistance as a function of VBG. µFE at different VBG is almost the same and the values are 950±50 cm2/Vs. But, the value of RS increases from 72 Ω to 82 Ω with VBG changing from 10 V to 20 V, which can be attributed to the gradually weakened p-type doping level of graphene in access region induced by the electrostatic bottom-gate.17

Figure 2. (a) Normalized noise spectrum density, SI/IDS2, as a function of frequency at VDS = 0.5 V. (b) The energy band diagram of metal-oxide-graphene structure with different drain current. The low-frequency noise was measured using Keysight E4727A advanced low-frequency noise analyzer in the range from 1 Hz to 1 kHz in ambient atmosphere at room temperature. Figure 2a shows normalized noise spectrum density, SI/IDS2, as a function of frequency at VDS =


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0.5 V. The source-drain currents are set to 1.2×10-3 A, 2×10-3 A and 3×10-3 A, respectively. The noise spectra can be characterized as "1/f-like", which is similar to that in conventional semiconductor FETs.18 The results obtained by different groups for micrometer-size graphene devices put the current spectral density normalized to device channel area SIN = (SI/IDS2)(W×L) in the range of 10-9-10-7 µm2 Hz-1 at f = 10 Hz.6-13 However, in our device, SIN is reduced by three orders of magnitude, with the values ranging from 1.8×10-12 µm2 Hz-1to 7×10-11 µm2 Hz-1. This noise level is much lower than any other reported for GFETs. In addition, the values of SI/IDS2 increase by one order of magnitude with IDS increasing from 1.2×10-3 A to 2×10-3 A , but it then shows a slight decrease with IDS further increasing from 2×10-3 A to 3×10-3 A. Since the electrical current can be written as IDS ∝ neµFE, it indicates that the 1/f noise in our device does not follow the simple 1/n dependence expected from Hooge's relation.19 According to the previous reports, the limiting cases of 1/f noise in GFETs usually originate from the fluctuations of the charge-carrier mobility vs. the fluctuations of the number of carriers.6-9 In the framework of the mobility-fluctuation model, the noise spectral density of the elemental fluctuation events contributing to 1/f noise is given by:1 N tµ τς (1 − ς ) 2 SI 2 ∝ l σ − σ1 ) 2 0 ( 2 2 I DS VDS 1 + (ωτ )

(2)

where Nµt is the concentration of the scattering centers of a given type, l0 is the mean free path of the charge carriers, τ is the characteristic time of carrier tunneling between a trap and the channel, ω is the angular frequency, σ is the scattering cross-section that can change owing to capture or release of the charge carriers, ζ is the probability for a scattering centre to be in the state with σ1. Integration of eq 2 over τ with the appropriate weight yields 1/f noise. On the basis


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of the theory, the normalized noise spectral density is strongly dependent on the charge carrier scattering. The mobility of graphene is mainly limited by two important scattering mechanisms: long-range Coulomb scattering and short-range disorder scattering.8 Only the latter one is proportional to the carrier density. For the graphene devices, where short-range scattering dominates, the noise level increases with an increase in the carrier density. The reason is that the mobility caused by the disorder scattering is inversely proportional to gate voltage (µS = 1/(CSVG)), where CS is the short-range scattering constant.20 However, this mobility-fluctuation model may be not appropriate to account for the 1/f noise behavior in our GFET. For FET, the drain current can be written as IDS ∝ neµFE. Thus, the drain current is proportional to the charge carrier density. In our device, although the noise at IDS = 2×10-3 A is about 40 times larger than that at IDS = 1.2×10-3 A, the corresponding carrier mobility decreases by about 2.6 times (seen in Figure S3). In the case of mobility limit, SI/IDS2 in GFETs should follow a V-shape or M-shape charge carrier dependence and the change of the value should be within 3 times in the measured range.6-8 This suggests that there is another physical mechanism behind the drain-current dependent noise level in our GFET. In addition, 1/f noise can also be described well by McWhorter model, which uses the carrier-number-fluctuation approach:11, 18 kTDeff SI = 2 2 I DS fLTGWnc ln (τ max τ min )

(3)

where Deff is the effective trap density on Fermi level responsible for noise, nc is the carrier concentration in channel, k is Boltzmann's constant, T is temperature, and τmax and τmin are the


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maximum and minimum tunneling times. The carrier concentrations in the graphene channel regions nc can be approximated by nc = n0 2 + n 2 .16 In McWhorter model, the current 1/f noise is caused by the fluctuation of carrier number.1,18 These carrier fluctuation is physically caused by the trapping and detrapping processes of the carriers in conducting channel through tunneling. The trapping (detrapping) process is related to the empty (filled) trap state density and the available carrier density at specific energy level. In a trapping process, a filled carrier will be trapped by a trap with empty state. In a detrapping process, a carrier at a filled trap will enter the empty state in the channel. The effective trap density is determined by the density of the empty/filled trap states and that of filled/empty carrier states near Fermi level. In the conventional semiconductor, like Si and GaAs, the carrier density depends exponentially on the energy difference between Fermi level and band edge. When the carriers are injected into the semiconductor, the band bending occurs near the semiconductor surface. However, the Fermi level keeps unchanged far away from the semiconductor surface. As a result, the value of Deff is normally assumed to be constant in the conventional semiconductor transistors.18 However, in graphene-based devices the case is different. Because of its unique linear electronic dispersion relation in graphene, the density of states around the Dirac point is very small, while the density of states increases when the energy level deviates from the Dirac point. A certain carrier variation in channel can shift the Fermi level of graphene much more significantly near the Dirac point, which leads to a corresponding significant change of interface trap states caused by the oxide gate dielectric.21, 22 Thus, the value of Deff in graphene devices is not necessarily a constant, but it may instead depend on the Fermi level of graphene in channel.


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The solid lines in Figure 2a are the fitting results of eq 3 and the measured SI/IDS2 at different drain current, with VDS = 0.5 V. Here, we assume ln(τmax/τmin) = 4 as suggested in Ref 18. The values of Deff are extracted to be 3.3×107 cm-2eV-1, 4.4×109 cm-2eV-1 and 8.8×109 cm-2eV-1 for IDS =1.2×10-3 A, IDS =2.0×10-3 A and IDS =3.0×10-3 A, respectively, which are much smaller than that reported in the back-gate GFETs based on the SiO2 substrate.21 This lower effect trap density in our device can be attributed to the top-gate dielectric deposition, which will be discussed in details as follows. Due to its high surface-to-volume ratio, graphene is very easy to absorb water molecules, oxygen molecules and photo resist during the fabrication process.23-25 These contaminants will be able to modify the electronic properties by serving as trap sites. In our device, the Al/Al2O3 stack layer was deposited on top of graphene as a mask for the following optical lithography process, resulting in a decrease of interface trap states induced by organic residue. In addition, the top-gate dielectric cap layer will also protect graphene from the adsorption in air. Another reasonable interpretation of this low trap density is the oxidation process of Al seed layer, which can eliminate oxygen/water-related molecules around graphene. In air, Al is easily oxidized especially when the thickness is in several nanometer scale. Hence, the oxygen and water molecules on graphene surface may be attached to Al atoms immediately, as the source of oxidation for Al.26,27 Due to the reasons mentioned above, the effect of interface trap states will be inhibited in our device. Since the naturally formed aluminum oxide layer adjacent to graphene is oxygen deficient, this vacancy of oxygen will introduce donor trap states at the interface between graphene and top-gate dielectric layer.28 Similar to the conventional semiconductor, the interface traps with the energy level over Dirac point are believed to the acceptors, while interface traps with energy level below Dirac point are donors.29 The traps will be charged or discharged when the Fermi


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level shifts, leading to the carrier fluctuation in the GFETs. In other words, interfacial effective trap density is determined by the position of the Fermi level so the value is gate-bias dependent. For a fixed VDS, the drain current is in proportion to the gate bias, thus the Fermi level in channel is associated with the drain current. Figure 2b shows the energy band diagram of metal-oxidegraphene structure with different drain current. Due to the large positive shift of Dirac point voltage in our device, we only consider the p-type channel situation, where the carrier transport is mainly affected by the donor interface traps. At IDS = 1.2 mA, the Fermi level locates near the Dirac point, which can be confirmed from the Figure 1c. Because of the ultra low density of states around the Dirac point in graphene, the number of exchanged carriers between interfacial oxide traps and graphene channel will be quite small. This leads to the low density of effect traps at IDS = 1.2 mA. With the drain current increasing to 2.0 mA, the Fermi level of graphene begins to shift significantly to more positive region due to its line-up of energy states. The density of states in this case becomes much larger than that near the Dirac point.27 As a result, the effective trap density increases by two orders of magnitude comparing with that at IDS = 1.2 mA. However, with a further drain current increasing to 3.0 mA, the effective trap density increases slowly, which is only two times larger than that at IDS = 2.0 mA. This can be attributed to the smaller shift of Fermi level far away from Dirac point with certain amount of exchange carriers. According to eq 3, SI/IDS2 is determined by the competition between effective trap density and carrier concentrations in the channel. With drain current increasing from 1.2 mA to 2.0 mA, SI/IDS2 increases by an order of magnitude. This can be attributed to a higher increase of Deff than that of nc in this range. However, when the drain current increases from 2.0 mA to 3.0 mA, the increase rate of Deff drops down. In this case, the increase of Deff can’t compensate the effect of increasing nc on SI/IDS2, leading to a slight decrease in the noise level.


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Figure 3. (a) The noise amplitude as a function of VBG for IDS varying from 1.2 mA to 3.0 mA. (b) The effective trap density at different VBG as a function of IDS. Besides

the

normalized

noise

spectral

density,

the

noise

amplitude

N

A = (1 N ) ∑ m =1 f m S Im I m2 can be used to characterize 1/f noise levels (here SIm and Im are the noise spectral density and drain current measured at different frequencies fm).13-15 The definition is helpful to reduce measurement error at specific frequencies. Figure 3a shows the noise amplitude as a function of back gate voltage for drain current varying from 1.2 mA to 3.0 mA. Drain-source bias is kept at 0.5 V. The noise amplitude nonlinearly depends on drain current, as shown in the figure. With increasing IDS, it increases significantly at first and then decreases. The trend is similar to that of SI/IDS2. In addition, we found that noise amplitude does not noticeably depend on the back gate voltage VBG. For example, the noise amplitude keeps around ~ 1.0×10-13 at IDS = 1.2 mA, VDS = 0.5 V, though VBG changes in the measured range. The independence of noise amplitude on the VBG suggests that the noise is dominated by the Fermi level position of graphene in channel. Figure 3b shows the effective trap density extracted from the measured SI/IDS2 curves (Figure S4 in supporting information). For the fixed IDS, the values of Deff are almost the same at different VBG. However, they are much sensitive to the IDS. With IDS


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increasing from 1.2 mA to 3 mA, Deff grows rapidly at first and then increases slowly. This suggests that the trapping event is mediated by the shift of Fermi level of graphene in channel. In conclusion, we report on an ultra-low 1/f noise level GFET with current normalized spectral density SI/IDS2 of 1.8×10-12 µm2Hz-1 at f =10 Hz. Further analysis reveals that the noise behavior is determined by the trapping and detrapping processes of the carriers in conducting channel through tunneling and that the processes are sensitive to the Fermi level position of graphene in channel. The obtained results are important for the proposed graphene applications in analog, mixed-signal, and radio-frequency systems, integrated circuits and sensors.

ASSOCATED CONTENT Supporting Information The Supporting Information is available free of charge on ACS Publications website Process flow for GFET fabrication, optical micrograph of the top-gated GFET, atomic force microscopy images of graphene at different stages of the dielectric deposition process, Raman spectra of the graphene at different stages of the dielectric deposition process, atomic force microscopy image of the patterned channel region, the measured drain current and the corresponding transconductance as a function of top gate voltage at a drain voltage of 0.5 V, the normalized noise spectrum density, SI/IDS2, as a function of frequency at VDS = 0.5 V for different VBG.

AUTHOR INFORMATION Corresponding Author *E-mail: [email protected].


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ACKNOWLEDGEMENT This work was subsidized by the National Natural Science Foundation of China (Nos. 61136005 and 61404167), the Opening Project of Key Laboratory of Microelectronic Devices & Integrated Technology, Institute of Microelectronics, Chinese Academy of Sciences and Beijing Municipal Sci. & Tech. Commission Project Z151100003515003.

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26. Feng, T.; Xie, D.; Lin, Y.; Tian, H.; Zhao, H. Unipolar to Ambipolar Conversion in Graphene Field-Effect Transistors. Appl. Phys. Lett. 2012, 101, 253505. 27. Kang, C. G.; Lee, Y. G.; Lee. S. K.; Park. E.; Cho, C.; Lim, S. K.; Hwang, H. J.; Lee, B. H. Mechanism of the Effects of Low Temperature Al2O3 Passivation on Graphene Field Effect Transistors. Carbon, 2013, 53, 182-187. 28. Choi, M.; Janotti, A.; Van de Walle, C. G. Native Point Defects and Dangling Bonds in α-Al2O3. J. Appl. Phys, 2013, 113, 044501. 29. Sze, S. M. Physics of Semiconductor Devices; John Wiley & Sons: New York, 1981.


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