Fully Solution-Processed and Foldable Metal-Oxide Thin-Film

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Fully Solution-Processed and Foldable Metal-Oxide Thin-Film Transistor Su Jeong Lee, Jieun Ko, Ki-Ho Nam, Taehee Kim, Sang Hoon Lee, Jung Han Kim, GeeSung Chae, Hs Han, Youn Sang Kim, and Jae-Min Myoung ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.6b00950 • Publication Date (Web): 27 Apr 2016 Downloaded from http://pubs.acs.org on May 3, 2016

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ACS Applied Materials & Interfaces

Fully Solution-Processed and Foldable MetalOxide Thin-Film Transistor Su Jeong Lee,†,‡ Jieun Ko,†, § Ki-Ho Nam,∥ Taehee Kim,∥ Sang Hoon Lee,‡ Jung Han Kim, ⊥

‡

Gee Sung Chae,⊥ Hs Han,∥ Youn Sang Kim*,§, # and Jae-Min Myoung*,‡

Department of Materials Science and Engineering, Yonsei University, Seoul 120-749,

Republic of Korea §

Program in Nano Science and Technology, Graduate School of Convergence Science and

Technology, Seoul National University, Seoul 151–742, Republic of Korea ∥

Department of Chemical and Biomolecular Engineering, Yonsei University, Seoul 120-749,

Republic of Korea ⊥

LG Display LCD Research and Development Center, LG Display, Gyeonggi-do 413-811,

Republic of Korea #

Advanced Institutes of Convergence Technology, Yeongtong-gu, 864-1 Iui-dong, Suwon-si,

Gyeonggi-do 443-270, Republic of Korea KEYWORDS: Solution-process, thin-film transistors, integration, flexible, folding

1 ACS Paragon Plus Environment


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ABSTRACT Flexible and foldable thin-film transistors (TFTs) have been widely studied with the objective of achieving high-performance and low-cost flexible TFTs for next-generation displays. In this study, we introduced the fabrication of foldable TFT devices with the excellent mechanical stability, high transparency, and high performance by a fully solution process included the PI, YOx, In2O3, SWCNTs, IL-PVP and Ag NWs. The fabricated fully solution-processed TFTs showed a higher transmittance above 86% in the visible range. Additionally, the charge-carrier mobility and Ion/Ioff ratio of them were 7.12 ± 0.43 cm2/V·s and 5.53 ± 0.82 × 105 at a 3 V low voltage operating, respectively. In particular, the fully solution-processed TFTs showed good electrical characteristics under tensile strain with 1 mm bending and even extreme folding up to a strain of 26.79%. Due to the good compatibility of each component layer, it maintained the charge-carrier mobility over 79% of initial devices after 5,000 cycles of folding test in both the parallel and perpendicular direction with a bending radius of 1 mm. These results show the potential of the fully solution-processed TFTs as flexible TFTs for a next generation devices because of the robust mechanical flexibility, transparency, and high electrical performance of it.


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1. Introduction Foldable electronics have been intensively studied to produce next-generation devices including display and sensor applications. As a basic operating component of foldable electronics, a thin-film transistor (TFT) requires foldability with high performance for use in various advanced applications such as smart windows, wearable or foldable displays, and epaper.1-5 To achieve foldable TFTs, it is essential for each part of the TFTs to consist of the materials with high flexibility including the substrate. Additionally, integration of each foldable component is a key for reliable device performance. As a foldable substrate, plastics are promising candidates for achieving foldable electronics due to their mechanical flexibility and manageability.6-10 Therefore, various thin films on plastic foils, which have included organic and inorganic layers, have been considered as components of foldable TFTs due to their flexibility and non-planar shaping property. Moreover, foldable TFTs on plastic foil could be adapted for large-scale production such as roll-to-roll fabrication.11-15 Traditionally, a vacuum process has been used to evaporate high-quality thin films including electrodes and active layers. However, this process is limited to large-scale production because it is time consuming and requires expensive high vacuum systems.16-19 For effective commercialization of foldable electronics, solution processes are more attractive methods for achieving large-area production with low cost. Therefore, many research groups have reported on fully printed TFTs with various components including organic and inorganic compounds.20-23 However, previously reported solution-processed flexible TFTs have exhibited deficiencies in performance such as a high operating voltage, a decreased charge-carrier mobility, and bad electrical stabilities from repeated bending operations, and thus, have a limitation for use in foldable electronics. Moreover, integrating foldable TFTs with a solution process can have a number of difficulties such as cracking and exfoliating 3 ACS Paragon Plus Environment


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during fabrication processes and bending operations.24, 25 To overcome these obstacles, it is important to integrate suitable layers for foldability and high performance. Not only the stability of flexible TFTs, but also the electrical performance in repeated bending operations is influenced by the integration of each component layer, because the fabrication of TFTs is a connected process, and the electrical performance of TFTs is the result of a synergistic effect from among the semiconductor, gate insulator, and electrodes. Herein, we report on fully solution-processed foldable TFTs with high performance and transparency based on our previous studies. They were fabricated with an indium oxide (In2O3) semiconductor, single-walled carbon nanotube (SWCNT) electrodes, an ionic liquidpolymer gate insulator, a silver nanowire gate electrode and polyimide substrates with an yttrium oxide (YOx) flattening layer. Because we used the materials with high flexibility for each component within the thin films and foldable electrodes, the TFTs exhibited excellent and stable flexibility and bendability with 1 mm bending and even extreme folding up to a strain of 26.79%. Additionally, a transparent polyimide (PI) was applied as a thin substrate, and a YOx interlayer helped to smooth the substrate and improve the interface condition between the substrate and the active layer. As a semiconductor, a 7 nm thick In2O3 layer was used to achieve a high-performance and transparent semiconductor layer, and as a gate insulator, an ionic liquid-polymer (IL-PVP) dielectric layer was adapted for a high chargecarrier mobility and low voltage operating. In the case of the electrodes, single-walled carbon nanotubes (SWCNTs) and silver nanowires (Ag NWs) were chosen due to their transparent and foldable characteristics. As a result, the integrated foldable TFTs exhibited the good transparency above 86% in the visible range and high electrical property with a charge-carrier mobility of 6.933 cm2/V·s and an on/off current ratio of 5.76 × 105 at a 3 V low voltage operating. Additionally, the TFTs showed excellent mechanical stability up to 5,000 times in


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the bending tests with a high charge-carrier mobility that maintained over 79% of the initial mobility in both the parallel and perpendicular direction with a bending radius of 1 mm. Our results indicate that the fully solution-processed foldable TFTs showed outstanding foldability and stability up to 5,000 times in the bending tests with a 1 mm bending radius with great potential for applications in various foldable devices.

2. Experimental section 2.1 Materials. 4,4'-(Hexafluoroisopropylidene)diphthalic anhydride (6FDA) and 2,2'bis(trifluoromethyl)benzidine (TFDB) were supplied by TCI Korea. N,N-dimethylacetamide (DMAc) and 2-butoxyethanol (2BE) were obtained from Duksan Pure Chemical Co. Ltd. Yttrium(Ⅲ) nitrate hexahydrate (Y(NO3)3•6H2O), indium nitrate hydrate (In(NO3)3•xH2O), polyvinylphenol (poly(4-vinylphenol)), acetylacetone (AcAc), 1-ethyl-3-methylimidazolium bis(trifluoromethylsulfonyl)imide (EMIM-TFSI), and sodium dodecyl sulfate (SDS) were purchased from Sigma-Aldrich. SWCNTs were obtained Nano Solution Co. Ltd. Ag NWs were supplied by Nanopyxis. 2.2 Solution Preparation. The polymerization of the PI precursor, poly(amic acid) (PAA), was synthesized from dianhydrides (6FDA) and aromatic diamines (TFDB) in an aprotic solvent (DMAc). 4 mM TFDB was dissolved in DMAc, and the mixture was stirred at 0 °C for 1 h under nitrogen atmosphere. Then, 4 mM 6FDA was added after the diamines were completely dissolved. The resulting mixture was stirred vigorously at 0 °C for 24 h under nitrogen atmosphere and yielded PAA. The YOx solution was prepared with a sol-gel method using 0.3 M Y(NO3)3•6H2O in 2BE. The In2O3 solution was synthesized by dissolving In(NO3)3•xH2O in deionized (DI) water at a concentration of 0.1 M. All precursor solutions were stirred vigorously for 24 h and filtered through a 0.2 µm polytetrafluoroethylene (PTFE) syringe filter. The IL-PVP solution consisted of a polymer matrix and ionic liquid (EMIM5 ACS Paragon Plus Environment


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TFSI). To prepare the IL-PVP solution, a 15 wt% of PVP was dissolved in AcAc. Then, the cross-linking agent (6FDA) was mixed at a weight ratio of 10:1 with the polymer. After clearly dissolving the solutes in the solvent, EMIM-TFSI was added to the PVP solution at a 1:1 ratio with the polymer. The EMIM-TFSI was stored in a vacuum oven at 70 °C for 12 h before use due to its water sensitivity. Finally, the fabricated solution was filtered through a 0.2 PTFE syringe filter and spin-coated on the substrate at 2000 rpm for 30 S. To prevent agglomeration of the SWCNTs, 0.1 wt% SWCNTs with diameters less than 1.4 nm and 0.5 wt% SDS were dispersed in DI water by ultra-sonication for 2 h. Additionally, 0.1 wt% Ag NWs were dispersed in ethanol by ultra-sonication for 1 h. 2.3 Device Fabrication. A top-contact top-gate (TCTG) and coplanar structure was adopted for the foldable TFT fabrication. Prior to the deposition of the PI film, the Si handling wafer was cleaned with acetone, methanol and DI water, respectively. Then, the PI solution was spin-coated onto a Si handling wafer at 2000 rpm for 50 s and thermally imidized in a vacuum oven with gradually increasing temperatures from about 80 °C to 250 °C for 4 h. The resultant film thickness of the PI substrate was ~20 µm. Then, the YOx inter layer with a thickness of 30 nm was spin-coated onto the PI substrate at 3000 rpm for 30 s and annealed at 300 °C for 1 h. The In2O3 active layer with a thickness of 7 nm was then spin-coated onto the YOx/PI substrate at 2000 rpm for 20 s. These multi-layered thin films were annealed at 250 °C for 1.5 h. After the formation of the In2O3 active layer, the SWCNT source and drain electrodes were deposited onto the In2O3/YOx/PI substrate by spray coating through a shadow mask at 115 °C. Next, the SDS was removed with DI water rinsing fo 5 min. The IL-PVP gate

insulator layer with a thickness of 1.2 µm

was

spin-coated onto the

SWCNTs/In2O3/YOx/PI substrate at 2000 rpm for 30 s. Afterwards, it was thermally dried in a vacuum oven at 70 °C for 12 h and annealed at 110 °C for 1 h. Finally, the Ag NW gate electrode was deposited by spray coating through a shadow mask at 120 °C. The thickness of 6 ACS Paragon Plus Environment

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the source and drain electrodes and gate electrode were fixed at 100 nm. The fabricated device was released from the Si handling wafer substrate. 2.4 Device Characterization. The Microscopic morphologies were observed with a fieldemission scanning electron microscope (FE-SEM, S-5200, HITACHI). The optical properties of the transistors were evaluated with an ultraviolet-visible-near infrared spectrophotometer (UV-vis-NIR, V-670, JASCO). The surface roughness of the root mean square (RMS) values was found with an atomic force microscope (AFM, Asylum research system). The electrical properties of the transistors were measured at ambient conditions with a semiconductor parameter analyzer (Agilent B1500A, Agilent Technologies). The capacitance value was analyzed with an Agilent 4284A 1 kHz precision LCR meter. The mechanical folding stabilities of the transistors were evaluated with a bending machine (Flexible Materials Tester, Hansung Systems Inc.).

3. Results and Discussion Figure 1 shows the schematic diagram of the fabrication process for the fully solutionprocessed foldable TFTs. To develop the flexibility of the device, we used a thin PI substrate with a thickness of 20 µm that was spin-coated on a Si handling wafer. Then, the YOx inter layer was spin-coated on the PI substrate to avoid chemical incompatibility between the PI substrate and the In2O3 active layer.26, 27 Additionally, because the surface morphology of the substrate significantly affects the interfacial growth morphology of the semiconductor and the characteristics of the device, the YOx inter layer is critical in preparing a flexible and foldable substrate. The root mean square (RMS) average roughnesses of the PI and YOx/PI film surfaces, measured in an area 1 × 1 µm, were 381.18 and 182.09 pm, respectively (see Supporting Information, Figure S1). The RMS roughness of the PI film surface was conspicuously reduced after the deposition of the YOx interlayer. Next, a 7 nm thickness of a 7 ACS Paragon Plus Environment


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thin In2O3 active layer was spin-coated on the YOx/PI substrate, and then, the SWCNT source and drain electrodes were spray-coated onto the In2O3 layer. To obtain a gate insulator layer with a high capacitance value and low operating voltage, an IL-PVP gate insulator layer, previously reported by our group,28 was spin-coated onto the SWCNTs/In2O3/YOx/PI substrate. The specific capacitance versus frequency curve of the IL–PVP gate insulator layer was measured using a metal-insulator-metal (MIM) structure with aluminum (Al) top electrodes and a Si substrate (Al/IL-PVP/P++-Si). The capacitance of a 1.2 µm thick IL-PVP film achieved values as high as 1.49-0.93 µF/cm2 in a frequency range from 20 Hz to 10 kHz, which enable low voltage operating of the TFTs (see Supporting Information, Figure S2). Finally,

the

Ag

NW

gate

electrode

was

spray-coated

onto

the

IL-

PVP/SWCNTs/In2O3/YOx/PI substrate. The FE-SEM images of the SWCNT and Ag NW films that were deposited on a Si substrate are shown in Figure 1 (b) and (c). The 100 nm thick SWCNT film had an optical transmittance of 83.08% at 550 nm and a sheet resistance of 220.42 Ω/sq. Additionally, the 100 nm thick Ag NW film had a transmittance of 91.02% and a sheet resistance of 8.09 Ω/sq (see Supporting Information, Figure S3). Figure 2 shows the optical transmittance spectra of a fully solution-processed foldable TFT for each process step. The ripples seen in the optical transmittance spectra of all the structures are from the interference of light between the PI substrate and the other layers.29 After the process steps, the optical transmittances and ripples were reduced due to the increasing number of each layer in the 200-800 nm wavelength range shown in Figure 2 (a). According to the integration steps, the optical transmittance of the device changed from 91.82 to 86.06% at the 550 nm wavelength shown in Figure 2 (b). Although all layers of the TFT were fabricated by the solution process, the final TFT had a higher transmittance above 86% in the visible range. The photographic images of each step are shown in the inset of Figure 2 (b).


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Figure 3 shows the electrical performances of the fully solution-processed foldable TFTs. The charge-carrier mobility (µ) was calculated based on the equation in the saturation regime (VDS= 1 V, VGS ~0.5 - 1.0 V), µ=2L/WCiID/(VGS-Vth)2, where Ci represents the capacitance per unit area of the dielectric layer.30 In these devices, the channel width (W) and length (L) were 1000 and 100 µm, respectively. The transfer (ID vs VGS) and output (ID vs VDS) characteristics of an individual fully solution-processed foldable TFT are shown in Figure 3 (a) and (b). An unfolded device exhibited a charge-carrier mobility (µ) of 6.933 cm2/V·s and an on/off current ratio (Ion/Ioff) of 5.76 × 105 at a 3 V low voltage operating. Furthermore, it showed a low sub-threshold slope (S.S) of 123 mV/decade and a threshold voltage (Vth) of 0.704 V. The hysteresis of the TFT was negligible at about 0.2 V at VDS=1 V. The output characteristic showed clear saturation curves and pinch-off with an increasing gate voltage (VGS) from 0 to 2.5 V in 0.5 V steps. The histograms of the µ, S.S, Ion/Ioff and Vth of 30 individual devices are shown in Figure 3 (c). The statistics were obtained from the TFTs on a PI substrate. The average of the electrical characteristics including the µ, S.S, Ion/Ioff and Vth was 7.12 ± 0.43 cm2/V·s, 121 ± 11 mV/decade, 5.53 × 105 ± 0.82 × 105 and 0.68 ± 0.13 V, respectively. These results show that the fabricated TFTs have good uniformity and high electrical characteristics with potential as high performance TFTs in flexible devices with large areas. To characterize the device performances of the fully solution-processed foldable TFTs as a flexible device, bending tests were performed at various radii of curvature. The devices were held in the folded conformations for 10 min with the orientations both parallel and perpendicular to the channel direction at each radius of curvature. Figure 4 (a) shows the transfer characteristics of the devices, the initial state, bending with 3, 2, and 1 mm bending radii and extreme folding, respectively. The electrical characteristics were measured at bended states (see Supporting Information, Figure S4). Due to the good compatibility of each 9 ACS Paragon Plus Environment


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component layer for flexible devices, the TFTs exhibited stable electrical properties even in the extreme folded state with a strain of 26.79% (see Supporting Information, Equation S1). The device performance parameters, including the µ, S.S, Ion/Ioff, and Vth, are shown in Figures 4 (b) - (e). In Figure 4 (b), the mobility of the TFTs was slightly decreased from 6.93 to 6.01 cm2/V·s accordingly with a reduced bending radius. It appears that the tensile stress under extreme folding affected the electrical transport in the In2O3 semiconductor layer due to its reduced thickness. However, it still had a high charge-carrier mobility of 6.01 cm2/V·s at 3 V operating voltage even during folding, which maintained over 86% of its initial mobility. Additionally, the device performances including the S.S, Ion/Ioff and Vth exhibited highly stable properties, 97~127 mV/decade, 5.20~6.64 × 105, and 0.704~0.796 V, respectively, with a reduced bending radius. To investigate the operational stability of the devices under mechanical deformation, the electrical properties of the fully solution-processed foldable TFTs were analyzed under tensile strain during folding tests done times with a bending radius of curvature of 1 mm. To evaluate the TFTs as a component in flexible applications, the electrical properties of the devices were measured with bent devices either parallel or perpendicular to the channel direction, which indicates the direction of flowing current from the drain to the source. Figures 5 (a) and (b) show the transfer characteristics of the devices for each folding direction. The TFT characteristics were analyzed at un-bended state after repetitive bending tests. Compared to the initial transfer characteristics, the transfer curves of the TFTs after the folding test with perpendicular direction to the channel were more positive shifted than the tested TFTs in the parallel direction after continuous mechanical strain. According to the measurement shown in Figure 5 (c), the field effect mobility of the folding tested TFT after 5,000 cycles of the folding test in the parallel direction was slightly reduced from 6.93 to 6.11 cm2/V·s. In contrast, the field effect mobility of the folding tested TFT in the perpendicular 10 ACS Paragon Plus Environment

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direction was more reduced than that of the parallel tested one after 5,000 cycles of the folding test from 7.03 to 5.56 cm2/V·s. This result could be because the folding in the perpendicular direction affects the electron channel from the drain to the source by interrupting electron transport during operations. Nevertheless, it maintained over 79% of the initial mobility after 5,000 cycles of the folding test, due to the robust mechanical property and flexibility of each component. Additionally, the device performances were well maintained after 5,000 cycles of the folding test. The devices showed a remarkably stable S.S in the two folding directions (Figure 5 (d)) from 108 to 143 mV/decade (folded in the parallel direction, //) and from 112 to 131 mV/decade (folded in the perpendicular direction, ⊥). Furthermore, the on/off ratio was stably maintained around ~105 before and after the folding tests in both the parallel and perpendicular folding tests (Figure 5 (e)), and the variation of Vth for each folding direction was within 0.3 V after 5,000 cycles of the folding test (Figure 5 (f)). The leakage current of MIM devices (Ag 100 nm / IL-PVP 1 µm / Al 100 nm on polyimide film) were well maintained under 10-6 A/cm2 after 5,000 cycles of the folding test with 1 mm bending radius (see Supporting Information, Figure S5). Likewise, the electrical characteristics of the devices showed stable properties after 5,000 cycles of the folding test with a 1 mm bending radius. The results show that the fabricated TFTs have mechanically and electrically stable properties due to the flexible and robust characteristics of each component.

4. Conclusions In summary, fully solution-processed high-performance, foldable In2O3 TFTs were fabricated. We were able to fabricate high performance TFT devices with a fully solution process that included the PI, YOx, In2O3, SWCNTs, IL-PVP and Ag NWs. These devices exhibited a good optical transmittance of 86.06%, a stable charge-carrier mobility of 7.12 ± 11 ACS Paragon Plus Environment


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0.43 cm2/V·s and on/off current ratios of 5.53 ± 0.82 × 105. Additionally, a negligible hysteresis around 0.2 V was observed at VDS 1 V. The charge-carrier mobility of the device maintained electrical reliability under extreme folding conditions with a strain of 26.79%. Moreover, it showed excellent mechanical stability with a high charge-carrier mobility under tensile strain during 5,000 cycles of a folding test both parallel and perpendicular to the channel direction with a radius of curvature of 1 mm. Due to the integration of suitable high performance component layers for TFTs, the fully solution-processed TFTs were remarkably stable with high performance under repeated testing with a small bending radius. We believe that these results present a beneficial approach for the development of solution-processed and large-area foldable electronic systems such as smart windows, organic light-emitting diode displays and wearable devices.


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FIGURES

Figure 1. (a) Schematic diagram of the experimental procedure for the fully solutionprocessed foldable TFTs. FE-SEM images of (b) SWCNT film and (c) Ag NW film.



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Figure 2. Optical transmittance of the fully solution processed foldable TFTs. (a) transmittance spectra of all the structures for each process step in the 200-800 nm wavelength range and (b) at 550 nm. The inset photograph shows the optical image of the structures with an increasing number of process steps, from left to right.


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Figure 3. Electrical properties of the fully solution processed foldable TFTs. (a) transfer characteristics with a VDS of 1 V, (b) output characteristics with VGS = 0 to 2.5 V in 0.5 V steps, (c) histograms of µ, S.S, Ion/Ioff and Vth of the 30 devices.



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Figure 4.

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Folding tests of the fully solution-processed foldable TFTs at various radii of

curvature. (a) transfer characteristics with a radius of curvature from 3 mm to extreme folding, inset of a photograph of the device with a radius of curvature for extreme folding. The device performance results of (b) µ, (c) S.S, (d) Ion/Ioff and (e) Vth.


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Figure 5.

Electrical characterization of the fully solution processed foldable TFTs after

various numbers of bending cycles with a radius of curvature of 1 mm. Transfer characteristics with the orientations both (a) parallel and (b) perpendicular to the channel direction. The device performance results of (c) µ, (d) S.S, (e) Ion/Ioff and (f) Vth.



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ASSOCIATED CONTENT

Supporting Information. The Supporting Information is available free of charge on the ACS Publications website at http://pubs.acs.org. Root mean square average roughnesses of PI and YOx/PI film surfaces, capacitance versus frequency curve of IL-PVP gate insulator layer, transmittance versus sheet resistance of SWCNT films and Ag NW films, and equation of mechanical deformation strain. AUTHOR INFORMATION

Corresponding Author *E-mail : [email protected] *E-mail: [email protected]

Author Contributions †These authors contributed equally. ACKNOWLEDGMENT This work was supported by Center for Advanced Soft Electronics as Global Frontier Research Program (2013M3A6A5073177) of the Ministry of Science, ICT and Future Planning of Korea and the LG Display Academic Industrial Cooperation Program.

ABBREVIATIONS Thin-film transistor; TFT, indium oxide; In2O3, single-walled carbon nanotube; SWCNT, polyimide; PI, yttrium oxide; YOx, ionic liquid-polymer; IL-PVP, silver nanowires; Ag NWs, metal-insulator-metal; MIM, on/off current ratio; Ion/Ioff, sub-threshold slope; S.S, threshold voltage; Vth, drain voltage; VDS, gate voltage; VGS, drain current; ID.


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The table of contents


Fully Solution-Processed and Foldable Metal-Oxide Thin-Film

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