Graphene Memory Based on Tunable Nanometer- Thin Water Layer

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C: Surfaces, Interfaces, Porous Materials, and Catalysis

Graphene Memory Based on Tunable Nanometer-Thin Water Layer U-Ting Chiu, Bo-Fan Lee, Shu-Kai Hu, Ting-Feng Yu, Wen-Ya Lee, and Ling Chao J. Phys. Chem. C, Just Accepted Manuscript • DOI: 10.1021/acs.jpcc.8b10804 • Publication Date (Web): 03 Apr 2019 Downloaded from http://pubs.acs.org on April 3, 2019

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The Journal of Physical Chemistry

Graphene Memory Based on Tunable NanometerThin Water Layer U-Ting Chiu1, Bo-Fan Lee1, Shu-Kai Hu1, Ting-Feng Yu2, Wen-Ya Lee2* and Ling Chao1* Department of Chemical Engineering, National Taiwan University, Taipei, Taiwan1 Research and Development Center for Smart Textile Technology and Department of Chemical Engineering and Biotechnology, National Taipei University of Technology, Taipei2

ABSTRACT Developing reliable memories with stable information storage capability in water is important for environmental and healthcare applications. However, it is challenging because water easily causes current leakage and information loss in conventional memories. This article reports a transistor-based graphene memory for which writing/erasing is through controlling the nanometer-thin water layer between graphene and its silica support. Using an interfacial water layer with a tunable thickness to switch the graphene electron-trapping extent allows the device to function in water, which is completely different from any current memory mechanisms. Stable high- and low-conductance (ON and OFF) states can be achieved by applying positive and negative gate voltages to control the water layer thickness as the writing/erasing processes, which is supported by our AFM and Raman spectroscopy experimental results and theoretical predictions. The high stability in water and reversible switching property based on the nanometer-

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thin insulating water layer could facilitate the realization of ultra-compact 2D nonvolatile memories for various underwater applications.

Introduction The development of flexible, robust electronics functional in aqueous systems has attracted a large amount of attention due to their potential for environmental monitoring and health sensors. To store the information collected from these sensors, reliable memory devices with stable information storage capability in water is necessary. Nevertheless, the memory devices are highly sensitive to the existence of water. The stored electrical information can be easily released when the device is in a wet environment because water molecules may diffuse into the memory devices and sequentially increase leakage current and information loss 1. In addition, semiconductors show instability and rapid degradation in the presence of water when applying high operation voltages 2.

To avoid this performance degradation, the devices usually require to be fully encapsulated from

the moisture and to have a low water vapor transmission rate. However, this significantly increases the complexity and cost of the device fabrication. Therefore, developing robust memory devices which can work in aqueous systems is critical for the next generation of bioelectronics. The unique electrical and physicochemical properties of graphene have attracted enormous attention 3. Having remarkably high carrier mobility 4-6 has made it an excellent material for field effect transistors (FETs)

7-8,

light-emitting diodes (LEDs) 9, sensors 10, and nonvolatile memory

devices 11-13. Among these promising applications, graphene is an ideal material for constructing nonvolatile transistor-type memories

11-16.

The transistor-type memory is the main technology

dominating the market for memory applications because of its nondestructive readout, single-


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transistor structure and great compatibility with integrated circuits

17.

Typically, the transistor-

based memory has been classified into two types: ferroelectric memory and floating-gate memory. Ferroelectric materials have a spontaneous electric polarization that can be switched by the application of an external electric field. The different electric polarizations can cause the active layer to have different conductivities, which defines the binary memory property. Although graphene is not ferroelectric, it has been combined with ferroelectric dielectric materials for ferroelectric memories

14-15.

Traditional floating-gate FET memories utilize a voltage to inject

charges into (writing) or release charges from (erasing) the floating gate. The trapped charges induce a threshold voltage shift, thus leading to electrical switching of memories

13, 16.

Several

reports have stacked 2D graphene and MoS2 to form non-volatile floating gate memory devices 1820.

These studies demonstrate the possibility of ultrathin memory devices using 2D graphene. Although graphene is a promising material candidate for memory devices, water-based memory

is rarely reported in the literature. The previous graphene memory studies were all done in a dry environment or an inert atmosphere to keep trapped charges in floating gates or ferroelectric materials. However, these devices all tend to release stored information and lose their electric performance in the water. In addition, they usually require voltages higher than the water electrolysis voltage for writing or erasing operations, causing the difficulty to directly use them in aqueous environments. We intend to develop a water-based graphene memory device by controlling the extent of the graphene electron trapping by the contact support. We used silica as the support in this study since silica has been reported to significantly trap the electrons of the adjacent graphene and the charge impurity scattering by silica could suppress the graphene carrier mobility, particularly the electron mobility 21-22. Since contact between silica and graphene was also found to be unstable in aqueous


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environments

23-25,

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it is possible to develop a way to control the contact situation to tune the p-

doping effect from silica for the memory applications. Here, we present a memory device for which writing/erasing mechanism is based on controlling the nanometer-thin water layer between the graphene and its silica support. The mechanism of using a tunable water layer thickness to switch the electron trapping degree of the active layer for the binary property is completely different from the mechanisms of any current transistor-based memories. We discovered that applying a positive gate voltage to the device can increase the water layer thickness, presumably because of the electrostatic repulsive force between the negatively charged silica surface

26-27

and the negatively charged graphene caused by the

positive gate voltage. This effect can be reversed by applying a negative gate voltage. The reduction of the electron trapping from silica after the water layer thickness increases renders an “ON” state with higher conductivity, while the strong electron trapping after the water layer thickness decreases switches the device to an “OFF” state with lower conductivity. The memory device functions in water, which can make the device biocompatible and economical. In addition, the manipulation of the interaction between graphene and silica through a nanometer-thin water layer could facilitate the realization of an ultra-compact 2D nonvolatile memory.

Methods Fabrication of graphene memory devices Graphene memory devices were fabricated by conventional photolithography. Source-drain electrode patterns were fabricated by the following steps. S1813 photoresist layers (MicroChem,


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MA) were spin-coated on cover glass substrates (4000 rpm, 40 s), and were baked at 110°C for 1.5 min. UV exposure (~100 mW/cm2) was performed by an EVG®620 mask aligner (EV Group, Austria), followed by MF319 development for 18 s. Chromium (10 nm) and gold (50 nm) were deposited onto cover glass substrates by electron beam evaporation. After the photoresist layers and unwanted metal residues were removed by sonication in acetone for 1 min, trivial transfer CVD GrapheneTM (ACS Material, CA) was transferred onto a cover glass substrate with sourcedrain electrode patterns by using the protocol provided on the vendor website. To remove PMMA film coated on graphene, the samples were soaked in acetone for 12 hr at room temperature and then soaked at 200 °C for 10 min. Graphene devices were spin-coated with S1813 photoresist layer again for the purpose of patterning graphene. O2 plasma (300 mTorr, 18 W, 3 min) was applied to etch graphene on the devices. After the etching process, the S1813 layer was stripped by sonication in acetone for 10 min and then immersed in fresh acetone on the shaker for more than 6 hrs. IPA and water were later applied to the sample with the same procedure to remove any PMMA or photoresist residues further. Finally, all samples were stored in a vacuum (less than 1 torr) to prevent any contamination.

Experimental setup of graphene memory devices A Keithley 2636B source meter (Tektronix, OR) was used to apply gate and source-drain voltages and to measure gate and source-drain currents. As shown in Figure 1(a), the graphene field effect transistor was investigated using a two-electrode electrochemical cell; an Ag/AgCl electrode was used as the reference electrode while the graphene was used as the working electrode. 1X phosphate buffered saline (PBS) buffer (10 mM phosphate, 150mM NaCl at pH 6.6)


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was used as the electrolyte solution while the electrolyte-gating was applied. The source-drain voltage (VSD) was 10 mV during all experiments. The width and length of each graphene channel were set to 50 μm and 600 μm.

Atomic force microscopy (AFM) measurements of graphene on silica AFM topography images were carried out in air using the tapping mode of Cypher S™ AFM from Asylum research working. Right before the measurements, the gentle N2 stream was used to remove the solution above the graphene devices at their ON and OFF states. Silicon AFM tips (PPP-RT-NCHR from NANOSENSORS™) with spring constant at 42 (10 - 130) N/m and an oscillation frequency in the range of 330 (204 - 497) kHz were used. Collected images were analyzed with SPIP™ software, and the image processes including global leveling correction, noise reduction and outlier removal for obvious dirt were applied.

Raman spectroscopy observation of water intercalation The Raman spectroscopic measurements were carried out using an inVia™ confocal Raman microscope (Renishaw, UK) equipped with a He-Ne laser for 633nm excitation. Right before the measurements, the gentle N2 stream was used to remove the solution above the graphene devices at their ON and OFF states, and the measurements were done in five minutes. The average laser power was set at 7mW to avoid laser-induced damages. Raman data were retrieved using Renishaw WiRE 5.0 software.


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Results and Discussion Electrical memory characteristics of the graphene device We constructed an electrolyte-gated silica supported graphene device which showed transistortype memory characteristics, as illustrated in Figure 1(a). The device is composed of multiple graphene stripes on a glass support. Each strip has its own source-drain gold electrodes and can act as a single channel. The width and length of each graphene channel were 50 μm and 600 μm, as shown in Figure 1(b). Figure 1(c) shows the transfer characteristics sweeping from -0.5V to 0.5V under a sourcedrain voltage bias (VSD) of 0.01 V had a V-shape due to the graphene’s unique ambipolar-transport property, presenting the p- to n-type transition. We discovered that the V-shape curve shifted to the left and the right arm moved up after a positive gate bias (Vg) of 1V was applied for 15 minutes (red curve). On the other hand, when a negative gate bias (Vg) of -1V was applied for 10 minutes, the transfer curve of the graphene device shifted back to the right, and the right arm moved down (blue curve). The source-drain currents (ISD) of the two states are significantly different on the right arm of the V-shape. The state with the large ISD at a positive Vg is defined as the ON state (red curve), while the one with the small ISD is defined as the OFF state (blue curve). When we choose Vg=0.35 V as the reading voltage, the average source-drain current of the ON state is 5.2 ± 0.3 μA, and that of the OFF state is 3.2 ± 0.1 μA (n=3). The average ON/OFF source-drain current ratio is about 165 ± 15 % (n=3). Figure 1(d) further shows the current retention property. Although there is a


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large decrease of the current difference between the ON and OFF states in the first 2000 s, the difference becomes relatively stable up to 104 s. The maximum charge retention time estimated by the extrapolation of the ON and OFF current curves is more than 3.6×104 s, suggesting its good retention property. From the characteristic curves of the ON and OFF states, we can further calculate the electron carrier density and electron mobility 28. The average electron mobility of the graphene increases from 2330 ± 420 cm2V-1s-1 to 3330 ± 230 cm2V-1s-1 and the average electron carrier density increases from 1.55 × 1013 ± 0.16 × 1013 cm-2 to 2.08 × 1013 ± 0.09 × 1013 cm-2 when the device switches from the OFF state to the ON state (n=3) (detailed calculation in the Supplementary Information). The difference between the ON and OFF states is probably caused by the varying water layer thickness between the graphene and the silica support. Previous studies have suggested that a silica support can cause p-doping and the charge impurity scattering effects on graphene

21, 29.

The

silanol groups on silica surface have a calculated electron affinity of around 3.8 ~ 4 eV 30 and have been found to significantly trap electrons

31-32.

In addition, it has been reported that water can

invade the interface between graphene and the silica support, forming a water layer 23-25. Since the water layer can be an insulating layer and potentially decrease the influence of silica to graphene, we hypothesized that the growth of the water layer between the graphene and silica might be the reason for the switching of the graphene electrical properties. As illustrated in Figure 1(e), at the OFF state, the electrons of the graphene can be easily trapped by the silica surface; at the ON state, a thick water layer exists between the graphene and the silica surface and could act as a good insulator to prevent the electrons from moving to the silica surface. The hypothesis is consistent with our observation that the electron carrier density of the ON state is significantly higher than the one of the OFF state. The electron-trapping density difference between the ON and OFF states


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can be estimated to be 3.3 × 1012 ± 0.2 × 1012 cm-2, which is comparable to the value reported by Choi et al. in which they studied the graphene electron-trapping density by MoS2

33

(detailed

calculation in the supporting information). The comparison of the transfer curves of the two states shows that the Dirac point of the ON state is close to 0 V and the one of the OFF state shifts to the positive voltage of around 0.1 V, supporting that the graphene is less influenced by silica at the ON state where a thick water layer may exist, and the graphene is away from the silica surface. At the OFF state where the graphene is supposed to be closer to the silica surface, the additional electric field by the negatively charged glass surface has a larger influence on the graphene and could cancel out the electric field provided by the gate electrode, causing the Dirac point shift to the more positive Vg side. Note that the two states introduced here are not just the hysteresis of graphene in an electrolyte-gated GFET reported in a previous study 34. In their study, they applied forward and backward scans and explained the hysteresis effect by capacitive gating of mobile ions and by charge transfer to charge traps on the silica substrate (SiO2). The difference between the forward-scan and backward-scan transfer curves is caused by the delay of the dipole alignment of mobile ions and different charge trap situations. In this study, we compared the forward-scan transfer curves of the two states (ON and OFF) achieved by the writing and erasing processes. The two states are relatively stable as shown in Figure


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1(d) and are not the typical hysteresis effect. We think that the basic cause of the two states is also based on that charge can transfer from graphene to a silica substrate as suggested by many previous studies. We further suggest that the water layer between the silica substrate and graphene can act as an insulating layer and the thickness can be adjusted to tune the charge transfer extent from graphene to the silica substrate or the influence from the silica substrate to graphene. In addition, the capacitive gating effect is probably not significant in our forward-scan transfer curves since we applied a slow sweeping rate (0.02 V/s) in which capacitive gating effect is shown to be suppressed 34.


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Figure 1. (a) Schematic illustration of the electrolyte-gated silica supported graphene field effect transistor. (b) Optical image of the patterned graphene in our device. The black blocks on the sides are source-drain gold electrodes, and the gray stripes are graphene channels. The scale bar is 100 μm. (c) Typical change of a characteristic transfer curve in our device after Vg = 1V and Vg = -1V


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were applied for 15 min and 10 min for writing and erasing processes, respectively. (d) Retention time testing measured at reading Vg = 0.35V and ISD = 0.01V. (e) Schematic illustration of the proposed mechanism.

Using AFM and Raman spectra to examine the interfacial water layer We used AFM and Raman spectroscopy to verify that the water layer of the two states has different thicknesses. AFM was used to measure the height difference between graphene and bare silica surface at the ON and OFF states. Figure 2(a)(b) shows that the height difference is around 3 nm at the OFF state and increased to 3.5 nm at the ON state. This result verified that the water layer between graphene and the silica surface at the ON state is thicker than the one at the OFF state. Previous studies have also used the up-shifted G and 2D Raman peak frequencies to show the water invasion between the graphene and its silica support 23, 35. Figure 2(c)(d) shows that the G and 2D Raman peaks of the ON state shift to the smaller frequencies, compared to those of the OFF state, supporting the water intercalation between graphene and silica support at the ON state.


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Figure 2. AFM images and Raman spectra of the graphene device when the graphene memory device is at the ON and OFF states. (a) AFM images at the edge of a graphene strip. The left and right regions are the bare silica surface and the region with graphene, respectively. (b) Average height profiles of the images in (a). (c)(d) G band and 2D band of the graphene device in the Raman spectra, respectively.

Writing/erasing mechanism based on the interaction between graphene and its silica support.


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Figure 3(a) further illustrates the proposed mechanism of how a positive Vg can induce the water intercalation as the writing process, and a negative Vg can be used to expel the water as the erasing process. When a positive Vg is applied, the graphene is negatively charged. The electrostatic repulsive force between the negatively charged graphene and the negatively charged silanol groups on the silica surface might drive the graphene to slightly move away from the silica surface, which allows water to invade into the interface. In contrast, when a negative Vg is applied, the attractive electrostatic force between the positively-charged graphene and the negativelycharged silica surface could drive the graphene to approach the silica support and expel water from the interface, which is the erasing process. To examine the reproducibility and reversibility of the memory performance of our electrolytegated silica supported graphene memory device, the write-read-erase-read (WRER) cycle tests were conducted. In Figure 3(b), the device displayed high programmable cyclic duration over nine WRER cycles, where the writing, reading and erasing gate voltages were 1, 0.35 and -1 V, respectively, and the source-drain current was measured at 0.01V. Although the Ion/Ioff ratio is only 165 %, all the devices showed similar IV curves and long retention time. The high stability and long retention time indicated that our memory device has a reversible and stable switching behavior between the ON and OFF states, and can be further investigated for nonvolatile flash memory device applications.


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Figure 3. (a) Schematic illustration of the writing and the erasing processes. (b) WRER cycles. (writing: Vg = 1V, reading: Vg = 0.35V, ISD = 0.01V, erasing: Vg = -1V). The right plot shows an enlarged single cycle in a WRER cycle.

Using the extended DLVO theory to explain the interfacial water layer phenomenon and insights into choosing suitable support materials.


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Although many studies have observed that water can invade into the interface between graphene and a hydrophilic support 23-25, the formation mechanism of the interfacial water layer is still unclear. We explained the behavior by the extended DLVO theory which is usually used to describe the interaction between two surfaces. The extended DLVO theory considers the total energy of the system as the summation of the van der Waals attraction, electrostatic interaction, and hydration interaction 36-39. The Van der Waals attraction occurs when two substances are in a short distance, and derives from the induced dipole-dipole interaction. The magnitude of Van der Waals attraction is inversely proportional to the square of the distance between the two surfaces 40.

Hydration energy refers to the energy required to remove water from a hydrophilic surface 41

and causes a repulsion potential when graphene approaches a hydrophilic silica surface. The electrostatic interaction between the two surfaces is influenced by their surface charges and exponentially decays with the distance 37, 42. The electrostatic interaction is an attraction if the two surfaces have the opposite charge, and is a repulsion if the two surfaces have the same charge. The minimum energy of the total energy curve as a function of the distance between the two surfaces can determine the equilibrium distance of the two surfaces or the water layer thickness at the given condition. Figure 4 shows the predicted total energy curve as a function of the distance between graphene and silica surface in our buffer condition (the detailed calculations are shown in the Supplementary Information). We assume that graphene is neutral when we do not apply any Vg, and therefore the electrostatic interaction is neglected in Figure 4(a). The summation of the Van der Waals attraction and hydration repulsion results in an attractive total energy well with the minimum at a distance of 1.74 nm, supporting the existence of a nanometer-thin water layer between the two surfaces at equilibrium. The theoretical prediction shows that it is thermodynamically favorable for a water


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layer to appear and explains why several studies have observed water can invade into the interface between graphene and its hydrophilic support. The theory also suggests that a hydrophilic support might be required for water invasion because of the following reason. If the hydration repulsion is much smaller than the Van der Waals attraction, the total energy curve would monotonically decrease when the distance decreases and the two surfaces would closely stick to each other without a water layer at equilibrium. In this study, we used Vg=1 V as a writing process and Vg= -1 V as an erasing process. Figure 4(b)(c) further shows how the application of Vg can influence the equilibrium water layer. When a positive Vg = 1V is applied, the graphene is negatively charged, and the electrostatic interaction is a repulsion between graphene and the negatively charged silica surface. Therefore, the minimum of the total energy shifts towards a larger distance the equilibrium water layer becomes thicker (around 2.35 nm). On the other hand, if a negative Vg = -1 V is applied, the graphene surface is positively charged, and the electrostatic interaction becomes an attraction. Therefore, the total energy minimum shifts towards a smaller distance, and the equilibrium water layer becomes thinner (around 1.47 nm). Therefore, the water layer thickness difference between the equilibrium states at Vg=1 V and Vg= -1 V is estimated to be 0.88 nm. The thickness is comparable to the 0.5 nm thickness difference measured by AFM at the ON and OFF states, supporting that the theory can be used to describe the phenomenon and the water layer thickness could be controlled by the van der Waals attraction, hydration repulsion, and electrostatic interaction between graphene and its support.


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Figure 4. Extended DLVO theory to estimate the water layer thickness. Total energy (Eoverall) is the summation of calculated van der Waals interaction energy (Evdw), electrostatic interaction energy (EEDL), and hydration interaction energy (EH). The equilibrium distance occurs at the minimum total energy and indicates the equilibrium water layer thickness.

The theoretical prediction supports that a water layer can form between graphene and the silica support and Vg can be used to tune the water layer thickness. Based on the theory, a tunable nanometer-thin water layer could also form between graphene and other electron trapping materials as long as the interactions allow an attractive total energy well to exist. The mechanism provides a new direction for graphene to combine with desirable materials for the realization of ultra-compact 2D nonvolatile memories in aqueous environmental monitoring and health sensing.

ASSOCIATED CONTENT


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The following files are available free of charge. Calculation of graphene carrier density, electron mobility, and trapping efficiency; and using the extended DLVO theory to calculate the total potential energy between graphene and the silica support (PDF). AUTHOR INFORMATION Corresponding Author *Ling Chao [email protected] *Wen-Ya Lee [email protected]

ACKNOWLEDGMENT We thank National Taiwan University, Academia Sinica, and the Ministry of Science and Technology in Taiwan for providing funding support for this study (NTU-108L7844, AS-106TP-B04, and MOST 105-2628-E-002-015-MY3)

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Graphene Memory Based on Tunable Nanometer- Thin Water Layer

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