Growth and Device Characteristics of CZTSSe Thin-Film Solar Cells

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Growth and Device Characteristics of CZTSSe Thin-Film Solar Cells with 8.03 % Efficiency Dae-Ho Son, Dae-Hwan Kim, Si-Nae Park, Kee-Jeong Yang, Dahyun Nam, Hyeonsik Cheong, and Jin-Kyu Kang Chem. Mater., Just Accepted Manuscript • Publication Date (Web): 07 Jul 2015 Downloaded from http://pubs.acs.org on July 8, 2015

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Chemistry of Materials

Growth and Device Characteristics of CZTSSe Thin-Film Solar Cells with 8.03 % Efficiency Dae-Ho Son‡,1, Dae-Hwan Kim‡,1, Si-Nae Park1, Kee-Jeong Yang1, Dahyun Nam2, Hyeonsik Cheong2 and Jin-Kyu Kang*,1 1

Convergence Research Center for Solar Energy, Daegu Gyeongbuk Institute of Science & Technology, 333 Techno jungang-daero, Hyeonpung-myeon, Dalseong-gun, Daegu 711-873, Republic of Korea 2

‡

Sogang University, Department of Physics, 35 Baekbeom-ro, Mapo-gu, Seoul 121-742, Republic of Korea.

These two authors contributed equally to this work.

ABSTRACT: The improvement of the efficiency of Cu2ZnSn(S,Se)4 (CZTSSe)-based solar cells requires the formation of highgrain-sized pure CZTSSe throughout the film. We have successfully selenized precursor samples of Cu/SnS/ZnS/Mo/Soda lime glass in an almost sealed selenium furnace. Owing to the presence of confined and high-pressure Se vapor in the furnace, Se easily diffused into the precursor samples, and high-quality Se-rich CZTSSe absorbers were obtained. To understand the effect of the growth mechanism in our precursor and annealing system, this study examines the phase evolution and grain formation. Device parameters are discussed from the perspective of a material microstructure in order to improve performance. At a selenization temperature of 570 °C, a CZTSSe film showed fully developed grains with a size of around 2 µm without noticeable pore development near the Mo back contact. Solar cells with up to 8.03 % efficiency were obtained with a layer thickness of about 1.2 µm. Detailed electrical analysis of the device indicated that the performance of the device is mainly associated with shunt resistance.

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INTRODUCTION Cu2ZnSnS4 (CZTS) and its related compounds are the most promising absorber materials for thin film solar cells because of their abundance, low toxicity, optical, and electrical properties.1-3 The technological advance of CZTS via the evaporation process and use of Cu2ZnSnSe4 (CZTSe) solar cells led to efficiencies of up to 8.4 %1 and 9.15 %,2 respectively. Cu2ZnSn(S,Se)4 (CZTSSe), also commonly referred to as kesterite, is of particular interest due to the achievement of a 12.6 % efficiency using a non-vacuum, hydrazine based deposition process.3 These research results demonstrate that CZTS-based solar cells are currently the most promising materials to replace the Cu(InGa)Se2 absorbers in photovoltaic devices. The processes of CZTS based solar cells can be divided into two categories: vacuum4-6 and solution processes.7-9 These methods for high efficiency use a two-step process, in which pure metallic, S, or Se containing precursors are formed first and then subjected to post-sulfurization. Katagiri et al. reported an efficiency of 6.77 %. The structure of their cell was an Al/ZnO:Al/CdS/CZTS/Mo/soda lime glass (SLG) substrate, with the CZTS film prepared using RF co-sputtering followed by vapor-phase sulfurization.10 Joel et al. developed an absorber layer film grown by co-sputtering using CuSe, SnS, and ZnS targets and subsequently sulfurized at 580 °C in a SnS and S2 atmosphere.11 They reported on a CZTSSe absorber that contained both S and Se from a vacuum process method for the first time. Todorov et al. reported achieving a power conversion efficiency of 9.66 % using a hybrid solution-particle method and by substituting some of the sulfur with selenium. In their thermal annealing process, a metal or sulfur/selenium containing precursor layer is converted into CZTSSe by annealing in elemental sulfur vapor.12 Postselenization of precursor layers is one of the leading methods to fabricate the CZTSe or CZTSSe absorber layers. The precursor layers are typically prepared by vacuum or solution method to sequentially deposit metallic elements and/or alloys with or without selenium or sulfur. 13-15 The reaction paths during selenization depend on annealing conditions and on the initial precursor, which can be either a stack of Cu, Zn, and Sn-containing layers or a homogeneous mixture of all metals with or without chalcogen elements. Yin et al. used a coevaporated precursor layer approach to fabricate CZTSSe solar cell.13 They explained the phase formation mechanism of CZTSSe and secondary phase appeared on the surface of thin films at the early stage of selenization and single phase CZTSSe thin films were formed with prolonged selenization temperature. Fella et al. have fabricated CZTSSe from metal salt precursors with subsequent selenization process.15 They showed that the evolution of the CZTSe phase during selenization of precursor with the fast formation CuSex phases and the subsequent incorporation of Sn and finally Zn. A number of these techniques require a post thermal process to achieve their crystalline state and desired electrical properties, such as vaporphase or gas-phase sulfurization.10-18 In this work, we demonstrate a simple and different route to fabricate CZTSSe by making a S containing layered films using RF/DC sputtering and annealing in a sealed Se tube furnace. In general, the co-sputtering of multi-targets has the advantage of allowing easy tuning and control over the composition ratio and provides homogenously mixed precursors that are thought to be easier for the development of CZTSSe. However, this approach for the stacking order of metal precursors has also some advantages over simultaneous deposited precursors through the use of co-sputtering. This layering method can be more readily applied to mass production and effectively control the composition of the absorber layer. In addition, if the stacking order structure and the subsequent annealing process are designed suitably, one can obtain pure and high-quality CZTSSe absorbers. We recently submitted a paper about the effect of precursor order on the properties of sulfurized Cu2ZnSnS4 thin films for solar cells.19 In that work, we found that the proper precursor sequence for CZTS growth is Cu/SnS/ZnS/Mo. This structure allows for better control of the composition of CZTS without severe Sn and Zn loss. We used compound material targets, instead of Sn and Zn, such as tin sulfide (SnS) and zinc sulfide (ZnS), which provide flat surfaces and well-defined boundaries of their constituent films. In addition, the introduction of ZnS instead of Zn could prevent the loss of highly volatile Zn at high temperatures. In these experiments, we tried to modify the composition of CZTS thin films and to improve device efficiency through the introduction of selenium. The CZTSSe absorber layer was simply fabricated by the selenization annealing of the sulfur containing the Cu/SnS/ZnS/Mo precursor film. Because our selenization process using a nearly sealed furnace provides highly dense Se vapor, it is possible to achieve the formation of a CZTSSe film without a noticeable void. Specifically, the effects of the different annealing temperatures on the structural, morphological, and electrical properties of CZTSSe absorber films were investigated. EXPERIMENTAL SECTION The precursor metal films were fabricated on molybdenum-coated SLG (Mo/SLG) substrates, which were supplied by CLC Phychem Co. Ltd., Korea. The metal precursor layers were sequentially deposited by sputtering from 99.99% pure Cu, ZnS, and SnS targets. The

metal precursors with Cu/SnS/ZnS sequence were formed on the Mo/SLG substrate by RF/DC sputtering at room temperature. The layers were deposited under sputtering powers of 150 W, 200 W, and 200 W for the Cu (DC power), SnS (RF power/ Sn: S =1:1) and ZnS (RF power/ Zn: S =1:1) targets, respectively, at a working pressure of 3 mTorr in an Ar atmosphere. The thickness of each layer in a precursor was adjusted to control the final thickness of the CZTSSe film and the composition ratio. Each layer of a precursor was controlled to have a Cu: SnS: ZnS thickness ratio of 1: 2.6: 2.1. The metal compound precursors were reacted and annealed in a nearly sealed quartz furnace with a heating block push-pull sample holder in the quartz chamber that enabled the precursor samples to be inserted or removed from the hot reaction zone. To provide sufficient Se vapor and prevent severe decomposition of CZTSSe films, the selenization processes were carried out in an Ar filled furnace at slightly above 1 atm. The relief valve was attached to the end of the furnace to maintain a system pressure of slightly above 1 atm regardless of furnace

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temperatures. Before the annealing process, the sealed furnace was evacuated to a low 10-3 Torr pressure to remove moisture and impurities. Then, Ar gas was introduced into the sealed furnace, and the pressure was allowed to reach atmosphere. For the thermal annealing process, the sealed furnace was heated to 330, 380, 430, 480, 500, 520, 540, 560, and 570 °C at a ramping rate of the indicated temperature (°C) /10 min and then annealed for 10~60 min. To fabricate solar cells, the obtained absorber layers were covered with a 50-nm-thick CdS buffer layer by chemical bath deposition. (See the Supporting Information) Then, a 50 nm intrinsic ZnO layer and a 300 nm Al-doped ZnO layer were deposited by RF sputtering. Finally, a 1 µm Al collection grid was deposited on the top of the device by thermal evaporation. Film structure and morphological aspects were studied by field-emission scanning electron microscopy (SEM. Hitachi S-4800). The composition of the precursor and absorber films was determined by inductivelycoupled plasma-optical emission spectroscopy (ICP-OES, Shimadzu ICPS-8100). XRD was performed using a Panalytical Empyrean model. Macro-Raman measurements were carried out in the quasi-backscattering geometry. In order to detect secondary phases more efficiently by using quasi-resonance Raman, two different lasers, the 632.8-nm line of a He-Ne laser and the 441.6-nm line of a He-Cd laser, were used as excitation sources. The penetration depths of the lasers are estimated to be smaller than 200 nm. The laser beam was line-focused with a cylindrical lens to an area of ~100 µm×5 mm with a total power of ~20 mW. The scattered light was filtered by a pair of holographic edge filters and then dispersed by a Triax 320 spectrometer (JY Horiba). Finally, the signal was detected with a thermoelectrically cooled back-illuminated charge-coupled-device detector array. RESULTS AND DISCUSSION To understand the reaction paths of this particular system, we investigated what intermediate phases exist at low-temperature regions. Figure 1 shows plane-view and cross section SEM images of selenized films at different temperatures of 330, 380 and 430 °C. Square-like crystals are uniformly observable on the surfaces of the three selenized thin films, and the grain size is about 0.5 um. On the other hand, a gradual progress of sequential reactions with the different temperatures could be observed from the cross-sectional images. The film of Figure 1(d), which was selenized at 330 °C, appears in four layers. The Cu layer on the top was changed into metal chalcogenide binaries, such as CuSe. As a result of the chalcogenide formation, the thickness of Cu (i.e., about 200 nm) increased to 210 nm. The SnS layer of the middle position partially reacted with Se to form SnSe and SnSe2, and the rest of the SnS (or SnSe and SeSe2) reacted with Cu (or CuSe) to form Cu2SnSe3. The initial thickness of SnS (i.e., about 400 nm) increased to about 600 nm (SnSe or SnSe2 and Cu2SnSe3 layer). We also observed that the ZnS layer on the bottom did not react with Se through the annealing process at 330 °C.

Figure 1. Plane (top) and cross (bottom) SEM images of CZTSSe samples annealed at 330 °C (a,d), 380 °C (b,d) and 430 °C (c,f)

The film of Figure 1(e), which was selenized at 380 °C, appears to have changed, apparently because of a sufficient supply of Se vapor as the temperature increased. The Cu layer reacted with Se and then further reacted with SnSe/SnSe2 layer to form Cu2SnSe3. The ZnS layer still stayed the same even at 380 °C. Figure 1(c) and (f) show SEM images of the reacted films after annealing at 430 °C. Although the surface image of Figure 1(c) is not much different from those of the other two samples, the cross-sectional structure of the reacted film shows a single-layer structure with larger grains. The thickness of the films is about 1.3 µm. The ZnS layer eventually reacted with the layers made from the chemical reaction of Cu, SnS, and Se. Even though the formation of the Cu2SnSe3 is not perfectly confirmed through the SEM images, it can be inferred that ZnS reacts with Cu2SnSe3 to form CZTSSe at around 430 °C according to the mechanism of the chemical reaction proposed: Cu2SnSe3 + ZnS → CZTSSe.20 In order to understand and confirm the formation of CZTSSe films with selenization, the films were analyzed with XRD. Figure 2 shows XRD patterns of the samples obtained at different annealing temperatures. At 330 °C, peak positions corresponding to CuSe, ZnS, SnSe, SnSe2 and Cu2SnSe3 were observed. At 380 °C, the XRD pattern implies that the film consists of Cu2SnSe3, CuSe and ZnS. The peaks corresponding to Cu2SnSe3 and ZnS could be assigned to other phases, such as CZTSSe, from the SEM images and the unchanged ZnS peak in the XRD pattern, and we could confirm that CZTSSe did not develop at around 380 °C. Because the disappearance of the ZnS layer means the incorporation of Zn into a crystal structure, as shown in the SEM image of the sample

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at 430 °C, the prominent diffraction peaks can be assigned not to Cu2SnSe3 but to CZTSSe.

Figure 2. XRD pattern of CZTSSe samples annealed at 330 °C, 380 °C and 430 °C for 1 hour.

However, the XRD studies tell little about in what structure CZTSSe and CZTS crystallizes and about the presence of cubic ZnS.21 To clarify the presence of phases in these layers, Raman microprobe measurements were made on the surface of the absorbers. Figure 3 shows the series of Raman spectra measured with a 441.6 nm (Blue laser-Fig. 3(a)) excitation wavelength and a 632.8nm (Red laser-Fig. 3(b)) excitation wavelength from the selenized films at different temperatures. These spectra are usually attributed to different materials: the blue excitation Raman spectroscopy shows the spectrum of the ZnSe phase, while the red excitation Raman shows the spectrum of CZTS or CZTSe phase.22 The surface analysis using Raman scattering at an excitation wavelength of 441.6 and 632.8 nm again revealed significant differences between the different temperatures of selenization, as shown in Figure 3. The samples taken at 330 and 380 °C show a very strong peak positioned at about 181 cm-1, which is attributed to the presence of the Cu2SnSe3 phase. The 330 °C annealed film also exhibits a weak peak at 264 cm−1, which is assigned to the CuSe compound. During selenization processes at temperatures under 380 °C, some Cu phase would react with Se vapor forming CuSe, and then, the CuSe would react with Sn provided to form the Cu2SnSe3 phase. Consequently, the upper part of the film and the formation of the Cu2SnSe3 phase could reach a Cu-rich state. While CuSe is gradually consumed and Cu2SnSe3 reacted with Zn during the annealing process, the increase in grain size has been attributed to a recrystallization during the Cu-rich regime. The final reaction of the annealing process can be related to the Cu-rich off process, which is known to lead to crevices between the grains. These selenized processes should be similar to typical chalcopyrite CIGS films.23

Figure 3. Raman spectra measured with blue laser excitation wavelength (a) and red laser excitation wavelength (b) from selenized films at different annealing temperatures.

In all Raman results of selenized samples annealed at 430 °C, the spectra measured at the surface region of the sample are characterized by the main CZTSe modes at about 176 and 197 cm-1. From these results, it can be inferred that ZnS reacts with

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Cu2SnSe3 to form CZTSSe at around 430 °C according to the mechanism of the chemical reaction proposed: Cu2SnSe3 + ZnS → CZTSSe.17 The results of the Raman spectra along with the SEM and XRD results conclude that a single phase of CZTSSe can be obtained by selenization at around 430 °C. With the above results of the SEM, XRD and Raman analyses, the simplified reaction pathway, in our specific system, could be understood using the following sequences: 1)

Cu + Se → CuSe SnS + Se → SnSe2+ SnSe CuSe + SnSe or SnSe2 → Cu2SnSe3 [~ 330 °C]

2)

CuSe + SnSe or SnSe2 → Cu2SnSe3 + CuSe [~ 380 °C]

3)

Cu2SnSe3+ ZnS → Cu2ZnSn(S,Se)4 [~ 430 °C]

These results show that the specific stacking order in this study is in accord with the successive reaction path between the elements leading to binaries, ternaries, and quaternaries. It could be helpful for the formation of CZTSSe to place the more reactive layers over the less reactive layers, as in the Cu/SnS/ZnS/Mo structure, because Se is supplied from the outside. It should be noted that a small amount of ZnSe, Cu2SnSe3, and other unidentified species might be present as well due to the relatively low temperature required for the full development of CZTSSe. It is not clear that the intermediate ZnSe forms above 380 °C in our system. The annealed CZTSSe films are seemingly free of voids and have well-developed kesterite phases with large grains. Because the precursor already contains a certain quantity of S, the volume expansion of the precursor after the selenization is less than one of a precursor formed from the pure metals (i.e., Cu, Zn and Sn), which leads to dense and closely packed CZTSSe development. The replacement of S with Se, which has a larger atomic radius, also could play an important role in the void-free nature. In order to enlarge the grain size of the CZTSSe absorber layer, it is necessary to increase the temperature of the annealing process. The surface morphologies and cross-sectional SEM images of the selenized CZTSSe films deposited on Mo/SLG substrates at increased and different annealing temperatures are shown in Figure 4. The CZTSSe films grown at over 500 °C showed a large columnar grain around 1 µm in size. Although the grain size did not change much at over 540 °C, the increase in the average planer grains with an increase in annealing temperature is observed. The majority of the grains have sizes similar to the film thickness. Our results reveal that growing CZTSSe thin films in a fully sealed annealing process with high Se vapor pressure may be advantageous and may result in large grains and dense films. These characteristics, such as a larger grain size, may be advantageous depending on the electronic structure of the grain boundaries.24 The large grain size in the absorber layer maximizes both the minority carrier diffusion length and the built-in potential in a polycrystalline thin film solar cell.5

Figure 4. Plane (left) and cross (light) SEM images of CZTSSe films taken at various temperatures.

The MoSe2 formation in the Mo films and the CZTSSe/Mo films during the selenization process was observed. During the selenization annealing process, the molybdenum back electrode can react with the chalcogen to form an interfacial MoSe2 layer. In CIGS solar cells, the MoSe2 contributes to the improvement of the electrical properties of CIGS solar cells.25 However, the thick

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interfacial MoSe2 layer could lead to other problems for CZTSSe solar cells.26 In our experiment, the MoSe2 thickness was found to be thicker when increasing the temperature of selenization process. About 0.5-µm- and 1.4-µm-thick MoSe2 layers formed after 1 hour of selenization at temperatures of 480 °C and 570 °C, respectively. The formation of a thick MoSe2 layer as a result of the post annealing process can give rise to high series resistance. If the selenization time is decreased or the thickness of precursor is increased, the resulting thickness of the MoSe2 layer could be decreased. With the modification of our high annealing process, the thicknesses of the MoSe2 layer were limited to 0.6 µm or less, as will be said later. Figure 5 shows the XRD patterns of the CZTSSe films with different annealing temperatures. In the XRD patterns of the CZTSSe films annealed at 480 °C, 500 °C, 520 °C, 540 °C and 560 °C, the XRD peaks were observed at 2θ ∼ 27.2°, 32.9°, 47.4°, and 56.2°, which could be indexed to the diffraction of (1 1 2), (2 2 0) and (3 1 2) crystal planes of the CZTSSe crystals, respectively. The formation of MoSe2 by the consumption of Mo during selenization process was evidenced by the reduced intensity of the Mo peak and the increase in the MoSe2 peaks in the XRD pattern (Fig. 5). These results of the XRD experiment correspond well with the SEM analysis.

Figure 5. XRD pattern of CZTSSe films taken at various temperatures.

In order to obtain information about the chemical composition of the films, the selenized CZTSSe films were analyzed with inductively coupled plasma mass spectrometry (ICP-MS). Table 1 shows the chemical composition of the CZTSSe films. The composition of all selenized CZTSSe films included Cu with approximately Zn/Sn=1. An increase of Se with an increase of temperature can be mainly ascribed to the increased formation of MoSe2. The compound precursor layer has a Cu/(Zn+Sn) ratio of 0.94 and a Zn/Sn = 1.05, which are close to selenized CZTSSe thin film. The important thing is that the composition of Cu, Zn, and Sn remains almost unchanged before and after the annealing process. Generally, a considerable loss of Sn could occur in the absorber layer at higher annealing temperatures because of the high partial pressure of SnS.27 On the other hand, our precursor structure with S and the almost sealed selenization furnace could help the precursor maintain its initial metal compositions. Table 1. Chemical Composition of CZTSSe Films with Different Annealing Temperatures. Annealing process Cu Zn Sn Se S Cu/(Sn + Zn) Zn/Sn condition 480 °C for 1 hour 18.68 9.82 9.53 57.58 4.39 0.97 1.03 500 °C for 1 hour 18.69 10.27 9.65 57.06 4.34 0.94 1.06 520 °C for 1 hour 15.02 8.15 7.78 65.07 3.99 0.94 1.05 540 °C for 1 hour 14.11 7.70 7.25 66.87 4.08 0.94 1.06 560 °C for 1 hour 12.11 6.72 6.27 70.95 3.95 0.93 1.07 570 °C for 1 hour 12.01 6.57 6.20 71.25 3.97 0.94 1.06 Table 2 lists the current density–voltage (J–V) parameters for each solar cells (with 0.185 cm2 of device area without AR coating) based on CZTSSe films grown with different temperatures in the selenization process. Series resistance (Rs) and shunt resistance (Rsh) were calculated from fitting of the one-diode model to the current voltage (J–V) data using the procedure described by Hegedus and Shafarman.28 In the table 2, the short-circuit current (Jsc) is seen to increase with increasing temperatures in the selenization process. The microstructures of the grain shown in Figure 4 can hint to the possibility of shunt paths and hence device efficiency. The CZTSSe selenized at 480 °C for 1 hour shows the smallest grain size, the lowest shunt resistance, and hence the worst device efficiency, with the lowest Jsc. Because the smaller grains lead to more grain boundaries, this observation agrees with the hypothesis of a grain boundary shunt mechanism.29 Although the best conversion efficiencies of the CZTSSe cell has a thick interfacial MoSe2 layer, the film has the largest grain size, the highest shunt resistance, and hence the best device efficiency in this

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case. This suggests that there is a correlation between device performance and an enlargement in grain size. Table 2. Summary of Device Parameters for CZTSSe Films Prepared with Different Annealing Temperatures. (The data shown are the average values obtained from 7 devices with standard deviation)

Annealing process condition 480 °C for 1 hour 500 °C for 1 hour 520 °C for 1 hour 540 °C for 1 hour 560 °C for 1 hour 570 °C for 1 hour

VOC (V) 0.37 ± 0.01 0.41 ± 0.01 0.35 ± 0.01 0.34 ± 0.02 0.37 ± 0.02 0.35 ± 0.01

JSC (mA/cm2)

Fill factor (%)

24.65 ± 0.97 26.98 ± 0.84 29.03 ± 0.70 29.90 ± 0.95 30.82 ± 1.30 33.57 ± 1.08

33.91 ± 0.97 36.19 ± 1.56 34.57 ± 1.79 40.89 ± 2.38 41.60 ± 4.06 50.01 ± 1.16

Efficiency (%) 3.11 ± 0.13 3.90 ± 0.30 3.53 ± 0.20 4.19 ± 0.48 4.71 ± 0.79 5.89 ± 0.24

Rs (Ω cm2) 34.86 ± 6.59 8.73 ± 2.09 8.70 ± 1.50 8.04 ± 0.97 6.59 ± 0.82 34.30 ± 4.90

Rsh (Ω cm2) 36.44 ± 13.18 55.79 ± 6.71 45.20 ± 9.06 61.53 ± 12.18 69 ± 15.44 106.14 ± 16.64

The CZTSSe devices at other annealing conditions (i.e., temperature and annealing times) can show different power conversion efficiencies. To enhance the conversion efficiencies of the CZTSSe cell, we explored the process with regard to a precursor thickness and an annealing time more deeply. To achieve the large grain size of absorber layer, the sealed furnace was heated to 570 °C. In our case, a limitation to the annealing temperature was set to 570 °C to avoid substrate deformation, phase separation, or decomposition of CZTSSe. Although the annealing temperatures around 570 °C generally lead to improved crystallinity and promoted grain growth, the MoSe2 layer is thicker. Thus, it is essential to shorten the annealing times in high-temperature selenization processes. With that aim, we performed a number of selenization experiments at different temperatures and annealing times, and we identified that a suitable selenization time lies between 10 min~20 min for temperatures higher than 550 °C. Thereafter, we confined selenization process times to 10 min~ 20 min and tried to find the optimum thickness of absorber. The thickness of the precursor was adjusted so that the final thickness of the CZTSSe film was approximately 1.2, 1.4, 1.6 and 1.8 µm. Figure 6 shows the surface and cross-section SEM images of the CZTS films with different thicknesses through an annealing process of 570 °C for 10 to 20 min. The annealing process during 10 min at 570 °C yielded grain sizes of about 0.5 ~ 3 µm, 0.3 ~ 3 µm, 0.3 ~ 2 µm, and 0.2 ~ 1.5 µm for CZTSSe films with thicknesses of 1.2, 1.4, 1.6 and 1.8 µm, respectively. However, the annealing process during 20 min at the same temperature yielded grain sizes of 2 ~ 4 µm, 1 ~ 4 µm, 1 ~ 3 µm, and 0.5 ~ 1.5 µm for the CZTSSe films having thicknesses of 1.2, 1.4, 1.6, and 1.8 µm, respectively. It can be said that an annealing time of 10 min is not sufficient to fully develop grains of the absorber layer, specifically for an absorber layer 1.4 µm and thicker. In our selenization process, all the annealed films exhibited well-developed grains, which span the entire film thickness, as shown in Figure 7.

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Figure 6. Plane and cross SEM images of CZTSSe films of various thickness and taken at various conditions for the annealing process.

The best devices (with a 0.185 cm2 device area without AR coating) were made from the corresponding annealed films. J–V curves and the device parameters are shown in Figure 7 and Table 3, respectively. The best cell had an absorber thickness of 1.2 µm and an annealing time of 20 min, and it yielded an open-circuit voltage of 0.41 V, a short-circuit current of 36.10 mA/cm2, a fill factor of 54.62 %, and a conversion efficiency of 8.06 %. Within the same annealing time, thin CZTSSe films showed large grain sizes, high shunt resistances, and high short-circuit currents. In our results for process optimization, the shunt resistance is found to be most influential for the device efficiency of a CZTSSe film. Among these annealing conditions and thicknesses of CZTSSe film, our best cell device had a 1.2 µm thickness prepared at 570 °C for 20 min and possessed the largest grain size, the highest shunt resistance, and hence the best device efficiency. The CZTSSe with a 1.8 µm thickness prepared at 570 °C for 10 min gave the smallest grain size in plane direction, the lowest shunt resistance, and hence the worst device efficiency. A high-temperature and adjusted annealing treatment could increase the crystallinity and grain size of CZTSSe films, which is conducive to the fabrication of high-efficiency solar cells because the efficiency of a polycrystalline solar cell increases with an increase in the grain size of the absorbed layer material. However, the annealing process at high temperatures could cause a high series resistance due to the back contact electrode. Therefore, it is necessary when searching for improved methods to give a good crystalline quality and control the formation of MoSe2 individually.

Figure 7. Current-voltage characteristics of CZTSSe solar cells with various absorber thicknesses and different selenization processes.

Table 3. Summary of Device Parameters for CZTSSe Films Prepared with Different Annealing Conditions. (The data shown are the average values obtained from 7 devices with standard deviation) Annealing process condition

570 °C for 10 min

570 °C for 20 min

Thickness of Selenized CZTSSe film (um) 1.2 1.4 1.6 1.8 1.2 1.4 1.6 1.8

VOC (V)

JSC (mA/cm2)

Fill factor (%)

Efficiency (%)

Rs (Ω cm2)

Rsh (Ω cm2)

0.38 ± 0.01 0.39 ± 0.01 0.39 ± 0.01 0.32 ± 0.06 0.39 ± 0.01 0.38 ± 0.01 0.40 ± 0.01 0.39 ± 0.01

34.21 ± 2.07 32.47 ± 1.45 25.69 ± 2.34 22.72 ± 2.74 35.72 ± 0.91 35.54 ± 0.74 30.59 ± 1.77 28.65 ± 2.32

45.74 ± 2.21 47.61 ± 2.99 37.09 ± 2.85 32.33 ± 2.91 54.48 ± 0.25 55.17 ± 0.87 45.33 ± 0.83 46.50 ± 1.48

6.01 ± 0.20 5.94 ± 0.10 3.70 ± 0.23 2.42 ± 0.73 7.80 ± 0.34 7.56 ± 0.19 5.49 ± 0.44 5.22 ± 0.39

1.96 ± 0.53 0.61 ± 0.06 1.77 ± 0.62 3.83 ± 0.63 0.57 ± 0.07 0.73 ± 0.06 0.64 ± 0.07 0.75 ± 0.11

116.00 ± 21.34 143.86 ± 19.62 71.00 ± 9.81 41.86 ± 7.78 415.29 ± 50.66 245.00 ± 83.10 112.14 ± 17.35 74.14 ± 9.67

Additionally, we reconfirmed the obtainable efficiency from our best cell process to be above 8 % from the solar cell evaluation at Korea Institute of Energy Research, as shown in the supporting information. This cell was fabricated through the same process with an 8.03 % efficiency of the CZTSSe solar cell. The best cell had an area of 0.398 cm2 without AR coating and yielded an opencircuit voltage of 0.378 V, a short-circuit current of 36.53 mA/cm2, a fill factor of 0.5865, and a conversion efficiency of 8.029 %. Figure 8 shows the external quantum efficiency (EQE) of the corresponding CZTSSSe solar cell of 8.029 %. The maximum quantum efficiency of 88.5 % is obtained for a photon wavelength of 585 nm and exhibits the characteristic short wavelength cutoff from the CdS buffer layer. CZTSSe devices are characterized by a long end tail curve sloping gradually from 585 nm, which may be attributed to the high doping densities and small electron diffusion lengths. The EQE spectra can be used to determine the absorber layer band gap by fitting a plot of [E ln(1-EQE)]2 vs. photon energy graph near the band edge, where E=hc/λ (h is plank’s constant, c is the speed of light and λ is the wavelength of light), as shown in Figure 8 (b).28 From this, a bandgap value of about 1.03 eV is determined. Though not shown in this report, we found from Raman measurements that there are no noticeable impurities such as ZnSe on the surface of the absorber annealed at 570 °C for 20 min. This finding will be published elsewhere.

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Figure 8. (a) External quantum efficiency curve of the 8.029 % solar cell. (b) Bandgap determination plot using EQE data.

CONCLUSIONS We have fabricated CZTSSe absorbers using compound material sputtering targets and a sealed furnace annealing system. Within our process windows, we are able to suggest a reliable selenization process condition and an optimum CZTSSe thickness, with large grain formation, small MoSe2 formation, and high efficiencies over 8%. During the annealing process optimization, the shunt resistance was found to be most relevant to the device efficiency. Note that the microstructures of the grain are correlated to shunt resistances and hence device efficiency. In order to improve the fill factor and the conversion efficiency, further investigations designed to optimize the conditions used for CZTSSe preparation and the absorber thickness are now in progress.

AUTHOR INFORMATION Corresponding Author * Tel: (+82)53-785-3700; fax: (+82)53-785-3739; e-mail: [email protected]

AUTHOR CONTRIBUTIONS The manuscript was written through contributions of all authors. All authors have given approval to the final version of the manuscript. ‡ These authors contributed equally.

FUNDING SOURCES This work was supported by the New & Renewable Energy Core Technology Program of the Korea Institute of Energy Technology Evaluation and Planning (KETEP) granted by financial resources from the Ministry of Trade, Industry & Energy, Republic of Korea (No. 20123010010130) and the DGIST R&D Programs of the Ministry of Education, Science and Technology of Korea (15-BD-05)

ACKNOWLEDGEMENTS We thank Dr. Kim and Ms. Bae of the Korea Basic Science Institute in Busan center for obtaining the SEM measurements.

Supporting Information CdS thin film fabrication, the photo of typical device, dark I-V data, EDS-STEM mapping images, J-V characteristics and Certificated I-V and EQE data of above 8 % from the solar cell evaluation at Korea Institute of Energy Research. This information is available free of charge via the Internet at http: //pubs.acs.org.

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Table of contents/Abstract Graphic

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Growth and Device Characteristics of CZTSSe Thin-Film Solar Cells

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