High-Temperature Defect-Induced Hopping Conduction in

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High Temperature Defect-Induced Hopping Conduction in Multi-Layered Germanium Sulfide for Optoelectronics Applications in Harsh Environments Srinivasa Reddy Tamalampudi, Shashikant Patole, Boulos Alfakes, Raman Sankar, Ibraheem Almansouri, Matteo Chiesa, and Jin-You Lu ACS Appl. Nano Mater., Just Accepted Manuscript • Publication Date (Web): 26 Mar 2019 Downloaded from http://pubs.acs.org on March 30, 2019

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ACS Applied Nano Materials

High Temperature Defect-Induced Hopping Conduction in MultiLayered Germanium Sulfide for Optoelectronics Applications in Harsh Environments Srinivasa Reddy Tamalampudi,†,‡ Shashikant Patole,‡ Boulos Alfakes,†,‡ ,Raman Sankar,) Ibraheem Almansouri,† Matteo Chiesa,†,‡, †

*

Jin-You Lu†,‡

Laboratory for Energy and NanoScience (LENS), Khalifa University of Science and

Technology, Masdar Institute Campus, PO Box 54224, Abu Dhabi, UAE ‡

Department of Mechanical and Materials Engineering, Khalifa University of Science and

Technology, Main Campus, PO Box 54224, Abu Dhabi, UAE )

Institute of Physics, Academia Sinica, Taipei R.O.C. 11529, Taiwan Arctic Renewable Energy Center (ARC), Department of Physics and Technology, UiT The

Arctic University of Norway, 9010 Tromsø, Norway Keywords: GeS, electrical transport, 2D Materials, hopping conduction, defects, density functional theory, high-temperature NNH hopping, and van der Waals staking. * [email protected]

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Abstract: Intrinsic crystal defects play a major role in tailoring the electrical and optical properties of two-dimensional (2D) materials. Here, we probe the impact of planar crystal defects on the electrical characteristics of Germanium sulphide (GeS) field effect transistor (FET) at different operating temperatures varying from 300 K to 575 K. Our results show that the measured mobility of the GeS field effect transistor was 0.04×10-3 cm2/VS at 300K, and this value reaches to 58×10-3 cm2/VS at 575 K. It is important to note that, the mobility of GeS FET at elevated temperatures in this study is greater than the mobilities in the recent reported GeS photodetectors studies. Furthermore, evidences that the threshold voltage (Vth) decreases and carrier concentration increases with increasing temperature in the GeS channel are provided. We demonstrate an Arrhenius-like relation of the carrier transport as a function of temperature, a behavior that we attribute to nearest neighbour-hopping (NNH) conduction. The existence of planar defects is revealed using transmission electron microscopy (TEM) while density functional theory (DFT) analysis supports the hypothesis that the formation of localized energy states governs hopping conduction. This study reports hopping conduction at the temperature above 300 K for the first time, whereas previous investigations on 2D materials have reported hopping mechanism at low-temperature (< 200K) range. These observations give insight into the fundamental charge conduction mechanisms at high temperature in other 2D materials systems which are expected to aid in the development of applications for harsh environments.


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Introduction: Semiconducting

transition

metal

dichalcogenides

(TMDC)

such

as

MoX2 and

WX2 compounds (X= S or Se) have attracted much attention due to the fact that their bandgaps, ranging between 1–2 eV, are suitable for a variety of applications including transistors1, solar cells2, light emitting devices3, lasers4, memories5 and radio frequency6 and terahertz applications7. Despite this interest, measurement of electrical figures of merit for TMDCs trails far behind theoretical predictions due to the role that intrinsic and extrinsic defects play in limiting the electrical figures of merits of these 2D crystals8. In general, intrinsic defects result from the nonstoichiometric growth methods of the bulk crystal from which the 2D crystals are exfoliated9. The presence of defects hinders the applicability of 2D materials in high-performance applications10, but it provides the promise for additional tunability11-14 of various parameters. In this regard, Nan et al. a strong photoluminescence (PL) enhancement of monolayer MoS2 through defect engineering and oxygen bonding15. Qiu et al.13 reported conduction via defectinduced variable-range hopping transport characteristics in intrinsic defected MoS2 at the temperature below 100 K. However, this hopping mechanism has never been reported for 2D materials at elevated temperatures (> 273 K) due to phonon dominated band conduction. Apart from the study of defects in 2D crystals, the embodiment of these 2D materials in modern integrated circuits requires operation capabilities at high temperatures due to the high power density at the circuit level. Consequently, evaluation of the impact of the crystal defects and high operating temperatures on 2D materials-based devices are of great interest. Here we investigated high temperature induced hopping conduction in multi-layered GeS (Germanium Sulphide), an isoelectronic counterpart of phosphorene, which is considered to have promising optical properties 16-18.



GeS belongs to the group IV-VI semiconductors, which typically have band gap around 1.6 eV19. Reported electrical measurements show that GeS is always found to be ptype20. Multi layered GeS transistors exhibits anisotropy, high photoresponsivity, and broad spectral response advantageous in opto-electronic devices21-23. However, experimentally, GeS devices exhibit very high resistivity behavior at ambient conditions due to the intrinsic structural defects limiting charge transport and injection20. Hence, it is essential to understand the nature of the defects in GeS flakes, which could be helpful to enhance the carrier mobility of the GeS. In this work, we focus our investigation on a multi-layered GeS FET, with the aim of shedding light on the role of intrinsic defects on the electrical properties at elevated temperatures (300K-575K). The transmission electron microscopy (TEM) characterization and density functional theory (DFT) simulation support our experimental observations and suggest the presence of localized gap states that allow hopping conduction. Our observations reveal, for the first time, high temperature induced hopping conduction in 2D materials suitable for optoelectronics applications in harsh environment. Results and Discussion: Figure 1(a) shows a schematic representation of the layered GeS crystal grown by the chemical vapor transport. The crystallinity and orientation of the grown single crystals were identified by the X-ray diffraction (XRD) measurements, as shown in Fig. 1(b). The GeS crystals are grown with an orthorhombic orientation, and with lattice parameters, a=4.20 Å, b=3.65 Å, and c=10.44 Å retrieved from the XRD analysis, which is similar to recently reported literatures17-18. The plane orientations are aligned by marking the layer-by-layer stacking as c-axis direction, and the armchair and zigzag chain orientation are along a-axis and b-axis directions, respectively. The high-intensity peaks represent the GeS grown crystals aligned along the (002) plane with high crystallinity. The phonon modes of the exfoliated multilayer GeS flakes were measured by Raman spectroscopy as shown in Fig. 1(c) and the


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(15nm) and Au (30nm) were deposited by using thermal evaporation. The inset of Fig. 2(b) shows as-fabricated GeS FET device. Figure 2(b) shows the dark output characteristics Vsd (voltage bias between source and drain) versus Isd (current passing between drain and source) of the fabricated multilayer GeS FET while applying the drain voltage from 0 to 10 V with a channel length of 20 µm and width of 20 µm at ambient temperature. The measured dark output characteristics exhibited insulator type behavior at room temperature with a resistance of 2.5x1012 V# which agrees with previously reported ones24. Furthermore, the drain current (Ids) is measured as a function of Vsd while sweeping the gate voltage (Vg) ranging from -80 to +80V in steps of 20V, as shown in Fig 2(c). All of the measured output curves with different applied gate voltages exhibited a Schottky contact behavior due to the work function difference between the GeS flake (5.1 eV) and the Ti electrodes (4.3eV). This suggests that the applied gate voltages are not sufficient to reduce the height of the Schottky barrier (SBH) between the Ti and GeS by tuning the Fermi level of the Ti. The transfer characteristics of the device at a fixed bias voltage (Vsd=5V) are measured at dark while sweeping the gate voltage from -80 V to +80 V, as shown in Fig. 2(d). The large negative gate voltage of -60 V is required to form the p-type channel for hole carriers to pass through. The inset of Fig. 2(d) depicts the energy band diagram of Ti/GeS/Ti FET under Vg>0 and Vg

High-Temperature Defect-Induced Hopping Conduction in

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