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Influence of Dielectric Layers on Charge Transport through Diketopyrrolopyrrole-Containing Polymer Films: Dielectric Polarizability vs Capacitance Jiyoul Lee,*,†,‡ Jong Won Chung,§,∥,‡ Gyu Bok Yoon,† Moo Hyung Lee,⊥ Do Hwan Kim,# Jozeph Park,¶,○ Jin-Kyun Lee,◊ and Moon Sung Kang*,⊥ †
Department of Graphic Arts Information Engineering, Pukyong National University, Sinseon-ro 365, Nam-gu, Busan 608-739, Republic of Korea § Organic Materials Lab, Samsung Advanced Institute of Technology, Samsung Electronics Company, Samsung-ro, Suwon, Gyeonggi 443-370, Republic of Korea ∥ Department of Chemical Engineering, Stanford University, Stanford, California 94305-5025, United States ⊥ Department of Chemical Engineering and #Department of Organic Materials and Fiber Engineering, Soongsil University, Sangdo-ro 369, Dongjak-gu, Seoul 156-743, Republic of Korea ¶ Department of Materials Science and Engineering, Korea Advanced Institute of Science and Technology (KAIST), Daehak-ro 291, Yuseong-gu, Daejeon 305-338, Republic of Korea ◊ Department of Polymer Science Engineering, Inha University, Inha-ro 100, Nam-gu, Incheon 402-751, Republic of Korea S Supporting Information *
ABSTRACT: Field-effect mobility of a polymer semiconductor film is known to be enhanced when the gate dielectric interfacing with the film is weakly polarizable. Accordingly, gate dielectrics with lower dielectric constant (k) are preferred for attaining polymer field-effect transistors (PFETs) with larger mobilities. At the same time, it is also known that inducing more charge carriers into the polymer semiconductor films helps in enhancing their field-effect mobility, because the large number of traps presented in such a disorder system can be compensated substantially. In this sense, it may seem that employing higher k dielectrics is rather beneficial because capacitance is proportional to the dielectric constant. This, however, contradicts with the statement above. In this study, we compare the impact of the two, i.e., the polarizability and the capacitance of the gate dielectric, on the transport properties of poly[(diketopyrrolopyrrole)-alt-(2,2′-(1,4phenylene)bisthiophene)] (PDPPTPT) semiconductor layers in an FET architecture. For the study, three different dielectric layers were employed: fluorinated organic CYTOP (k = ∼2), poly(methyl methacrylate) (k = ∼4), and relaxor ferroelectric poly(vinylidene fluoride-trifluoroethylene-chlorotrifluoroethylene) (k = ∼60). The beneficial influence of attaining more carriers in the PDPPTPT films on their charge transport properties was consistently observed from all three systems. However, the more dominant factor determining the large carrier mobility was the low polarizability of the gate dielectric rather than its large capacitance; field-effect mobilities of PDPPTPT films were always larger when lower k dielectric was employed than when higher k dielectric was used. The higher mobilities obtained when using lower k dielectrics could be attributed to the suppressed distribution of the density of localized states (DOS) near the transport level and to the resulting enhanced electronic coupling between the macromolecules. KEYWORDS: charge transport, dielectric layer, diketopyrrolopyrrole-containing polymer, polymer field-effect transistors, Gaussian disorder model
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INTRODUCTION A semiconductor layer in a polymer field-effect transistor (PFET) is insulated from gate electrode by the dielectric layer, and the conduction channel in the device is formed at the dielectric/semiconductor interface. To obtain high-performance PFETs, therefore, the use of an optimal dielectric layer is as important as the choice of the polymer semiconductor. Beyond the engineering issues, such as the processability of the material that yields pinhole-free films and the solvent © XXXX American Chemical Society
orthogonality of materials against any contacting layers in the device, the dielectric layer with high specific capacitance is highly sought. This is because dielectrics with large capacitance allow accumulating a large number of charge carriers in the conduction channel even at low operating voltages, which is Received: August 9, 2016 Accepted: October 18, 2016 Published: October 18, 2016 A
DOI: 10.1021/acsami.6b09993 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX
Research Article
ACS Applied Materials & Interfaces
Figure 1. Schematic device structure and chemical structure of the polymer semiconductor (PDPPTPT) and the three different gate dielectrics: (a) low-k fluorinated organic CYTOP, (b) PMMA, and (c) high-k relaxor ferroelectric P(VDF-TrFE-CTFE) terpolymer.
because they exhibit high carrier mobility (as high as 12.5 cm2V−1s−1) despite their disordered microstructure that often yields amorphous morphology.11−13 We, in fact, focused on the poor crystallinity of the DPP-containing polymer films, of which the transport could be interpreted using the wellestablished Gaussian disorder model (GDM) introduced by Bässler et al.14−16 Three different polymer dielectric layers (low-k fluorinated organic CYTOP, poly(methyl methacrylate) (PMMA), and high-k relaxor ferroelectric terpolymer poly(vinylidene fluoride-trifluoroethylene-chlorotrifluoroethylene (P(VDF-TrFE-CTFE))) were used as the gate insulators of the PFETs.10,17 See Figure 1 for their respective chemical structures. Temperature-dependent field-effect mobility values were analyzed using the GDM, and the influence of the dielectric layers on the transport properties of the polymer film was studied. The benefits of inducing more charge carriers in the film could be confirmed from the given series of data. However, the PDPPTPT films gated with the highest k P(VDFTrFE-CTFE), which allows inducing the largest number of carriers in the film among the series we examined, did not yield the largest mobility. Instead, enhanced field-effect mobilities for PDPPTPT films were obtained when the films were interfaced with lower k dielectrics than when with higher k dielectrics. Analysis of the experimental results with GDM showed that the broadening of their density of states (DOS) becomes smaller and the electronic coupling between the molecules in the semiconductor channel becomes larger, as insulators with large dielectric constant were employed. Overall, the significance of the polarization of the semiconductor/gate dielectric interface in PDPPTPT FETs in determining the charge transport could be highlighted.
critical for portable device applications driven by thin-film batteries. More importantly, the large induced charge carrier density is known to fill the trap states of disordered polymer films that suppress the unfavorable influence of traps on transport and enhances the field-effect mobility of the channel. Consequently, enhanced transconductance for PFETs could be obtained under low gate voltages but at high carrier concentrations when highly capacitive dielectrics were used.1 A high specific capacitance of the dielectric layer can be achieved either by using an ultrathin insulating material or by using an insulator with a high dielectric constant (k).2−4 While the merits of employing an ultrathin dielectric on the charge transport stand obvious, the influence of using high-k dielectrics on the transport properties of the semiconductor films has, in fact, been subjected to debate.5−10 For example, Veres et al. showed that the field-effect mobility of polymer semiconductors can be enhanced when using low-k dielectrics instead of using high-k dielectrics. Their explanation was that the dielectric materials with higher dielectric constant provide the transport channel with a more polarizable environment that amplifies energetic disorder near the transport level.5,6 Meanwhile, Dimitrakopoulos et al. and Li et al. demonstrated that the argument above is not applicable to their organic semiconductors.2,10 Instead, it was claimed that the large carrier concentration induced in organic semiconductors by using high-k dielectrics yields improved carrier mobility, due to the trap-filling effect as mentioned above.2,9,10 In the present work, we investigate the effects of different dielectric layers on the charge transport properties of polymer semiconductor thin films. The prime focus of this study is to compare the impact of the energetic polarization generated by the dielectric layer in comparison with that of the trap-filling effect benefiting from accumulating charge carriers into polymer semiconductors. For the polymer semiconductor, poly{2,2′-[(2,5-bis(2-hexyldecyl)-3,6-dioxo-2,3,5,6tetrahydropyrrolo[3,4-c]pyrrole-1,4-diyl)]dithiophene-5,5′-diylalt-benzen-1,4-diyl} (PDPPTPT) was employed. See Figure 1 for its chemical structure. Polymer semiconductors containing diketopyrrolopyrroles (DPP) are an intriguing class of materials
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EXPERIMENTAL METHODS
Sample Preparation. To fabricate PFETs, heavily doped (n++) Si substrates with a 200 nm thick silicon dioxide (SiO2) underwent a typical wafer-cleaning procedure: sonication in acetone, isopropanol, and deionized water in sequence for 10 min. To form the source and drain (S/D) electrodes, a 30 nm thick gold (Au) layer with a 5 nm thin titanium (Ti) adhesion layer underneath was thermally evaporated onto the SiO2 surfaces and then patterned by photolithography and B
DOI: 10.1021/acsami.6b09993 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX
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ACS Applied Materials & Interfaces
Figure 2. (a) 2D-GIXRD pattern of the PDPPTPT film spin coated onto an n+-Si/SiO2 substrate. (b) Schematic illustration of mixed face-on and edge-on PDPPTPT polymer chain conformations. 1D X-ray diffractograms obtained from (c) in-plane and (d) out-of-plane directions of the corresponding 2D-GIXRD pattern.
Figure 3. Transfer characteristics of the PFETs with (a) low-k fluorinated organic CYTOP, (b) PMMA dielectric layer, and (c) high-k relaxor ferroelectric P(VDF-TrFE-CTFE) terpolymer dielectrics. from Arkema. Co. was spin coated. The resulting film was soft baked at 80 °C for 10 min and then placed under vacuum at 120 °C for 24 h. The average thickness of the P(VDF-TrFE-CTFE) terpolymer dielectric layer was ∼750 nm, which yielded a specific capacitance of ∼71 nF cm−2 (Figure S1). Subsequently, the top-gate electrode was formed onto the dielectric layers by thermally evaporating Au (50 nm) through a shadow mask to complete the PFET fabrication. Device Characterization. The current−voltage (I−V) characteristics of the PFETs were recorded using a Keithley 4200-SCS semiconductor analyzer, connected to a Janis cryogenic vacuum probe station with a chamber pressure below 10−6 Torr at room temperature. Liquid nitrogen was introduced in the cryogenic probe station to acquire I−V characteristics at different substrate temperatures (160− 240 K). Grazing-Incidence X-ray Diffraction (GIXRD). Grazing-incidence X-ray diffraction (GIXRD) analyses on the PDPPTPT polymer films were carried out at the 4C2 and 10C1 beamline of the Pohang Accelerator Laboratory (PAL). The wavelength of the beam was 1.54 Å, and its incident angle was 0.18°.
lift-off processes. The resulting width (W) and length (L) of interdigitated S/D electrodes in a comb-shaped structure were 5 mm and 10 μm, respectively. The PDPPTPT polymer (Mw ≈ 37 000 with PDI of 2.52, synthesized according to a procedure described previously11) was deposited onto the substrate. This was done by spinning a 10 mg/mL solution of PDPPTPT in hot chloroform followed by annealing the resulting films at 200 °C for 30 min in a glovebox (oxygen and water contents below 1 ppm). The average thickness of the PDPPTPT films estimated using an atomic force microscope was 50−55 nm. The polymer dielectric layers (CYTOP, PMMA, and P(VDF-TrFE-CTFE)) were formed onto the PDPPTPT films so that FETs in staggered (bottom-contact and top-gate) structure were fabricated (see Figure 1). Specifically, for the PFETs with low-k CYTOP dielectric layer (k = ∼2), a solution of CYTOP purchased from Asahi Glass Co. was spin coated directly onto a PDPPTPT layer, and then the resulting film was annealed at 150 °C under vacuum for 24 h. The average thickness of the CYTOP dielectric layer was ∼750 nm, resulting in a specific capacitance of ∼2.4 nF cm−2. For the PFETs with PMMA dielectric layer (k = ∼4), a PMMA solution dissolved in n-butylacetate (80 mg/mL) was spin coated onto a PDPPTPT layer and baked at 80 °C for 2 h. This yielded a film thickness of ∼350 nm and a specific capacitance of ∼8.7 nF cm−2. Finally, for the PFETs with high-k P(VDF-TrFE-CTFE) dielectric (k = ∼60), a solution of P(VDF-TrFE-CTFE) purchased
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RESULTS AND DISCUSSION Crystallinity of PDPPTPT Thin Films. The crystallinity of the PDPPTPT films was characterized by GIXRD. As shown in Figure 2a, 2D-GIXRD patterns reveal that the spin-coated C
DOI: 10.1021/acsami.6b09993 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX
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ACS Applied Materials & Interfaces polymer PDPPTPT films on the SiO2 surface contain domains of macromolecules in mixed face-on and edge-on chain orientations (Figure 2b) with a certain degree of disorder, manifested as dim spots in the pattern. Only the (100) peaks were obvious in the out-of-plane direction (Figure 2a and 2c). The (100) diffraction peak at qz = 0.265 Å−1 indicates that interspacing between the backbone of the molecules in the qz direction is 23.7 Å. The faint peaks in the in-plane direction (qxy) of the 2D-GIXRD pattern were barely identifiable in the 1D profile of X-ray patterns (Figure 2d), which could be indexed as (300) and (010) directions. The (010) diffraction peak in the qxy direction corresponds to the π−π stacking distance between the conjugated backbone of 3.78 Å. The poor microstructural properties of the resulting film allowed us to use the GDM to interpret the energy states of the polymer films and their transport behavior. Current−Voltage Characteristics of the PDPPTPT FETs. Figure 3 shows the drain current (ID) vs gate voltage (VG) relations (transfer characteristics) of PFETs obtained in the linear (VD = −10 V) and saturation (VD = −40 V) regimes. As shown in Figure 3a, the transfer characteristics of the PFETs containing the fluorinated CYTOP dielectric exhibited typical V-shaped ambipolar behavior with little hysteresis between forward and reverse bias sweeps.18 The field-effect mobility (μ) of the PDPPTPT films was estimated from the linear slope between ID and VG using the following transistor equation in the linear regime1 ID = μ
W Ci(VG − VT)VD L
240 K. Figure 4 displays the evolution of the transfer characteristics (VD = −10 V) at different temperatures and
(1)
where Ci is the specific capacitance of the dielectrics and VT is the threshold voltage. The mobility values for these devices were 0.22 and 0.03 cm2V−1s−1 for holes and electrons, respectively. Considering the unfavorable microstructure of the PDPPTPT films with mixed face-on and edge-on phases, these carrier mobility values (especially for holes) are fairly high. In fact, high carrier mobility values have been reported from physically disordered polymer semiconductor films, especially when the molecular weight is high or when the disordered films contain nanocrystallites in amorphous matrix.19−21 It has been suggested that the charge transport can occur effectively through PDPPTPT films in the presence of these nanoscale aggregations that form short π-stacked tiemolecule bridges between macromolecules.21 The transfer characteristics of the PFETs with the PMMA dielectrics and the high-k relaxor ferroelectric terpolymer films (Figure 3b and 3c, respectively) also yielded ambipolar behavior with both electron and hole accumulation mode. Compared to the devices with CYTOP, these PFETs exhibited a larger ON/OFF ratio of >104 in the linear region (VD = −10 V). However, the carrier mobilities were lower by one or two order(s) of magnitude than those of the PFETs with CYTOP. The extracted hole and electron mobility values were 0.048 and 0.002 cm2V−1s−1, respectively, for the PFETs using the PMMA dielectrics and were 0.003 and 2 × 10−4 cm2V−1s−1, respectively, for those using the high-k relaxor ferroelectric terpolymer. The origin of the difference is discussed in the following section. Temperature-Dependent Hole Transport through PDPPTPT Films. In order to investigate the charge transport in the channel of PDPPTPT films in contact with the different dielectric layers, temperature-dependent electrical measurements were carried out over a temperature (T) range of 160−
Figure 4. Temperature dependence of the transfer characteristics in the linear regime (VD = −10 V) and plots of the hole mobility vs gate voltage collected at different temperatures for PFETs with (a) low-k CYTOP, (b) PMMA polymer dielectrics, and (c) high-k relaxor ferroelectric P(VDF-TrFE-CTFE) dielectrics.
the extracted hole mobilities plotted as a function of gate voltage. For the temperature-dependent transport study, only the hole mobility was investigated thoroughly. This was because relatively large drain-to-gate leakage current was often observed, especially at the elevated temperature for the electron-accumulation mode. This prevented extracting the reliable temperature-dependent electron mobility data systematically. Irrespective of the types of the gate dielectrics, current levels of these PFETs were consistently larger at elevated temperatures, which indicates that the transport of hole carriers is thermally activated. Meanwhile, the gate voltage dependence of mobility for these PFETs was rather complicated. For the PFETs with CYTOP and PMMA (Figure 4a and 4b), mobility increased monotonically as VG increased negatively. For PFETs with P(VDF-TrFE-CTFE), on the other hand, the mobility increased initially but reached a maximum and then dropped as VG was increased negatively (Figure 4c). The reason for observing such a peaking behavior only from the P(VDF-TrFED
DOI: 10.1021/acsami.6b09993 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX
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ACS Applied Materials & Interfaces CTFE) dielectric but not from the other systems would be associated with the large number of charge carriers induced using the high-k dielectric. In fact, such a peaking behavior in the VG vs μ relation has been also observed from various organic systems under high carrier densities.5,22,23 The unusual negative correlation between μ and VG at high gate voltages can be understood from the reduced number of available charge transport states near the transport level under such a high carrier density condition. Because a large fraction of the transport states are already filled at these high VGS, the rates of carriers hopping from one site to another are reduced. Analysis on the Hole Transport through PDPPTPT Films Based on the Gaussian Disorder Model. To understand the influence of the contacting dielectric layer on the transport properties of the PDPPTPT films, the distribution of the density of states for the respective films could be extracted from the temperature-dependent mobility data based on GDM. The model considers the charge transport in disordered organic solids as sequential hopping processes through localized energy states distributed in a Gaussian function. Under small electric fields, the temperature-dependent mobility is approximated as follows14−16 ⎡ ⎛ T ⎞2 ⎤ 2σ μ = μo exp⎢ −⎜ o ⎟ ⎥ with To = 3kB ⎣ ⎝T ⎠ ⎦
(2)
Here, the μ0 is the mobility prefactor, σ is the disorder parameter corresponding to the width of the distribution of the available transport states, which would be influenced strongly by the polarization of the contacting dielectric layer, and kB is the Boltzmann constant. To extract the GDM parameters for the different PFETs, the measured mobility values at different VGs were plotted as a function of an inverse square of temperature (1/T2) (Figure 5). Note that the μ vs 1/T2 plots were formed at a wider range of gate bias between −40 and −10 V for the PFETs containing the CYTOP and the PMMA, whereas only a limited range of gate bias between −20 and −5 V was used for the PFETs based on the P(VDF-TrFE-CTFE) dielectric. This was because the mobility values for the PFETs with P(VDF-TrFE-CTFE) dielectric exhibited a negative mobility-gate voltage relation at VGs more negative than −20 V (as discussed above) and thus could not be applied to GDM. It was found that μ0 values, obtained from the y intercept of the plot, are larger for PDPPTPT films gated with low-k CYTOP (red) than the others (green or blue) and that these values are smaller for those gated with insulators with larger dielectric constant (Figure 6a). Considering the mathematical formula of GDM, the prefactor can be regarded as the mobility at extreme temperature and thus should reflect the genuine strength of the electronic coupling between the neighboring molecules. The results indicate that the molecular coupling in PDPPTPT films becomes weaker when the dielectric constant of the contacting layer becomes larger. We admit that polarization of the semiconductor/dielectric layer interface would not be the sole factor that determines the mobility prefactor. For example, any morphological difference on the PDPPTPT surface contacting with different dielectric layers will also change the μ0 values. Therefore, further investigation on the physical origin that yields different μ0 values should be made. It was also found that μ0 values vary with VG. Because VG determines the charge carrier density (p) of the semiconductor film in an FET (within the zeroth approximation, p = Ci (VG − VT)), the results reflect that the electronic coupling between
Figure 5. Plots of μ vs 1/T2 at different VGs for PFETs with (a) low-k CYTOP, (b) PMMA, and (c) high-k relaxor ferroelectric P(VDFTrFE-CTFE) dielectrics. Solid lines were fitted according to the GDM described by eq 2.
neighboring molecules is strengthened as more charge carriers are induced into the PDPPTPT. The dependence was most dramatic for films gated with low-k CYTOP gate dielectric, while that for films gated with high-k P(VDF-TrFE-CTFE) dielectric was rather weak. The extracted disorder parameters (σ) provided more important aspects for understanding the transport properties of PDPPTPT films. First, it was found that the σ values for the films gated with the P(VDF-TrFE-CTFE) dielectric (exhibiting the highest k among the series we examined) are larger than the films gated with other dielectrics with lower k (Figure 6b). The larger disorder parameters obtained from using the higher k dielectric confirm that the presence of more polarizable medium near the conduction channel widens the energetic disorder as reported previously.5 This is schematically drawn in the lower panel of Figure 6b; the DOS for PDPPTPT films in contact with higher k dielectric is distributed more widely. Second, it was found that the disorder parameter consistently decreased with increasing VG for all PFETs. The reduction of the disorder parameter at larger VGS can be understood as a consequence of filling of energy states. The gate-induced holes will occupy the energy states with lowest hole energy in the first place that lies on the far side of the tail of the distribution. With these states filled, the distribution of the remaining unoccupied states involved in charge transport, or the available transport states, would be narrowed. More interestingly, we noticed that the suppression of the disorder parameter was most dramatic for PDPPTPT polymer films in contact with P(VDF-TrFEE
DOI: 10.1021/acsami.6b09993 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX
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ACS Applied Materials & Interfaces
Figure 6. (a) Plots of μ0 vs accumulated charge density. Filled symbols are experimental values, and dashed lines are guides to the eye. (b) (Top) Plots of σ vs accumulated charge density. (Bottom) Illustration of Gaussian DOS for the dielectric/PDPPTPT channel interface with a high-k dielectric (blue) and a low-k dielectric (red) (c) Plots of μ240 (the field-effect mobility measured at 240 K) vs accumulated charge density.
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CONCLUSION The importance of selecting the optimal gate dielectrics for achieving high field-effect mobility for PDPPTPT films is emphasized. The merits of employing a high capacitive dielectric are undeniable in the sense that it allows one to operate the device at lower driving voltages and also to maximize the benefits of the trap-filling effect on charge transport at high carrier density conditions compared to their lower density conditions. However, the use of high-k dielectric for such a purpose would inevitably bring large disorder generated by the more polarized interface. Therefore, to achieve the highest carrier mobility from PDPPTPT FETs, one should employ a gate insulator with low dielectric constant. At the same time, to make the best out of the selected low-k dielectric materials, one should then try to induce as many carriers as possible by, for example, applying higher gate voltage or making the dielectric layer thinner.
CTFE) dielectric among the three, even the span of the gate voltage variation was lower (only 15 V for P(VDF-TrFECTFE) compared to 30 V for others). As shown in Figure 6b, we noticed that their rate of change for the σ values upon varying the charge density was more noticeable when using high-k dielectric. From the slope of the extrapolation (the solid line in the figure), it was expected that an order of magnitude change in charge density yields suppression of σ as large as 11.2 meV for PDPPTPT films in contact with the high-k terpolymer dielectric (blue), but the suppression was only 4.3 and 5.7 meV for PDPPTPT films in contact with the low-k CYTOP (red) and PMMA (green), respectively. Overall, the results show that both the mobility prefactor and the disorder parameter in GDM for PDPPTPT films are dependent both (i) on the type of the dielectric layer selected and (ii) on the charge carrier density induced by the gate dielectric. The mobility prefactor is larger and the disorder parameter is smaller for films gated with lower k dielectric. This reveals (i) that the molecular coupling is stronger when the transport energy states are distributed more coherently and (ii) that less thermal energy is necessary to overcome the less negative influence of disorder on charge transport. Attaining larger carrier density is also critical in determining the transport, as it can both (i) enhance the electronic coupling between molecules and (ii) suppress the disorder of the transport energy states. However, the impact of the carrier density on the charge transport in PDPPTPT is weaker than that of the polarizability of the contacting insulating layer. These results are given in Figure 6, summarizing the hole mobility of PDPPTPT films collected using different gate dielectrics at different charge density conditions. Despite the noticeable charge carrier dependence of the mobility for respective series of data obtained from the three dielectric layers, the mobility values for the PDPPTFT films were larger for those gated with insulators with lower dielectric constant.
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ASSOCIATED CONTENT
S Supporting Information *
The Supporting Information is available free of charge on the ACS Publications website at DOI: 10.1021/acsami.6b09993. Capacitance−voltage measurements on P(VDF-TrFECTFE) (PDF)
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AUTHOR INFORMATION
Corresponding Authors
*E-mail:
[email protected]. *E-mail:
[email protected]. Present Address ○
R&D Center, Samsung Display, Yongin-Si, Giheung-gu, Republic of Korea. Author Contributions ‡
J.L. and J.W.C.: These authors contributed equally.
F
DOI: 10.1021/acsami.6b09993 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX
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ACS Applied Materials & Interfaces Notes
(16) Bässler, H. Charge Transport in Disordered Organic Photoconductors a Monte Carlo Simulation Study. Phys. Status Solidi B 1993, 175, 15−56. (17) Zhang, Z.; Meng, Q.; Chung, T. C. M. Energy Storage Study of Ferroelectric Poly(vinylidene fluoride-trifluoroethylene-chlorotrifluoroethylene) Terpolymers. Polymer 2009, 50, 707−715. (18) Kang, M. S.; Frisbie, C. D. A Pedagogical Perspective on Ambipolar FETs. ChemPhysChem 2013, 14, 1547−1552. (19) Aiyar, A. R.; Hong, J.-I.; Nambiar, R.; Collard, D. M.; Reichmanis, E. Tunable Crystallinity in Regioregular Poly(3Hexylthiophene) Thin Films and Its Impact on Field Effect Mobility. Adv. Funct. Mater. 2011, 21, 2652−2659. (20) Zhang, X.; Bronstein, H.; Kronemeijer, A. J.; Smith, J.; Kim, Y.; Kline, R. J.; Richter, L. J.; Anthopoulos, T. D.; Sirringhaus, H.; Song, K.; Heeney, M.; Zhang, W.; McCulloch, I.; DeLongchamp, D. M. Molecular Origin of High Field-Effect Mobility in an Indacenodithiophene−benzothiadiazole Copolymer. Nat. Commun. 2013, 4, 2238. (21) Noriega, R.; Rivnay, J.; Vandewal, K.; Koch, F. P. V.; Stingelin, N.; Smith, P.; Toney, M. F.; Salleo, A. A General Relationship between Disorder, Aggregation and Charge Transport in Conjugated Polymers. Nat. Mater. 2013, 12, 1038. (22) Stassen, A. F.; de Boer, R. W. I.; Iosad, N. N.; Morpurgo, A. F. Influence of the Gate Dielectric on the Mobility of Rubrene Singlecrystal Field-Effect Transistors. Appl. Phys. Lett. 2004, 85, 3899. (23) Tripathi, A. K.; Smits, E. C. P.; Loth, M.; Anthony, J. E.; Gelinck, G. H. Charge Transport in Solution Processable Polycrystalline Dual-gate Organic Field Effect Transistors. Appl. Phys. Lett. 2011, 98, 202106.
The authors declare no competing financial interest.
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ACKNOWLEDGMENTS This research was supported by the Basic Science Research Program through the National Research Foundation (NRF) funded by the Ministry of Science, ICT & Future Planning of Korea (Code No. 2015R1C1A1A02037534) and partially supported by the Development of R&D Professionals on LED Convergence Lighting for Shipbuilding/Marine Plant and Marine Environments (Project No. N0001363) funded by the Ministry of Trade, Industry & Energy (MOTIE, Korea). J.W.C. also is thankful for financial support from the Global Leading Technology Program of the Office of Strategic R&D Planning (OSP) funded by the Ministry of Commerce, Industry and Energy, Korea (No. 10042537)
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DOI: 10.1021/acsami.6b09993 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX