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Inverse resistance change CrGeTe-based PCRAM enabling ultralow-energy amorphization Shogo Hatayama, Yuji Sutou, Satoshi Shindo, Yuta Saito, Yun-Heub Song, Daisuke Ando, and Junichi Koike ACS Appl. Mater. Interfaces, Just Accepted Manuscript • DOI: 10.1021/acsami.7b16755 • Publication Date (Web): 27 Dec 2017 Downloaded from http://pubs.acs.org on January 1, 2018

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ACS Applied Materials & Interfaces

Inverse resistance change Cr2Ge2Te6-based PCRAM enabling ultralow-energy amorphization Shogo Hatayama,1 Yuji Sutou,1* Satoshi Shindo,1 Yuta Saito,2 Yun-Heub Song,3 Daisuke Ando,1 and Junichi Koike1 1

Department of Materials Science, Graduate School of Engineering, Tohoku University, 6-6-11

Aoba-yama, Sendai 980-8579, Japan; 2Nanoelectronics Research Institute, National Institute of Advanced Industrial Science and Technology (AIST), Tsukuba Central 5, 1-1-1 Higashi, Tsukuba 305-8565, Japan; 3Department of Electronic Engineering, Hanyang University, 17 Haengdang-dong, Seongdong-gu, Seoul 133-791, Korea

Corresponding author: Y. Sutou ([email protected])

KEYWORDS phase-change random access memory, Cr-Ge-Te, amorphous, crystallization, contact resistivity

ACS Paragon Plus Environment

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Abstract Phase-change random access memory (PCRAM) has attracted much attention for nextgeneration non-volatile memory that can replace flash memory and be used for storage-class memory. Generally, PCRAM relies on the change in the electrical resistance of phase-change material between high-resistance amorphous (reset) and low-resistance crystalline (set) states. Herein, we present an inverse resistance change PCRAM with Cr2Ge2Te6 (CrGT) that shows a high-resistance crystalline reset state and a low-resistance amorphous set state. The inverse resistance change was found to be due to a drastic decrease in the carrier density upon crystallization, which causes a large increase in contact resistivity between CrGT and the electrode. The CrGT memory cell was demonstrated to show fast reversible resistance switching with much lower operating energy for amorphization than a Ge2Sb2Te5 memory cell. This low operating energy in CrGT should be due to a small programmed amorphous volume, which can be realized by a high-resistance crystalline matrix and dominant contact resistance. Simultaneously, CrGT can break the trade-off relationship between the crystallization temperature and operating speed.


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INTRODUCTION Phase-change random access memory (PCRAM) has attracted much attention as a promising candidate for next-generation non-volatile memory because of its low production cost and high scalability. The principle of PCRAM operation relies on the change in electrical resistance between amorphous and crystalline states in phase-change material (PCM). Generally, the amorphous state shows a state of high electrical resistance (reset state), whereas the crystalline state shows a state of low resistance (set state). The memory operation, i.e., phase transition, is carried out by Joule heating with an applied electrical pulse. Since PCRAM can realize large storage capacity and better endurance than flash memory and provide latencies comparable to dynamic random-access memory (DRAM), PCRAM is expected not only to replace flash memory but also to be used for storage-class memory that can mitigate the large difference of latencies between DRAM and flash memory.1,2 Ge-Sb-Te compounds (GST) such as Ge2Sb2Te5 and GeSb2Te4 are well known as PCMs for PCRAM application.3–7 Since the phase-change speed of GST is very fast, GST-based PCRAM shows a fast operating speed. Moreover, GST-based PCRAM has long endurance because GST is a compound-type PCM without phase separation during phase change. However, there are still a few concerns about GST for future PCRAM. The first is that the data retention reliability of GST at a high temperature is poor because of its low crystallization temperature, Tx, of about 150 ˚C.8 A GST memory cell has been reported to support data retention up to 10 years at 85 ˚C.9 This low thermal stability of amorphous GST makes it difficult to use GST-based PCRAM in high temperature environments, such as automotive applications. Furthermore, in future highly scaled PCRAM, thermal disturbance between neighboring cells should be more carefully considered because Joule heat for phase transition is conducted to nearby cells, which would


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cause unintentional phase change from an amorphous to a crystalline state. The second concern is that GST has a relatively high melting temperature, Tm, of about 600– 630 ˚C8 and, consequently, it needs high operating energy for the reset operation, i.e., amorphization. Moreover, the low resistance crystalline state of GST requires a high current to achieve Joule heating/melting for amorphization, which also leads to higher reset operating energy.10 Therefore, a next-generation PCM to replace GST must be developed to realize PCRAM with high temperature data retention and lower operating energy without the associated loss of fast operating speed and long endurance. There is also another topic that should be discussed in relation to the reliability of PCRAM. Generally, PCRAM is expected to show a resistance contrast of more than two orders of magnitude in order to ensure the reliability of data reading.11 It has been reported that in a nanoscaled PCRAM device, memory cell resistance is dominated by contact resistance between the PCM and the electrode material.12–14 Namely, the resistance contrast of PCRAM is determined by the contact resistance contrast between the PCM and the electrode, not the resistance contrast of the PCM itself.12–14 Therefore, PCRAM’s reliability for data reading should be discussed based on the contact resistance between the PCM and the electrode. Element doping is known to be an effective method of enhancing the thermal stability of the amorphous state of the PCM. For example, nitrogen and transition metals (TMs), such as Cr, Mo, Ti, Ni, Zn, and Cu, are good candidates for dopant elements to enhance the thermal stability of amorphous GST.15–21 These doping elements also increase the resistance of the crystalline state, which is deduced to contribute to the reduction of reset operating energy.18,22 Such an increment of resistance can be explained as being caused by grain refinement in the crystalline phase.


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However, the increase in resistance by grain refinement is generally limited to less than two orders of magnitude.18,19,22 We recently also demonstrated that the thermal stability of amorphous GeTe can be improved by doping with V, Cr, Ni, and Cu.23 However, excess doping causes phase separation upon crystallization because TM elements can easily form compounds with Te. Such phase separation deteriorates the repeatability and data reliability of PCRAM. Therefore, compound-type telluride PCM, including TM, is desirable for PCRAM. In the Cr-Ge-Te ternary system, it is known that there is a ternary compound, Cr2Ge2Te6 (CrGT), that has a rhombohedral ―

R3 symmetry.24 CrGT is a layered material, and Te atoms form a hexagonally closed packed structure with van der Waals gap. Cr atoms occupy 2/3 of octahedral sites formed by Te atoms, and the other octahedral sites are occupied by Ge-Ge dimers.24 CrGT is a semiconductor crystalline material with a bandgap of 0.74eV25 and should, thus, have a high resistance that can be expected to reduce the current for Joule heating/melting and contribute to lowering the operating energy needed for PCRAM operation.10 Most recently, we found that film with a composition similar to that of CrGT shows phase transition from a low electrical resistance amorphous phase to a high electrical resistance crystalline phase, although the resistance contrast of CrGT is only about one order of magnitude.26 This interesting feature of CrGT is expected to be favorable for PCRAM application in terms of operating energy; however, the mechanism of the resistance change and the phase transition behavior of CrGT by Joule heating are not yet clear. In this paper, we report the change of electrical conduction properties upon crystallization, amorphous thermal stability, and resistive switching behavior by Joule heating in CrGT film and propose an inverse resistance change CrGT-based PCRAM that can simultaneously achieve low operating energy, fast operating speed, high data retention, and sufficient resistance contrast.


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Resistance and calorimetric measurements along with microstructure observations showed that the CrGT amorphous state crystallizes at about 276 ˚C into a Cr2Ge2Te6 single phase with higher resistance than that of the amorphous state. We found that the CrGT shows a contrast of two orders of magnitude in contact resistivity between the CrGT and the W electrode upon phase change. We demonstrated that a CrGT memory cell shows less than one three-hundredth of operating energy for amorphization, as compared with a conventional Ge2Sb2Te5 memory cell. A CrGT memory cell with a high-resistance crystalline reset state enables ultralow-energy amorphization and, consequently, achieves more than an 85% reduction in total operating energy, as compared with a GST memory cell, despite its high crystallization temperature. In addition, CrGT was found to combine a faster operating speed (~ 30 ns) and a higher data retention property (10 years at 173 ˚C in an as-deposited amorphous state) than those of recently reported PCMs.

Results Phase-change behaviors of CrGT film. Figure 1a shows the temperature dependence of resistance during heating and cooling in as-deposited CrGT film. The resistance of the asdeposited CrGT film gradually decreases during heating and then starts to rapidly decrease from around 270 ˚C. Interestingly, the resistance conversely starts to increase from around 290 ˚C and then becomes almost constant by further heating up to 380 ˚C. In the CrGT film with a capping layer of SiO2 that was applied on the surface to prevent excessive oxidation and Te evaporation at a high temperature, it was also confirmed that the resistance gradually decreases monotonically with increasing temperature at over 380 ˚C, indicating semiconductor behavior


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(Figure S1). In the cooling process, resistance monotonically increases, indicating semiconductor behavior. Consequently, the resistance of CrGT film at room temperature after annealing up to 380 ˚C followed by cooling becomes higher than that of as-deposited CrGT film. The contrast in the resistance at room temperature between the as-deposited amorphous film and the crystalline film annealed at 380 ˚C is about one order of magnitude. It was also confirmed that the contrast in resistance is maintained even after annealing up to 450 ˚C. Figure 1b shows XRD patterns of as-deposited CrGT film and annealed CrGT films at various temperatures. The as-deposited CrGT film was confirmed to be amorphous. Bragg reflections are clearly seen in the XRD pattern of film annealed at over 290 ˚C. It was confirmed that the three reflection peaks are derived from 003, 006, and 0012 of a Cr2Ge2Te6 crystalline phase, which indicates that the c-axis of the crystalline phase is oriented almost perpendicular to the substrate surface. In addition, even at an annealing temperature of 380 ˚C, the reflection peaks are still seen to be broad, indicating crystalline grains are of a nano-sized order. It was estimated from the Scherrer formula27 that the grain size of the film annealed at 380 ˚C is around 12 nm. Furthermore, TEM observations indicated that the CrGT film still has an amorphous state when annealed at 270 ˚C, whereas when annealed at over 290 ˚C, crystallization to the Gr2Ge2Te6 phase takes place (Figure S2a to d). In the film annealed at 380 ˚C, the grain size was observed to be in the range of 10–20 nm (Figure S2d). This agrees well with the grain size estimated from the XRD result. Furthermore, it was also confirmed by in-situ XRD measurement that reflection peaks start to appear in a temperature range between 266 ˚C and 284 ˚C, indicating that the exothermic peak in the DSC curve corresponds to crystallization, and the crystalline film shows a strong c-axis orientation perpendicular to the substrate (Figure S3.)


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To clearly determine the crystallization temperature of the as-deposited CrGT film, DSC measurement was carried out at a heating rate of 10 ˚C/min. The inset of Figure 1a shows the DSC heating curve. An exothermic peak indicating crystallization is observed. The onset of crystallization is determined to be 270 ˚C, and the peak temperature is 276 ˚C, which can be defined as Tx, and the endset temperature of crystallization is 292 ˚C. The Tx of CrGT is much higher than that of GST (Tx=150 ˚C8). These results reveal that resistance starts to rapidly decrease due to the onset of crystallization and then, conversely, starts to increase after the endset of crystallization. It is noteworthy that the CrGT film shows a phase change from a lowresistance amorphous state to a high-resistance crystalline state. The resistance contrast in the CrGT film is the inverse of that of conventional PCMs. An inverse optical contrast, where the amorphous phase shows higher reflectance than the crystalline phase, has been observed in some PCMs, such as Ge-Sb,28 GaSb,29,30 FeTe,31 and Cu2GeTe3.32,33 An inverse resistance contrast has been reportedly observed in the high pressure-induced phase transition of GeSb2Te4.34 Moreover, an inverse resistance contrast upon the thermally induced phase transition has recently been confirmed in the FeTe compound and molybdenum carbamate nanosheets.35,36 However, the operation of those materials in a device showing an inverse resistance contrast has not been yet examined. We also determined the melting point, Tm, of CrGT by DSC measurement at a heating rate of 3 ˚C/min. It was found that the Tm of CrGT is 690 ˚C, which is only about 60 ˚C higher than that of GST. In addition, we evaluated the change in the film thickness of the CrGT, which is almost equal to the volume change upon crystallization between the as-deposited amorphous film and the crystalline film annealed at 380 ˚C (Supporting information, Supplementary Note 1). It was


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found that the change in film thickness between the as-deposited amorphous CrGT film and the crystalline CrGT film annealed at 380 ˚C is 0.4 %, which is much smaller than that observed in conventional GST.37 This result indicates that the CrGT film is significantly different from typical GST-based PCMs in terms of the bonding nature in both amorphous and crystalline phases.38 The nature of bonding in CrGT will be the subject of a future study.

Measurements of contact resistivity and electrical properties. We further found that CrGT shows a much larger contrast in contact resistance between CrGT and the W electrode. Figure 2a and b shows the contact resistivity, ρc, between CrGT and the W electrode at room temperature and the resistivity, ρ (red circles), as a function of the annealing temperature of CrGT, obtained by the circular transfer length method (CTLM) (Figure S4). The ρc and ρ show a similar temperature dependence. The ρc and ρ slightly drop after crystallization, whereas both ρc and ρ are found to drastically increase with a further increase of the annealing temperature of the CrGT film. The resistivity contrast between the as-deposited amorphous film and the crystalline film after annealing at 380 ˚C is seen to be about one order of magnitude, whereas the contact resistivity contrast achieves two orders of magnitude. As mentioned in the introduction, the memory cell’s resistance is dominated by the contact resistivity between the PCM and the electrode. Therefore, these results indicate that a PCRAM memory cell composed of CrGT and a W electrode should show sufficient resistance contrast of around two orders of magnitude. There are two possible causes of a large resistivity change with increasing temperature in the crystalline state, namely, the change of carrier mobility or the change of carrier density. It has


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been reported that, in a GeSb2Te4 crystalline state, disorder-induced localization is observed, and the resistivity decreases with increasing temperature because of the increase of carrier mobility, which is caused by the disappearance of disorder.39 Meanwhile, it has been reported that resistance in a GeTe crystalline film drastically increases prior to amorphization because of a reduction in carrier density caused by a decrease in Ge vacancies.40 It has also been demonstrated that Ge vacancies can be produced and disappear (absorbed by dislocations) with the application of a short-voltage pulse.40 These previous reports motivate us to investigate the electrical properties of the CrGT film. Figure 2b to d shows the resistivity, ρ (blue circles); carrier density, n; and carrier mobility, µ; at room temperature as a function of the annealing temperature of the CrGT film obtained by Hall effect measurements. As well as other chalcogenide PCMs,41 the CrGT film was determined to be p-types in all conditions. Figure 2b indicates that the ρ obtained by Hall effect measurements shows the same temperature dependence as that determined by the CTLM. The n of the asdeposited amorphous CrGT is 4.3 × 1020 cm-3, which is two or three orders of magnitude higher than that of amorphous GST (n=1017 - 1018 cm-3).42 Generally, it has been pointed out that the defect state in amorphous chalcogenide contributes to p-type conduction and the determination of transport properties.43 The n and µ show almost no change, even after annealing at temperatures below or equal to 290 ˚C, and then n drastically decreases and µ drastically increases after annealing at a temperature of over 290 ˚C. These Hall effect measurement results indicate that the increase of the resistivity in the CrGT crystalline film with increasing temperature is caused by a decrease in the carrier density. Ji et al. reported that the p-type conduction of crystalline Cr2Ge2Te6 is determined by Ge vacancies,25 suggesting that the reason for the decrement of the carrier density of the crystalline CrGT with increasing annealing


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temperature can possibly be attributed to the disappearance of excessive Ge vacancies, which would be introduced by the phase transition from amorphous to crystalline states.40 The decreased carrier density should also cause a drastic increase in the contact resistivity in the crystalline CrGT/W contact.44

Memory operating characteristics. In this study, the memory operating characteristics of CrGT memory cells was demonstrated by current (I)-voltage (V) and resistance (R)-V measurements, where W was used for the electrode material. Figure 3a shows a representative I-V characteristic obtained by voltage sweep measurements of the CrGT memory cells. Prior to the I-V measurement, an as-prepared CrGT memory cell with a high-resistance crystalline state of 1.1×105 Ω (crystalline state annealed at 380 ˚C) was switched to a low-resistance state of 1.4×103 Ω by the application of a voltage pulse of 2.2 V for 40 ns. Initially, the current increases with increasing sweep voltage and then drastically drops at around 0.45 V, indicating the phase transition of the CrGT from a low-resistance amorphous state to a high-resistance crystalline state. The high-resistance state is maintained even after the removal of voltage. It was found that the memory cell shows resistance switching from a low-resistance state of 8.6×102 Ω (at 0.1V) to a high-resistance state of 1.0×105 Ω (at 0.1V) by the application of voltage. Figure 3b shows representative R-V characteristics (set-reset operation) of the CrGT memory cells as a function of pulse voltage applied to the memory cell. As in the case of the I-V sweep measurement, an asprepared CrGT memory cell with a high-resistance state (crystalline state) was switched to a low-resistance state by the application of a voltage pulse before R-V measurements. In this experiment, the pulse widths of the applied voltage were set to be 30, 40, and 50 ns, and the applied setting pulse voltage was increased by steps of about 0.1 V. In the low applied voltage


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region, the CrGT memory cell shows a small resistance drop at around 0.6 to 0.9 V in all pulsewidth conditions. This may be due to the small contact resistance drop observed just after the crystallization of the amorphous CrGT. By further increasing the voltage, a drastic increase in resistance (reset operation) is observed at 1.6, 1.6, and 1.7 V for 30, 40, and 50 ns, respectively. Furthermore, a drop in resistance (set operation) to an initial low resistance occurs by the application of 2.3, 2.1, and 2.1 for 30, 40, and 50 ns, respectively. The resistance contrast of the CrGT memory cell is about two orders of magnitude, which is almost the same as the contact resistance contrast of the CrGT/W (Figure 2a). We also demonstrated the cyclic switching behavior of the CrGT memory cell by applying reset and set voltages of 1.5 V for 40 ns and 2.2 V for 40 ns, respectively; however, the cyclic endurance was limited to ten cycles at this stage (Figure S5). The long cyclic endurance property of the CrGT will be the subject of future study. In Figure 3b, the GST memory cell results are also shown for comparison, where the initial state of the GST layer in the memory cell was crystalline, and the GST memory cell was then switched to a high-resistance state by the application of a short reset pulse before the R-V measurement. The GST memory cell shows much higher voltages for set and reset operations, and the set-reset operation could be confirmed only in a pulse width of 50 ns in the applied voltage range below 10 V. The GST memory cell requires high set and reset voltages of 7.2 and 8.9 V, respectively. The total operating energy, Qt, for the memory switching operation between the low-resistance set state and the high-resistance reset state can be estimated by the following equation:45–48 Qt=Qreset + Qset=(Vreset2/Rset) × t + (Vset2/Rreset) × t

(1),

where Qreset and Qset are the operating energy for the reset and set operations, respectively, Vreset


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and Vset are the reset and set voltages, respectively, Rset and Rreset are memory cell resistances for set and reset states, respectively, and t is the operating-pulse width. In this study, Vreset and Vset are defined as the voltages indicated by a solid arrow and a dotted-line arrow, respectively, as shown in Figure 3b. The estimated operating energy in the CrGT and GST memory cells is summarized in Table 1. It is noteworthy that the operating energy for amorphization in the CrGT memory cell is less than one three-hundredth compared with that in the GST memory cell. Although the operating energy for crystallization is higher in the CrGT memory cell than in the GST memory cell, the total operating energy is still much lower in the CrGT memory cell than in the GST memory cell. For a pulse operating under 50 ns, the Qt of the CrGT memory cell is 137.3 pJ, whereas that of the GST memory cell is 922.0 pJ, where the estimated Qt for the GST memory cell is consistent with the reported values (~ three-digit number pJ).18,48 The Qt of the CrGT memory cell is about 85% lower than that of the GST memory cell. Furthermore, for a pulse operating under 30 ns, the Qt of the CrGT memory cell is estimated to be only 48.0 pJ, which is about 1/20 that of the GST memory cell for a pulse operating under 50 ns.

Thermal stability of amorphous CrGT. The activation energy for crystallization, Ea, of the asdeposited CrGT amorphous film was evaluated by DSC measurements at various heating rates based on the Kissinger method (Figure S6a).49 The Ea of the as-deposited CrGT amorphous film was estimated to be 3.43 ± 0.17 eV, which is much higher than that of the as-deposited GST amorphous film (~2.2 eV).8,50 Moreover, it was evaluated by the Ozawa method that the asdeposited CrGT amorphous film shows a 10-year lifetime at a maximum temperature of about 173 ˚C (Figure S6b).51,52 These results indicate that the as-deposited amorphous CrGT shows higher thermal stability than other PCMs and exhibits much better data-retention properties


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(Table S1). However, it has been reported that the thermal stability of the as-deposited amorphous state is not necessarily the same as that of the melt-quenched amorphous state, which is directly relevant for the data retention of the actual memory cell.53 In this study, we also evaluated the thermal stability of the melt-quenched amorphous state in the CrGT memory cell by isothermal resistance measurement at 238 ˚C (Figure S6c). In the case of the CrGT, resistance starts to increase with crystallization. In this experiment, the failure time was defined as the time when the resistance decreases by 10% of the initial value. As a result, the failure time of meltquenched amorphous state at 238 ˚C was estimated to be 44 minutes. This failure time is generally consistent with that estimated from as-deposited CrGT amorphous film (60 minutes). This indicates that the present CrGT shows an excellent data retention ability and can be used for automotive application (150 ˚C for 10 years).54

Discussion We have demonstrated that a CrGT memory cell shows a much lower operating energy for amorphization than does a GST memory cell. The operating energy for PCRAM should be influenced not only by the transition temperatures of PCM but also by the size of the programmable volume. The smaller programmable volume enables a lower operating energy. The operating energy for PCRAM is generally dominated by that for amorphization because the PCM must be heated above its melting point. As shown in Table 1, the operating energy for amorphization is significantly lower in the CrGT memory cell (2.6 pJ for 50 ns) than in the GST memory cell (901.8 pJ for 50 ns), although the melting point of CrGT is higher than that of GST. It is reported that a small contact area i.e., a small programmable volume, can contribute to a


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lower reset current, which achieves a lower operating energy.7,54,55 Previous literature strongly suggests that the low operating energy of the CrGT memory cell is due to its small programmable (amorphous) volume. In this study, we deduced the resistance change behavior for amorphization in the present memory cell as a function of amorphous volume based on experimentally obtained contact resistance between the PCM and the electrode and the simple percolation effect on electrical conductivity.56 In the calculation, a PCM part with a size of ϕ250 nm × L150 nm in the present memory cell was considered to understand the resistance change with increasing amorphous volume, as shown in Figure 4a. Here, amorphous volume was assumed to grow isotropically in a semicylindrical shape from the center on the electrode interface, gradually covering the interface of the bottom electrode with the progress of amorphous volume growth, as shown in Figure 4a.57 The total resistance, Rtotal, of the memory cell as a function of amorphous volume can be estimated from the following equation: Rtotal=RPCM + Rcontact + Relectrode

(2),

where RPCM indicates the resistance of the PCM layer, while Rcontact indicates the contact resistance of PCM/W at a certain amorphous volume. Relectrode can be ignored because of its very low resistivity. RPCM and Rcontact can be calculated from the resistivity, ρPCM(fA), as a function of the amorphous volume fraction, fA, and the contact resistivity, ρcontact(fA’), as a function of the contact area fraction covered by the amorphous volume, fA’. ρPCM(fA) and ρcontact(fA’) can be calculated based on the percolation effect using the following equations:56

= ∙ ∙

=

∙ ∙

+

(3),

(4),


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where and indicate the resistivity of amorphous volume and crystalline volume, respectively, and

!"!

and

!"!

indicate the contact resistivity of amorphous volume/W

and crystalline matrix/W, respectively. Here, # and #$ in equation (3) are expressed as follows: +

#$ = +

# =

(5),

(6).

Figure 4b shows the calculated normalized total resistance, Rtotal, with respect to the total resistance of the initial crystalline state (fA=0) as a function of fA’ in the CrGT (solid blue line) and GST (solid red line) memory cells. In addition, the normalized contact resistances, Rcontact, with respect to the contact resistance of the initial crystalline state (fA’=0) as a function of fA’ in the CrGT (dotted blue line) and GST (dotted red line) memory cells are shown in Figure 4b. Here, in this calculation, resistivity and contact resistivity values obtained by the CTLM were used, as listed in Table 2.14 In the case of the GST memory cell, the Rtotal curve is almost the same as the Rcontact curve, indicating that the memory cell’s resistance is fully dominated by the contact resistance between the PCM and the electrode because the crystalline matrix has a lowresistance state. In the case of the CrGT memory cell, the crystalline matrix has a high-resistance state that slightly influences the Rtotal in a large fA’ region; however, the Rcontact still dominates the Rtotal. It is seen that the Rtotal of the GST memory cell gradually increases with increasing fA’ and then drastically increases in the region of fA’>0.9. In this case, the PCM/electrode contact area must be almost fully covered by amorphous volume to obtain a large resistance contrast (Figure S7). On the other hand, the Rtotal of the CrGT memory cell drastically decreases in a small fA’ region, indicating that a large resistance contrast is obtained at a small fA’. Figure 4b indicates that a large resistance contrast of about two orders of magnitude can be obtained even at fA’=0.5


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in the CrGT memory cell. These calculation results strongly support that a low operating energy for amorphization in the CrGT memory cell can be achieved by a small programmable volume (Figure S7). Such a small programmable volume can be realized by a high-resistance crystalline matrix and dominant contact resistance. Meanwhile, the operating energy for crystallization is higher in the CrGT memory cell (134.7 pJ for 50 ns) than in the GST memory cell (20.2 pJ for 50 ns). This is apparently due to the much higher transition temperature needed to obtain a highresistance crystalline state (~ 380 ºC) in the amorphous CrGT than in the amorphous GST. However, since the operating energy for amorphization is largely reduced in the CrGT memory cell, the total operating energy of the CrGT memory cell is much smaller than that of the GST memory cell. CrGT-based PCRAM can achieve low operating energy and, simultaneously, shows much better data retention because of its high crystallization temperature and high operating speed. Generally, the operating speed of PCRAM is dominated by the crystallization speed of the PCM because it takes longer in the crystallization process than in the amorphization process. Therefore, as the crystallization temperature of the PCM increases, the operating speed of PCRAM becomes slow because it takes time to heat up the PCM by Joule heating. Such a tendency can be confirmed from the relationship between the crystallization temperature of the as-deposited amorphous state and the operating speed of various PCMs, as shown in Figure 5. There is a trade-off relationship between thermal stability and operating speed. For future PCRAM applications, operating speed is expected to be below at least 50 ns.65 Many PCMs show fast operating speeds below 50 ns, such as Ga2Te3Sb5,61 GST,3 Al1.3Sb3Te,62 GeTe,63 CuSb4Te2,64 and Ti0.32Sb2Te348; however, the crystallization temperature does not reach 250 ˚C (Figure 5). Meanwhile, the present CrGT exhibits a fast operating speed—as short as 30 ns—


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together with a high crystallization temperature in the as-deposited amorphous state. The obtained results indicate that the CrGT PCM can break the trade-off relationship between operating speed and data retention. The fast phase-change speed of the CrGT can possibly be attributed to the small programmable volume.

Conclusions In summary, the crystallization behavior and memory-switching characteristic of Cr2Ge2Te6 (CrGT) film were investigated. CrGT film showed a high crystallization temperature and not such a high melting point of 690 ˚C. It was noteworthy that CrGT exhibited a phase change from low-resistance amorphous to high-resistance crystalline states. This behavior is opposite that of conventional PCMs. The CrGT/W contact was found to show an increase of two orders of magnitude in contact resistivity upon crystallization. From Hall effect measurements, a high resistance of the crystalline state was found to be attributable to a drastic reduction of carrier density upon crystallization. From R-V measurements using a voltage pulse, the CrGT memory cell showed a much lower operating energy for amorphization. The calculated results on the resistance change as a function of the progress of programmable volume growth based on the obtained contact resistance and percolation effect on electrical conductivity indicated that such a low operating energy in the CrGT memory cell should be due to a small programmable volume (small amorphous volume), which can be realized by a high-resistance crystalline matrix and dominant contact resistance. Simultaneously, the CrGT memory cell exhibited a fast operating speed while maintaining a high thermal stability in the amorphous state. These results indicate that CrGT showing a phase transition from a low-resistance amorphous to a high-resistance


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crystalline state is a promising candidate for use as a PCM for PCRAM with combined low operating energy, high data retention, high thermal disturbance resistance, and fast operating speed.

EXPERIMENTAL DETAIL Preparation of CrGT films. CrGT thin films were deposited on a SiO2(100 nm)/Si substrate or a glass substrate (Corning, Eagle-XG) by RF magnetron co-sputtering of Ge, Cr, and Te pure metal targets. The base pressure of the chamber was below 6.0 × 10-5 Pa, and the composition of obtained films was confirmed to be Cr19.2Ge20.6Te60.2 by an energy dispersive X-ray spectroscopy (EDX) attached to a scanning transmission electron microscope (STEM) (JEOL, JEM2100), the STEM sample being prepared by mechanical polishing and ion milling (Gatan, PIPS). The thickness of films was controlled by sputtering time estimated by the sputtering rates of the targets. The sputtering rates of films were determined by measuring the thickness of films deposited for a given time. The thickness of films was confirmed by atomic force microscopy (AFM) (Keyence, VN-8000) at room temperature. For the AFM measurement, a part of the surface of the substrate was covered with a marker before film deposition. After deposition, the marker was removed by ethanol to obtain a step, and then the step (film thickness) was measured by AFM.

CrGT film characterization. The temperature dependence of the resistance in the as-deposited CrGT film with a thickness of 200 nm was measured with a two-point probe method in an Ar


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atmosphere at a heating rate of 10 ˚C/min in a temperature range up to 380 ˚C and cooled down to room temperature; the sample was heated and cooled while the temperature was simultaneously monitored with a thermocouple wafer. To determine the crystallization temperature and melting point of the as-deposited CrGT film deposited on SiO2 (100 nm)/Si substrate, differential scanning calorimetry (DSC) measurements were made at a heating rate of 10 ˚C/min and 3 ˚C/min, respectively (TA Instruments, Q20 for crystallization temperature and Q600 for melting point). To obtain clear heat flow peaks, in the DSC measurement, the film thickness was 2700 nm and 1000 nm for the crystallization temperature and melting point measurements, respectively. The crystallization kinetics for the asdeposited CrGT film was also investigated by non-isothermal DSC measurement at various heating rates of 10–50 ˚C/min, and the activation energy for crystallization was estimated using the Kissinger method.49 The crystal structure of CrGT films 200 nm thick deposited on a glass substrate was analyzed by X-ray diffraction (XRD) at room temperature and by in-situ XRD with a conventional 2θ/θ method with a Cu-Kα source (Rigaku, ULTIMA for XRD at room temperature and Smart Lab for in-situ XRD). In the XRD measurement at room temperature, the scan range was set to be 10 °–60 ° with a scanning step of 0.02 °. In the in-situ XRD measurement, the scan range was set to 20 °–60 °, and the temperature range was changed from 40 ˚C to 380 ˚C with a heating rate of 10 ˚C/min in an Ar atmosphere. For the XRD measurement at room temperature, the asdeposited films were heated to a predetermined temperature (150 ˚C, 270 ˚C, 290 ˚C, 350 ˚C, and 380 ˚C) at a heating rate of 10 ˚C/min in an Ar atmosphere and then cooled to room temperature. This process is called “annealing” in this paper. The microstructure of the annealed CrGT films was observed by transmission electron microscope (TEM) (JEOL, JEM2100).


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The electrical properties at room temperature were measured using a Hall effect measurement instrument (Toyo Corporation, ResiTest 8400) with the AC Hall effect measurement mode for the as-deposited and annealed films deposited on a glass substrate.

Contact resistivity measurements. The contact resistivity of the CrGT to the W electrode at room temperature was measured by the circular transfer length method (CTLM).13,14,68 Before fabricating a CTLM patterned sample, as-deposited CrGT films on SiO2(100 nm)/Si substrate were annealed at 150 ˚C, 270 ˚C, 290 ˚C, 350 ˚C, and 380 ˚C, as were films for the XRD measurement. A conventional photolithography technique was then employed to fabricate a CTLM pattern on the as-deposited and annealed CrGT films. A native oxide layer on the surface of the films was removed by reverse sputtering to a depth of more than 10 nm. Subsequently, a W electrode with a thickness of 200 nm was deposited by sputtering in the same chamber without breaking the vacuum. CTLM patterns with the W electrode were obtained by removing the photoresist layer. Finally, the entire surface of each obtained sample was etched by reverse sputtering to a depth of more than 10 nm to remove the native oxide layer and then coated with a carbon layer (a few nm) to prevent surface oxidation. The structure of the CTLM patterned sample is shown in supplementary Figure 2a and b. The total resistance between W electrodes was measured with the four-point terminal method with a semiconductor parameter analyzer (Agilent Technologies, 4155C). The method for calculating the contact resistivity of the CTLM is described in the Supporting Information (Supplementary Note 2 and Figure S4).13,14,68

Memory cell fabrication and electrical measurements. In addition to the above-mentioned


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experiments, a CrGT memory cell was fabricated using a conventional photolithography technique to investigate the electrical properties (Figure S8). A W layer (50 nm) was deposited on the SiO2(100 nm)/Si substrate as a bottom electrode with a photolithography process. After the deposition of the W bottom layer, another lithography pattern was made on the W layer, and then a SiO2 layer (100 nm) was deposited. After that, a contact hole with a diameter of 250 nm was fabricated using a focused ion beam (FIB) (JEOL, JIB-4600F). A CrGT layer with a thickness of 160 nm was deposited onto the contact hole. After removal of the photoresist layer, it was annealed to 380 ˚C, followed by cooling to room temperature. Before the deposition of a top electrode, the CrGT surface layer with a thickness of 10 nm was removed, and then a W layer with a thickness of 150 nm was deposited on the CrGT layer with a photolithography process. The current-voltage (I-V) and resistance-voltage (R-V) characteristics of the cell were measured using a semiconductor parameter analyzer (Keysight, B1500A). A short voltage pulse was generated using a pulse generator (Keysight, B1525A), with an output impedance of 50 Ω. The pulse voltage applied to the memory cell was checked with an oscilloscope (Agilent Technologies, DSO 3062A) (Figure S9). The errors of the amplitude and width of the applied pulse voltage were ± 0.02 V and ± 0.04 ns, respectively. For comparison, a GST memory cell was also fabricated using the same process; a Ge2Sb2Te5 alloy target was used to deposit the GST layer.


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(a)

(b)

106

2

2

2

0012 Cr Ge Te

270˚C

6

2

2 2

Exothermic

High Resistance

105

006 Cr Ge Te

003 Cr Ge Te

276˚C

Crystalline state 1.E+ 05

6

6

1.E+ 06

292˚C

380 ⁰C 250 250

104

1.E+ 04

270 290 270 290 Temperature (⁰C)

Intensity (a.u.)

Resistance (Ω)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60


310 310

Amorphous state Low Resistance

103

1.E+ 03

350 ⁰C 290 ⁰C 270 ⁰C

Tx

150 ⁰C

Heating Process Cooling Process

1020 0

as-depo.

1.E+ 02

100 100

200 300 200 300 Temperature (⁰C)

400 400

10 10

20 20

30 30

40 40 2θ (deg.)

50 50

60 60

Figure 1. (a) Temperature dependence of the resistance of a CrGT film with a thickness of 200 nm. (b) XRD patterns for an as-deposited CrGT film and annealed CrGT films at 150, 270, 290, 350, and 380 °C.


23


(c) Carrier density, n (cm-3)

1.E-02 1×10-2

1.E-03 1×10-3

1.E-04 1×10-4

1.E-05 1×10-5

0 0

(b)

100 200 300 100 200 300 Annealing temperature (⁰C)

400

5E+ 1919 5×10

5E+ 1818 5×10

5E+ 1717 5×10

400

CTLM Hall measurement (van der Pauw)

5×0.5 10-1

0

0

100 200 300 200 300 Annealing temperature (⁰C) 100

400

400

0


400

0


400

0

(d)

50 5×10

0.05 5× 10-2

5E+ 2020 5×10

Mobility, μ (cm2 V-1 s-1)

Contact resistivity, ρc (Ω cm2)

(a)

Resistivity, ρ (Ω cm)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60

Page 24 of 40

400

1.5 1.5

11

0.5 0.5

00

0

400

Figure 2. (a) Contact resistivity, ρc, (b) resistivity, ρ, (c) carrier density, n, and (d) mobility, µ, as a function of annealing temperature. Dashed lines indicate the crystallization temperature, Tx=276 ˚C. The data plots indicated by red and blue circles in (b) were obtained by the CTLM for CrGT/W samples and Hall effect measurements for CrGT/glass samples, respectively.


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(a)

×10-3 1.21.2E-03

Current (A)

1.01.0E-03 ×10-3 0.88.0E-04 ×10-3 0.66.0E-04 ×10-3 Amorphous

0.44.0E-04 ×10-3 8.6×102 Ω 0.22.0E-04 ×10-3

Crystalline 1.0×105 Ω

0 00

0.0E+ 00

(b)

0.2 0.2

0.4 0.6 0.4 0.6 Voltage (V)

0.8 0.8

11

1.E+ 066

10

Critical voltage for reset operation Critical voltage for set operation

1.E+ 055

reset state

10

Cell resistance (Ω)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60


1.E+ 044

10

set state

3 1.E+ 03

10

Read Voltage : 0.1 V

CrGT 30 ns CrGT 40 ns CrGT 50 ns GST 50 ns

2 1.E+ 02

10

00

1 1

22

33 4 66 55 7 4 7 Applied voltage (V)

88

9 9

10 10

Figure 3. (a) I - V characteristic of the CrGT memory cell. (b) R - V characteristics showing setreset operation for the CrGT (filled circles) and GST (open circles) memory cells, where read voltage was 0.1 V. Solid arrows indicate critical voltage for reset operation, and dashed arrows indicate critical voltage for set operation.


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Figure 4. (a) Schematic image of the present CrGT memory cells. The figure on the right shows a schematic cross-sectional view of the programming volume in contact with the bottom W electrode for the CrGT cell. In the CrGT layer, the light red-colored part indicates a crystalline matrix with high resistance, while the light blue-colored part is the programmable amorphous volume with low resistance. (b) Calculated normalized memory cell resistance as a function of fA’ for CrGT and GST memory cells, where fA’ indicates the contact area fraction covered by the amorphous volume.

The amorphous volume was assumed to grow isotopically in a

semicylindrical shape from the center on the bottom electrode interface, as shown in (a). The solid and dashed lines indicate changes of total resistance, Rtotal, and only contact resistance, Rcontact, respectively, for the CrGT (blue line) and GST (red line) memory cells.


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Fast operation speed 300 300

CrGT (This work) GaSb [58]

250 250

200 200

Ga2Te3Sb5 [61] Al1.3Sb3Te [62] CuSb4Te2 [64]

Sb44Te11Se45 [59] Si10.7Sb39.5Te49.8 [60]

GeTe [63] Ti0.32Sb2Te3 [48] 150 150

Better data retention

Crystallization temperature (⁰C)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60


GST [3,8]

100 100 00

10 10 20 20 30 30 40 40 50 50 60 60 70 70 80 80 90 90 100 100 110 110 Operation speed (ns)

Figure 5. Comparison of CrGT and other PCMs in terms of operating speed and crystallization temperature of as-deposited films. This figure indicates, generally, that PCMs with a high crystallization temperature need a longer operating pulse width. It has been reported that a superlattice GeTe-Sb2Te3 PCM called iPCM, which undergoes a crystal-crystal transition, shows a high operating speed (~50 ns)66 and high thermal stability up to about 300 ºC.67


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Table 1. Calculated operating energy of CrGT and GST memory cells under various pulse widths CrGT (30 ns)

CrGT (40 ns)

CrGT (50 ns)

GST (50 ns)

Qt (pJ)

48.0

73.2

137.3

922.0

Qset (pJ)

1.4

1.9

2.6

20.2 (crystallization)

Qreset (pJ)

46.6

71.3

134.7

901.8 (amorphization)

Table 2. Resistivity and contact resistivity for CrGT and GST to the W electrode. The values for GST were taken from reference 14.

PCM

ρA (Ω cm)

ρC (Ω cm)

CrGT

2.2×10-1

1.6

1.8×10-5

5.5×10-3

GST14

2.2×103

4.8×10-2

3.2×10-2

1.4×10-5

!"!

(Ω cm2)

!"!

(Ω cm2)


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ASSOCIATED CONTENT Supporting Information. The following files are available free of charge. TEM images, cyclic properties of a CrGT memory cell, schematic images of the amorphization process for CrGT and GST memory cells, experimental results of the thermal stability of CrGT film, details of CTLM measurements and the CTLM pattern, a schematic cross section of a memory cell, and a schematic description of a measurement system for set-reset operation (file type, PDF).

AUTHOR INFORMATION Corresponding Author Corresponding author: Yuji Sutou Contact address: Department of Materials Science, Graduate School of Engineering, Tohoku University, 6-6-11 Aoba-yama, Sendai 980-8579, Japan E-mail: [email protected]

Author Contributions The manuscript was written through the contributions of all authors. All authors have given approval to the final version of the manuscript.


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ACKNOWLEDGMENTS This work was supported by KAKENHI (Grant Nos. 15H04113 and 17J02967) and JSPS and KPFK under the Japan-Korea Basic Scientific Cooperation Program. This work was also supported by the Kato Foundation for Promotion of Science.


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