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Modulating the Functions of MoS/MoTe van der Waals Heterostructure via Thickness Variation Ngoc Thanh Duong, Juchan Lee, Seungho Bang, Chulho Park, Seong Chu Lim, and Mun Seok Jeong ACS Nano, Just Accepted Manuscript • DOI: 10.1021/acsnano.9b00014 • Publication Date (Web): 02 Apr 2019 Downloaded from http://pubs.acs.org on April 2, 2019

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is published by the American Chemical Society. 1155 Sixteenth Street N.W., Washington, DC 20036 Published by American Chemical Society. Copyright © American Chemical Society. However, no copyright claim is made to original U.S. Government works, or works produced by employees of any Commonwealth realm Crown government in the course of their duties.

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Modulating the Functions of MoS2/MoTe2 van der Waals Heterostructure via Thickness Variation Ngoc Thanh Duong†, Juchan Lee†, Seungho Bang†, ‡, Chulho Park†, Seong Chu Lim†,‡,*, and Mun Seok Jeong†,‡,* †Department

of Energy Science, Sungkyunkwan University (SKKU), Suwon 16419, Republic of Korea.

‡Center

for Integrated Nanostructure Physics, Institute for Basic Science (IBS), Suwon 16419, Republic of Korea.

*Corresponding

authors: [email protected] or [email protected]

KEYWORDS: transition metal dichalcogenides, multifunctional heterostructure, tunneling diode, van der Waals heterostructure, multi-valued logic ABSTRACT: Various functional devices including p-n forward, backward, and Zener diodes are realized with a van der Waals heterostructure which are composed of molybdenum disulfide (MoS2) and molybdenum ditelluride (MoTe2) by changing the thickness of the MoTe2 layer and common gate bias. In addition, the available negative differential transconductance of the heterostructure is utilized to fabricate a many-valued logic device that exhibits three different logic states (i.e., a ternary inverter). Furthermore, the multi-valued logic device can be transformed into a binary inverter using laser irradiation. This work provides a comprehensive understanding of the device fabrication and electronic-device design utilizing thickness control.

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The development of the integration capacity of silicon (Si) transistors is governed by the Moore’s law, i.e., the number of transistors in an integrated circuit doubles every 18 months. Expansion of Moore’s law has put an increasing demand on scaling down the lateral and vertical sizes of transistor channels and has challenged the Si-based technologies. During the development, recent atomically thin two-dimensional (2D) materials such as graphene, hexagonal boron nitride (hBN), and transition metal dichalcogenides (TMDs) provide an sustainable platform for building sub-microelectronics.1,2 The weak van der Waals (vdW) interaction between each individual layer of 2D materials facilitates the production of devices with a few atomic thick layers by mechanical exfoliation. Furthermore, the mobility and carrier concentration of 2D materials can be modulated by their thickness.3 To utilize the vdW heterostructures, the manual stacking method is generally used. It provides a building block for electronic and optoelectronic devices such as photodetectors,4,5 solar cells,6,7 field-effect transistors (FETs),8,9 and interband tunneling devices.9,10 In addition to scaling down the device size, miniaturization of the device structure causes a supplementary problem such as doping. At the nanoscale level, control of the doping concentration and site is an important issue. In the case of a Si device, the performance is predominantly dominated by doping, which changes the Fermi level, contact resistance, threshold voltage, and electrical conductivity. Fortunately, TMD exhibits thickness-modulated band structures. Depending on the layer thickness, the position of the Fermi level changes, which implies that the effect of doping in the TMD can be realized by controlling the number of layers.16,20 The functionality of TMD-based devices is extended by interleaving different TMD materials. This practice is widely implemented owing to the increased choice of channel material and layer-dependent electronic properties.6 Multifunctional devices from the heterostructures of 2D materials were first introduced by Mingqiang et al. in which black phosphorus (BP) and molybdenum disulfide (MoS2) vertical heterostructures were chosen.11 2 ACS Paragon Plus Environment

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Owing to the natural p-type character and the narrow band gap of BP, it becomes a potential candidate for creating p-n junctions in combination with n-type TMDs.12,13 However, the instability of BP in air is a significant obstacle for its industrial applications.14,15 Therefore, molybdenum ditelluride (MoTe2) is proposed as a promising alternative to BP as a p-type semiconducting material. Exhibiting a strong stability in air and acting as an organic solvent, few-layer (FL) and multi-layer (ML) MoTe2 stacked with MoS2 and SnSe2 were used in several applications such as Esaki diodes10 and tunneling FETs.9 Modulation of the function of these devices is made possible owing to the thickness-dependent mobility and carrier concentration of MoTe2. In the present study, we developed a vertical vdW heterostructure using bi-layer (2L) MoS2 and thickness-modulated MoTe2. The developed heterostructures present high-performance pn forward diodes, Zener diodes, backward diodes, transistors, and multi-valued logic that are made feasible owing to the layer thickness-dependent Fermi level and different band structures. The Kelvin probe force microscopy (KPFM) measurement confirmed that Ef of the MoTe2 layers varies as a function of thickness. The function of each fabricated device was determined by the MoTe2 thickness. The 2L MoS2/FL MoTe2 device can transform from a p-n forward diode into a Zener diode using the electrostatic gating effect. Moreover, the 2L MoS2/ML MoTe2 devices show a backward-diode characteristic with a rectification ratio of up to 103 at room temperature. We also developed a multi-valued inverter using 2L MoS2/FL MoTe2 that exhibits three truth states (ternary logics). The created ternary inverter can be tuned into a binary inverter through laser irradiation.

RESULTS AND DISCUSSION Vertical MoTe2/MoS2 vdW heterostructures were prepared on Si/SiO2 (300 nm) substrates using the transfer method, as schematically shown in Figure 1a. Palladium (30 nm) and titanium (30 nm) were evaporated onto the MoTe2 and MoS2 flakes to ensure effective 3 ACS Paragon Plus Environment

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electron and hole injection, respectively.10 Figure 1b shows an optical image of the device composed of 2L MoS2 and FL MoTe2 (three to five layers) in which the electrodes were designed using e-beam lithography. The corresponding atomic force microscopy (AFM) data are shown in Figure S1. The semiconducting 2H-phase MoS2 and MoTe2 were confirmed by Raman spectroscopy (NTMDT-NTEGRA Spectra) equipped with a 532-nm-wavelength laser. Figure 1c clearly shows the distinct peaks of A1g (385 cm−1) and E2g (402 cm−1) for 2H-MoS2 and A1g (186 cm−1) and E2g (231 cm−1) and B2g (288 cm−1) for 2H-MoTe2. The Raman spectra of the heterojunction area show all the peaks. The Raman mapping images of the E2g peak of MoTe2 (231 cm−1) and A1g peak of MoS2 (401 cm−1) are shown in Figure 1d and e. The crossjunction region between MoS2 and MoTe2 was defined by the reduced intensity of the Raman scattering. We carried out electrical characterization of our devices. We need to note that the MoS2 electrodes were grounded, the drain bias (Vds) was connected to MoTe2, and back-gate bias (Vgs) was applied to Si (Figure 1a). Figure 1f shows the Ids–Vgs characteristics measured between electrodes 1 and 2 (pristine MoTe2) and between electrodes 3 and 4 (pristine MoS2). The 2L MoS2 flake demonstrated n-type behavior with an on–off ratio of ~108, which is attributed to 2 2 the S vacancies in MoS2.16 Thus, we assumed that 𝐸𝑀𝑜𝑆 was located near 𝐸𝑀𝑜𝑆 . In contrast, the 𝐹 𝐶

FL MoTe2 channel exhibited p-dominant ambipolar behavior (with an on–off ratio of ~106). The lateral heterojunction FET (HFET) was characterized by electrode pair 2 and 4 in which both electrodes (patterned on MoS2 and MoTe2) were located far from the overlap region. The e-field of the Si common gate modulated the conduction of the whole device. The electrons departed from the source electrode on the pristine MoS2 channel, went through the MoS2/MoTe2 heterojunction and pristine MoTe2 channel, and finally reached the drain electrode. We analyzed the Ids–Vgs curve in four separate regions. Region I is in the voltage range of −60 V < Vgs < −50 V. The MoS2–FET was in a depletion mode, which exhibited high resistivity, and the 4 ACS Paragon Plus Environment

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Figure 1 (a) Schematic view of the MoS2/MoTe2 heterostructure prepared on a Si/SiO2 (300 nm) substrate. (b) Optical images of our device. The white dashed rectangle shows the Raman scanning area. (c) Raman spectra of pristine MoS2, MoTe2, and the MoS2/MoTe2 heterojunction. The excitation wavelength is 532 nm. (d), (e) Mode-selective Raman mapping images of MoTe2 (E2g) and MoS2 (A1g). Semilog Ids–Vgs curves of MoS2, MoTe2, and the heterostructure. hole carriers were captured in the MoTe2, which resulted in low Ids (~10 pA). For Vgs in the range from −50 V to −30 V, the MoS2 channel was in the subthreshold regime, and Ids gradually increased (region II) and reached a peak value at Vgs = −30 V. In region III (for Vgs > −30 V), the MoTe2–FET turned to the off-state, and Ids rapidly decreased, reaching a valley at Vgs = −5 V. The observed peak-to-valley current ratio (PVCR) was approximately 102. For Vgs > 0 V, the MoS2–FET and HFET were fully turned on, and Ids was dominated by the non-overlapped MoTe2 channel. In this region, the MoTe2 channel was turned to the inversion mode with the main carriers being the electrons, which resulted in the second turn-on of the HFET. The Ids (2– 4)–Vgs curves

with various Vds values are shown in Figure S2a.

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To determine the work function (Ф) of MoTe2 at various thicknesses, we performed KPFM measurements using a Pt-coated tip (Фtip = 4.92 eV).15,17 The work function of the sample (ФS) was extracted from the ΔVCPD values using the equation ФS = Фtip − ΔVCPD.15 The details of the KPFM measurements are shown in Figure S3. Figure 2a shows the AFM images with the thickness profiles of the MoTe2 flakes, which were composed of one ML region (8 nm) and one FL region (2.1 nm). The optical image of the device is shown in the inset in Figure 2a, where the white dashed line denotes the AFM scanning area. The surface potential image of the MoTe2 device is shown in Figure 2b. The surface potential varied with the MoTe2 thickness. In the

Figure 2. (a) AFM image of FL and ML MoTe2. The optical image and scanned area (white dashed rectangle) are shown in the inset. (b) KPFM image of MoTe2. The inset shows the surface potential profile of FL (two to three layers) and ML (> 10 layers) MoTe2 measured along the blue dashed line. (c) MoTe2 work function as function of the thickness. (d) Ids–Vgs characteristics of FL and ML MoTe2. 6 ACS Paragon Plus Environment

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inset, a ΔVCPD profile measured along the blue dashed line shows that a potential difference of up to 46 mV was sustained when the MoTe2 flake thickness varied from 8 to 2.1 nm. The variation in the surface potential could be ascribed to the increased carrier concentration in MoTe2, which shifted ФS. We fabricated additional MoTe2 samples with thicknesses that varied from 3 to 7.1 nm. The results from these samples are shown in the supporting information in Figure S4. Figure 2c shows the ФS values as a function of the MoTe2 thickness according to Figure 2b and S4. The electrical properties were confirmed from the Ids–Vds transfer curves of several FL and ML MoTe2 devices. In the FL MoTe2 devices, the Ids–Vds curves indicated ptype dominant ambipolar behavior (with an on–off ratio of ~106), whereas the ML MoTe2 samples exhibited a significant increase in the current level and lower gate dependence. The threshold voltage shifted toward higher Vgs values (with an on–off ratio of ~10), which indicated that ML MoTe2 is a highly p-type material. The huge difference in the current level of the FL and ML MoTe2 samples was attributed to the discrepancy in the doping level,18 and the band gap between FL and ML MoTe2 remained nearly unchanged.19 This behavior was caused by the external doping agents that appeared in the ML MoTe2 samples, e.g., charge impurities and gas adsorbates.20 Multifunctional Heterostructure Because of the variation in ϕMoTe2, we came up with the idea of controlling the p-n diode performance using various MoTe2 thicknesses. The global gate was used to realize different functions of the MoTe2/MoS2 p-n diode. The Ids–Vgs and gm–Vgs curves of the device are shown in Figure 3a, in which the 2L MoS2 flakes were stacked at the top of the FL (three to five layers) MoTe2 flakes, and the optical images are added in the inset. The thickness profile of these devices is shown in Figure S7b and S7c. Figure 3a shows that the Ids–Vgs characteristics display a similar performance with the device shown in Figure 1b. A significant Ids dip negative differential transconductance (NDT) was observed in the range of – 40 V < Vgs < – 10 V. The gm–Vgs curve shows a strong variation in transconductance 𝑔𝑚 = 𝑑𝐼𝑑𝑠/𝑑𝑉𝑔𝑠 from 0.7 to −0.6 7 ACS Paragon Plus Environment

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nS. The decrease in gm to a negative value corresponded to the Ids reduction from 10 nA to 100 pA (PVCR = 103). We also measured Ids–Vds characteristics of the device under different Vgs values. Since our device is fabricated using organic substrates for a dry transfer, we also conducted a dual back gate sweep in order to examine the hysteresis, which could be caused by the organic residue and functional chemical groups on SiO2. Figure S10 in supporting information exhibits a shift of NDT curve depending on the gate sweep direction. This indicates that our device is affected by organic and charge impurities. Nevertheless, the NDT behavior is clearly manifested in the devices. Figure 3b shows the contour map of log Ids of the 2L MoS2/FL MoTe2 device, which exhibited different types of diode operation depending on Vgs. The Ids– Vds curves of the device with different Vgs values, forward diode at Vgs = −40 V, and Zener diode at Vgs = 50 V are shown in Figure 3d marked by lines whose Ids–Vds can be observed with more

Figure 3. (a) Ids–Vgs and Gm–Vgs characteristics of 2L MoS2/FL MoTe2. The insets show the optical images of the devices where the scale bar is 3 µm. (b) Log Ids–Vds map versus Vgs of the device. (c) and (d) Ids–Vds characteristics of the 2L MoS2/FL MoTe2 heterostructure at Vgs = −40 and 50 V, respectively. The inset shows the semilog Ids–Vds curves. (e) and (f) Flatband alignment of 2L MoS2/FL MoTe2 describing the working mechanism of forward and Zener diode shown in Figure 3(c) and (d), respectively. details in Figure S5a. Figure S5b shows the rectification ratio, which is defined as the ratio 8 ACS Paragon Plus Environment

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|𝐼𝑟𝑒𝑣𝑒𝑟𝑠𝑒| |𝐼𝑓𝑜𝑟𝑤𝑎𝑟𝑑|

as a function of Vgs. Figure S5b shows that the ratio varies according to 0.2
0) in Figure 4d, since a large band offset 10 ACS Paragon Plus Environment

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is already established, the SBH may not affect the forward current. However, in Figure 4d, the backward current (Vds < 0) is expected to be more subject to the change due to the SBH. Another diode behavior was observed at different Vgs values, as shown in Figure 3b. At Vgs = 50 V, Zener tunneling occurred whose Ids–Vds curve is shown in Figure 3d. At Vgs = 50 V, reverse bias Vds < 0 V causes a current attributed to the minority carrier, i.e., Ids (shown in Figure 3d) gradually increased with the reverse bias. The corresponding band diagram of the Zener 2 diode shown in Figure 3d can be seen in Figure 3f. At Vds = 0 V, the energy gap between 𝐸𝑀𝑜𝑆 𝐶 2 and 𝐸𝑀𝑜𝑇𝑒 is expected to be smaller than that in Figure 3e, and these gaps were expected to 𝑉

overlap soon when Vds < 0 V, resulting in the injection of electron carrier, which is a minority carrier in MoTe2, to MoS2. Because MoS2 was electrically connected to the source electrode while MoTe2 was indirectly shorted to the source electrode, the gate-coupling efficiency between MoS2 and 2 MoTe2 should be different, which may result in a smaller effective band gap between 𝐸𝑀𝑜𝑆 and 𝐶 2 at Vgs = 50 V and contribute to band-to-band tunneling in the reverse bias. However, 𝐸𝑀𝑜𝑇𝑒 𝑉

when forward bias Vds > 0 V was applied, the thermionic emission from MoS2 to MoTe2 was promoted over the built-in potential at the MoS2 and MoTe2 junction, which can be expressed as 𝐼 = 𝐼𝑠[exp

( ) ― 1], where I 𝑞𝑉𝑑𝑠

𝑛𝑘𝐵𝑇

s

is the saturation current, Vds is the applied source–drain

voltage, q is the electrical charge, n is the ideality factor, and kB is the Boltzmann’s constant. Figure 4a shows that the Ids–Vgs curve of the 2L MoS2/ML MoTe2 (the optical image is shown in the inset) heterojunction shows n-type behavior. The Ids–Vgs curve in Figure 4a shows a bump, which is attributed to the different degrees of gate modulation in our 2L MoS2 and ML MoTe2 heterostructures. The Ids contour map of Vds–Vgs of the heterostructure shown in Figure 4b exhibits a higher current flow at Vds < 0 volt compared with the forward current at Vds > 0 volt. The dominance of the reverse current over the forward current was persistent in the entire Vgs range, although the rectification ratio gradually decreased with increasing Vgs. The rectification 11 ACS Paragon Plus Environment

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ratio varied from 102 at Vgs = −50 V to 20 at Vgs = 50 V, as shown in Figure S5d. One of the backward-diode behavior obtained at Vgs = −40 V is shown in Figure 4c, which displays a negligible current flow under a forward bias, whereas the current sharply increased as the reverse bias increased. Such Ids–Vds characteristics were induced by the different band structures between 2L MoS2 and ML MoTe2. Under the same Vgs = −40 V, the observed distinction between 2L MoS2/FL MoTe2 and 2L MoS2/ML MoTe2 originated from the different band structure of ML MoTe2 compared with that of FL MoTe2. We expected that ML MoTe2 was strongly doped with hole carriers and the Fermi level might be located near or inside the valence band, which contributed to the reduction in the effective band gap between 2L MoS2 and ML MoTe2 under a reverse bias and in turn presumably enhanced the tunneling of electron carriers from the valence band of MoS2 to the conduction band of MoTe2. Tunneling probability Tt is expressed as 𝑇𝑡~exp ( ―

4𝑎 2𝑚 ∗ 𝑞∆𝐸𝑔 3ℏ

), where m* is the effective mass of electron, a is the

depletion width, and ∆𝐸𝑔 is the effective band gap. In contrast to the reverse bias, under a forward bias, the current flow through the thermionic emission was suppressed owing to the increased energy difference at the conduction-band edge between 2L MoS2 and ML MoTe2, as shown in Figure 4d. At the end of this process, we characterized a device by increasing the MoS2 thickness.

Figure 5. (a) Ids–Vgs and Gm–Vgs characteristics of the ML MoS2/ML MoTe2 heterostructures. (b) Log Ids–Vds map versus Vgs. Rectification ratio versus Vgs. Another device composed of ML MoS2/ML MoTe2 was prepared. The optical image is shown 12 ACS Paragon Plus Environment

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in the inset in Figure 5a. The thickness profiles of these devices are shown in Figure S9 with a 7- nm (10 nm) thickness of MoS2 (MoTe2). In multilayers, a narrow band gap, 1.2 eV, is observed from MoS2 and Fermi level locates 15 ~ 25 meV below the conduction band minimum, implying a n-type semiconductor at room temperature.25-27 In contrast to MoS2, MoTe2 is a nearly degenerate semiconductor with a band gap of 0.88 eV such that a weak gating effect is achieved. The band alignment after and before contact of ML-MoS2/ML-MoTe2 heterostructure are given in the Figure S11. In contrast to the two previous devices, the Ids–Vgs characteristics displayed no current peak but a saturation in the figure. We examined the Ids–Vds characteristics at various Vgs values. The contour map of log Ids from Vds–Vgs shown in Figure 5b shows a drastic variation in the diode operation. At – 50 V < Vgs < – 20 V, we can see non-saturated Ids in the reverse bias, which is higher than that in the forward bias and implies backward diode behavior, as shown in Figure S6. However, at – 10 < Vgs < 50 V, reversed Ids started to saturate, whereas in the forward direction, Ids exhibited a dramatic increase due to the domination of majority-carrier drift current. Interestingly, our heterostructure can be tuned between a forward and backward diode by Vgs, as shown in Figure S6. The tunneling current and thermionic emission are also marked in the graph. Figure 5c shows a dramatic change in the rectification ratio from ~103 to 0.1 under various Vgs values. A multifunctional property was achieved through common gate modulation utilizing the thermionic-emission and tunneling processes, which benefited from the atomically thin 2D semiconducting material. Thus, the similar properties were difficult to observe in the bulk material. Ternary Inverter Many-valued logic (MVL) devices, which have more than three different logic states, are expected to provide higher efficiency than binary logic devices.11,17 MVL devices can help reduce the interconnection density and the number of transistors in logic circuits. For example, to create a ternary logic circuit, more than nine single transistors are used.17 Therefore, we fabricated a ternary inverter composed of 2L MoS2 and FL MoTe2. Figure 3a shows that the 13 ACS Paragon Plus Environment

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Ids–Vds transfer curve of the heterostructure exhibited a strong NDT and a large PVCR of approximately 103. Hence, the 2L MoS2/FL MoTe2 heterostructure is a promising structure for MVL devices.13 Figure 6a shows the device schematics, a series-connected FET composed of MoS2/MoTe2 heterostructure, and a MoTe2 FET. In our device, VDD and VOUT were connected to the MoTe2 flakes. VIN was applied to the Si substrate, and VSS was connected to the MoS2 flakes that were grounded. The ternary inverter function shown in the Figure 6b was confirmed by observing three distinct logic states in the VIN–VOUT characteristics. The output voltage VOUT

Figure 6. (a) Schematics of the MoS2/MoTe2 MVL device. VIN–VOUT characteristics of ternary inverter with various VDD values from 4 to 20 V. The inset shows the IN–OUT table of the ternary inverter. (c) Ids–Vgs of 2L MoS2/FL MoTe2 after and before the 405-nm-wavelength laser excitation. (d) VIN–VOUT characteristics and voltage gain of both ternary (before laser irradiation) and binary (after laser irradiation) inverters.

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between VOUT and VSS is a fraction of the applied voltage between VDD and VSS, which depends on the resistance ratio between MoTe2 and hetero FET. When VIN is – 60 V < VIN < – 40 V, MoS2 in hetero FET is OFF state, while MoTe2 FET is ON state. Therefore, most voltage drop along the channel occurs on hetero FET. In “logic 1” (for – 60 V < VIN < – 40 V), the VOUT value was close to the VDD value. Conversely, for VIN > 0 V, the MoTe2–FET was fully turned off, and a low-resistance path was created in the hetero-FET, which was gradually turned on, as shown in Figure 1f. The VOUT value was close to the VSS (GND) value. Because of the presence of NDT in the hetero-FET at – 35 V < VIN < – 20 V (as discussed in the previous section about the MoTe2–FET), both FETs possessed a middle resistance region in this VIN range, which are clearly distinguishable. Thus, a middle logic state (logic 1/2) was achieved with the VOUT values roughly equal to VDD/2. As VIN sweeps from -60 V to +60 V, the resistance ratio between MoTe2 and hetero-FET changes, so does the voltage drop on each device. This is how three logic states is materialized. The high sensitivity to light of 2D semiconducting materials has been demonstrated in several works that addressed optoelectronics devices.21 In the present study, we introduced an inverter whose operation can be transformed from ternary to binary using simple laser irradiation. A 405-nm-wavelength laser was used for the excitation. Figure 6c shows the Ids–Vgs characteristics of the MoS2/MoTe2 heterostructures with and without laser excitation. The Ids peak disappeared after the laser irradiation, and a steep Ids slope was obtained in the range of –60 V < Vgs < – 20 V, which is due to the photocurrent mostly from MoS2 in hetero-FET that is in off state.22,7 The VIN–VOUT and gain–VIN characteristics of the ternary device in the dark and excitation states are shown in Figure 6d. At VDD = 26 V, three distinct logic states of the ternary inverter were clearly exhibited, and the gain (= dVOUT/dVIN) versus VIN curve showed two distinguished peaks. The available different logic states of the device depend on the light intensity. Using the light, the number of different logic values is controlled from three to two in Figure 6d. When the device is illuminated by a laser, the resistance of the device changes. Under −60 V < Vgs < −50, 15 ACS Paragon Plus Environment

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corresponding to the “logic 1” state, MoS2 channel is on the depletion mode. However, with the light illumination, the generated excess carrier will increase photoconductivity in not only MoTe2, but also MoS2. In a case of MoTe2 FET, since it is already on state, the yield of excess carriers would not affect to the channel conductance significantly. However, MoS2 in hetero FET is off state. The existence of excess carrier significantly reduces the channel resistance of MoS2. As shown in Figure 6c, the more photocurrent is probed when Vgs = −60V that other Vgs. Therefore, the reduction of voltage drop in the part of the channel takes place. Hence, with the light, VOUT is smaller than without it, as seen in Figure 6d. In the figure, the light power was adjusted so that the photoconductance of hetero FET became comparable to that of “logic 1/2” state. As increasing the incident light power, the VOUT will continue to go down, but two different logic states, logic 1/2 and logic 0, will be displayed from the device until the optical conductance of both FETs is comparable. However, with an even weaker light intensity shown in Figure 6d, three logic states are available. This indicates that the VOUT of our device can be used as means for reading the incident light power. The gain value in an inverter is strongly affected by the switching speed of each component FET. Thanks to using the large specific capacitance of high k-dielectric material, HfO2, the reported FETs show a significant increase in subthreshold swing and switching speed,21,16 leading to a higher value of voltage gain in the inverter.11

CONCLUSIONS We have demonstrated a multifunctional diode structure based on MoS2/MoTe2 heterostructures with varying MoTe2 thickness and gate bias. The directional rectification in the constructed devices was controlled by optimizing the effective band gap between MoS2 and MoTe2. The conductance of the forward rectifying diode was described by the thermionicemission model, whereas those of the Zener and backward diodes resulted from the heterointerband tunneling. Since the work function of the materials varies upon on the thickness, it is 16 ACS Paragon Plus Environment

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difficult to give a decisive thickness of the TMDs with a specific device function. However, based on our results, we propose that the combination of 2L-MoS2 (~1.6 nm) and FL MoTe2 (~3.2 nm) is able to realize a series of functions such as forward p-n diode, Zener diode, HFET, ternary inverter and binary inverter. In addition, the hybrid structure of ML MoS2/ML MoTe2 device enable both backward and forward diode functions by applying appropriate common Si gate. Moreover, three stable states were observed in the VIN–VOUT characteristics of the inverter constructed based on the MoTe2–FET and hetero-FET. Furthermore, the inverter operating mode of the devices could be switched between binary and ternary by laser irradiation. Our work also significantly benefits the electronics research, which follows the Moore’s law and beyond.

METHODS Device Fabrication. The MoS2/MoTe2 heterotructure was prepapred on Si/SiO2 (300 nm) subtrate by using a dry transfer method. The MoTe2 flake was placed on Si/SiO2 substrates by mechanical exfoliation from a bulk material. Then, the MoS2 was exfoliated on a poly vinyl alcohol (PVA)/poly methyl methacrylate (PMMA) spin-coated Si/SiO2 substrate. After dissolving PVA in water, the MoS2 flake remaining on the PMMA was obtained by a metal holder with a circular hole, and then stacked on top of the MoTe2 flake. Device Characterization. The metal deposition was performed by Adaptive Co-Evaporation System (TERALEADER). The electrical properties of our device were characterized at high vacuum (~10-6) by Keithley-4200 SCS parameter analyzer in dark condition or under illumination of 405-nm-wavelength laser . Raman scattering measurements were carried out by NTEGRA Spectra (NT-MDT) with 532-nm-wavelength laser at room temperature. AFM and KPFM measurements were conducted by E-Sweep with NanoNavi Station probe controller.

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ACKNOWLEDGMENT This work was supported by the Institute for Basic Science (IBS-R011-D1) and by the National Research Foundation of Korea (NRF) grant funded by the government of Korea (MSIP) (2016R1A2B2015581). Supporting Information The Supporting Information is available free of charge on the ACS Publications website at http://pubs.acs.org. The Supporting Information includes Figure S1-S11 and the figure caption. AUTHOR INFORMATION Corresponding Author *E-mail: [email protected] *E-mail: [email protected] ORCID Mun Seok Jeong: 0000-0002-7019-8089 Seong Chu Lim: 000-0002-0751-1458 ASSOCIATED CONTENT The authors declare no competing financial interests. REFERENCES 1.

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