Organosilicon Polymers for Microlithographic Applications - Advances

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Downloaded by PURDUE UNIV on December 1, 2016 | http://pubs.acs.org Publication Date: May 5, 1989 | doi: 10.1021/ba-1990-0224.ch016

Organosilicon Polymers for Microlithographic Applications Elsa Reichmanis, Anthony E. Novembre, Regine G. Tarascon, Ann Shugard, and Larry F. Thompson AT&T Bell Laboratories, Murray Hill, NJ 07974

Organosilicon polymers play an increasingly important role in the electronics industry today. These polymers are useful in multilevel -deviceplanarization schemes, because they are soluble and may be readily spin coated to afford conformal, nominally planar surfaces for subsequent metal deposition. Lithographic applications include the use of silicon-containing resins for multilayer-resist processes. Trilevel schemes are simplified through the use of spin-on interme diate layers that act as barriers to oxygen reactive-ion etching (RIE). Alternatively, the coupling of the properties of the top imaging layer with those of the intermediate barrier material results in a bilevel scheme. The chemistry associated with these materials is outlined, and future needs are addressed.

P R O G R E S S I N I N T E G R A T E D - C I R C U I T devices has been made during the last 2 decades. The cost per function has decreased by over 3 orders of magnitude, with concomitant improvements in performance. This achievement has been accomplished primarily by increasing the scale of integration. For the past several decades, the number of components per chip has increased by a factor of 102-103 per decade, and this trend will continue, although perhaps at a slower rate (Figure 1). This increase in circuit density is made possible only by decreasing the minimum feature size on the chip. Figure 2 illustrates the decrease in min imum feature size as a function of time for dynamic random access memory (DRAM) devices. In 1975, the 4-kilobit DRAM (4 Χ 103 memory cells or about 8.2 Χ 103 transistors) had features in the 7-9-μηι range, and by 1987, ASTONISHING

0065-2393/90/0224-0265$06.00/0 © 1990 American Chemical Society

Zeigler and Fearon; Silicon-Based Polymer Science Advances in Chemistry; American Chemical Society: Washington, DC, 1989.

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9

PHYSICAL LIMIT

10

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107 Î0 COMPONENTS PER CHIP

6

10

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ANNOUNCEMENTS 1970

1980

1990

YEAR Figure 1. Number of components per chip as a function of time.

1-megabit DRAMS (1 Χ 106 memory cells and 2.4 Χ 106 transistors) with minimum features in the 0.8-1.0-μιη range were in production. The size of the chip has remained nearly constant and is between 0.5 and 1.0 cm 2 in total area. This phenomenal progress is a direct result of our ability to pattern complex thin film structures with increasing precision and ever-decreasing feature sizes. In addition to finer and more-precise structures, new materials with improved performance are also needed.

Figure 2. Minimum feature size as a function of time for DRAM devices.

Microlithography, including pattern formation and pattern transfer, is the technology in the overall manufacturing process that makes possible these improvements. Photolithography, which uses light in the 365-436-nm range, has been the dominant method for producing patterns for circuit applications. The technology has evolved over the past decades from simple



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REICHMANIS ET AL.

Organosilicon

Polymers for

Microlithography

1:1 contact printing, to proximity and 1:1 projection printing, and to the current method of 5 X - or 10 X -reduction step-and-repeat exposure. The basic resist systems have remained essentially the same; the positive photoresist composed of a novolac resin and a photoactive substituted diazonaphthoquinone dissolution inhibitor is the resist of choice. The current tools and resists will be able to print features as small as 0.5-0.7 μ ι η in a production environment. These systems are almost certainly the last gen eration of conventional-wavelength photolithographic systems. Alternatives for the next generation of lithographic systems include 248nm radiation, 5 X -reduction step-and-repeat systems, and electron beam (ebeam) or X-ray technologies. The 248-nm deep-UV option is most likely to become the next major technique. e-Beam and X-ray technologies will also be important in future lithographic strategies; however, when and to what extent they will be commercially significant is not well defined as yet. All future alternatives will require new resists and processes, and for the first time, manufacturing lines will be using at least two different resists. These new materials must have satisfactory sensitivity, resolution, and proc ess latitude. In addition, the deep-UV tools will have limited depth of focus (1-2 μπα) and will be useful only with relatively planar surfaces. Multilayerresist schemes have been proposed to overcome these limitations, and the simplest is the bilevel scheme that requires a resist that can be converted, after development, to a mask resistant to 0 2 reactive ion etching (RIE). Resistance to 0 2 RIE can be achieved by incorporating an element into the resist structure that easily forms a refractory oxide. Silicon performs this function very well and is relatively easy to include in a wide variety of polymer structures. In addition to new resists, future generations of devices will require improved dielectrics that can be deposited at low temperatures and provide process flexibility. Again, organosilicon polymers have promise for this ap plication. In this chapter, the chemistry and processes for both of these areas will be reviewed.

Device Applications Organosilicon polymers are becoming important in many aspects of device technology. Multilevel metallization schemes require the use of a thin di electric barrier between successive metal layers (I). Often, these dielectric materials are silicon oxides that are deposited by low-temperature or plasmaenhanced chemical vapor deposition (CVD) techniques. Although conformai in nature, C V D films used as intermetal dielectrics frequently result in defects that arise from the high aspect ratios of the metal lines and other device topographies (2). Several planarization schemes have been proposed to alleviate these problems, some of which involve the use of organosilicon polymers (2-4).



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SILICON-BASED POLYMER SCIENCE: A COMPREHENSIVE RESOURCE

Organosilicon polymers used in device applications must satisfy a num ber of criteria. The polymer must have dielectric characteristics similar to those of CVD-deposited materials, exhibit good adhesion to the substrate materials, be crack resistant, and be compatible with current processes. Materials that are useful in these applications are the spin-on-glasses (SOGs) (5). SOGs are organosilicon polymers obtained upon hydrolysis of diethoxyalkyl-, triethoxyalkyl-, and tetralkoxysilanes. The polymeric precursors are soluble in a variety of organic solvents and are readily spin coated to achieve smoothing and nominal planarization of device topography. Curing at ele vated temperatures leads to the formation of silicon dioxide or an Si02-like material. The material properties of SOGs depend upon the structure of the starting monomer. For instance, a change of substituent from methyl to phenyl on the siloxane precursor results in a change in the electrical char acteristics from good to unacceptable after a 425 ° C cure, whereas other properties are unaffected (5). The use of SOG materials for intermetal dielectric applications has sev eral advantages. A spin-on dielectric coating allows high throughput with low capital investment compared with alternative CVD-deposited materials, and process complexity is reduced. However, several material properties have to be improved before organosilicon polymers gain full acceptance by the electronics industry. Existing SOG materials are inadequate as "stand alone" dielectric layers because of the extensive cracking that occurs in thick (1-μιτι) films. Also, adhesion loss often occurs between an SOG layer and the resists and metals used in device manufacturing. Although novel proc essing techniques may alleviate these problems, the ultimate solution lies with the design of new materials.

Lithographic Applications The continuing trend toward more-complex devices with increasingly smaller feature sizes places severe demands on conventional single-layer resist proc esses. New lithographic technologies and processing techniques will be re quired to achieve the necessary improvements in resolution and line width control. The need to define smaller features, in turn, increases the effects of other problems associated with the particular lithographic strategy. For instance, standing-wave effects and reflections from the substrate surface can limit the resolution attainable with optical techniques. Alternatively, back-scattered electrons lead to proximity effects that affect line width control during e-beam exposure. These problems are intensified by the require ments of smaller features. A number of technologies that involve the use of organosilicon polymers or polymer precursors have been proposed to address these problems. Notable are the trilevel and bilevel lithographic techniques (Figure 3.) These multilayer schemes use a thick layer of organic polymer to nominally planarize the substrate and RIE image-transfer techniques.


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REICHMANIS ET AL.

Organosilicon Polymers for Microlithography

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Trilevel Schemes. Trilevel processing (6, 7) requires planarization of device topography with a thick layer of an organic polymer, such as polyimide or a positive photoresist that has been baked at elevated tem peratures ("hard baked") or otherwise treated to render it insoluble in most organic solvents. An intermediate RIE barrier, such as a silicon dioxide, is deposited, and finally, this structure is coated with the desired resist ma terial. A pattern is delineated in the top resist layer and subsequently trans ferred to the substrate by dry-etching techniques (Figure 3). Whereas several variations of this process have been reported, the most common schemes use silicon dioxide as the intermediate barrier layer. This layer is generally deposited by sputtering, plasma CVD, or spin coating of an organic Si0 2 precursor (SOG material) (8, 9). The chemistry of the siliconcontaining SOG materials is similar to that described in the previous section on device applications. Alternative SOG intermediate layers may be com posed of polysiloxanes (6), polymers that are highly resistant to processing by oxygen RIE. SOG layers greatly simplify trilevel processing through the elimination of expensive, low-pressure deposition steps and are thus attractive alter natives to sputtering and plasma CVD schemes. Unfortunately, these layers


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have higher defect densities compared with vapor-deposited films. However, proper storage and dispensing techniques can minimize this deficiency. Bilevel Schemes. Even though the advent of SOG materials has reduced the complexity of trilevel schemes, they remain time-consuming processes that require precise control of several steps in the patterning sequence. However, multilayer techniques do improve the resolution capability of conventional resists by allowing the patterning of a thin resist to be functionally separated from the anisotropic transfer of the image to the substrate. Consequently, a further simplification of trilevel processing would be desirable. One alternative involves the incorporation of the properties of the top resist layer with those of the oxygen-RIE-resistant intermediate layer into a single imaging material. Conventional processing allows pattern definition of this upper layer, and the pattern is then transferred to the substrate by oxygen RIE techniques (Figure 3). Organosilicon polymers are ideal candidates for use in these processes (10). Treatment of organometallic compounds, particularly organosilicon materials, with an oxygen discharge leads to the formation of the corresponding metal oxide. Taylor and Wolf (II) have shown that the incorporation of silicon into organic polymers renders the polymers resistant to erosion in oxygen plasmas. This resistance results from the formation of a protective coating of SiOx. on the polymer surface. Modeling studies predict that the thickness of this layer should be about 50 A, a value that has been confirmed by surface analysis (12, 13). Knowledge that a protective layer of silicon dioxide is formed on the surface of these materials has led to considerable work in designing new polymers that incorporate silicon into the polymer structure. However, several problems with silicon-containing polymers may interfere with their lithographic performance. A decrease in glass transition temperature (Tg) often accompanies the incorporation of silicon into a polymer and may cause dimensional instability of patterns during processing. In addition, most useful silicon substituents are hydrophobic in nature. This hydrophobicity is a potentially critical problem if the use of an aqueous developer is desired. Numerous silicon-containing resist systems have been prepared and used in multilevel RIE pattern-transfer processes. Chemistry. Thefirstorganosilicon polymers examined for use in bilevel RIE processes were the polysiloxanes (14, 15). These copolymers of dime thylsiloxane, methylphenylsiloxane, or methylvinylsiloxane are negative photo- and e-beam resists that exhibit erosion rates during oxygen RIE of 1-3 nm/min compared with —80 nm/min for hard-baked positive photoresist. Although high resolution has been achieved with these materials, the imaging layer must be kept thin to avoid problems associated with image creep that arises because of the low T (

Organosilicon Polymers for Microlithographic Applications - Advances

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