Self-Aligned Multichannel Graphene Nanoribbon Transistor Arrays

Aug 17, 2016 - We present a novel method for fabricating large-area field-effect transistors (FETs) based on densely packed multichannel graphene nano...
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Letter pubs.acs.org/NanoLett

Self-Aligned Multichannel Graphene Nanoribbon Transistor Arrays Fabricated at Wafer Scale Seong-Jun Jeong,*,† Sanghyun Jo,† Jooho Lee,‡ Kiyeon Yang,‡ Hyangsook Lee,‡ Chang-Seok Lee,† Heesoon Park,† and Seongjun Park*,† †

Device Laboratory and ‡Platform Technology Laboratory, Device & System Research Center, Samsung Advanced Institute of Technology, Suwon 16678, Republic of Korea S Supporting Information *

ABSTRACT: We present a novel method for fabricating large-area field-effect transistors (FETs) based on densely packed multichannel graphene nanoribbon (GNR) arrays using advanced direct self-assembly (DSA) nanolithography. The design of our strategy focused on the efficient integration of the FET channel and using fab-compatible processes such as thermal annealing and chemical vapor deposition. We achieved linearly stacked DSA nanopattern arrays with sub-10 nm halfpitch critical dimensions (CD) by controlling the thickness of topographic Au confinement patterns. Excellent roughness values (∼10% of CD) were obtained, demonstrating the feasibility of integrating sub-10 nm GNRs into commercial semiconductor processes. Based on this facile process, FETs with such densely packed multichannel GNR arrays were successfully fabricated on 6 in. silicon wafers. With these high-quality GNR arrays, we achieved FETs showing the highest performance reported to date (an on-to-off ratio larger than 102) for similar devices produced using conventional photolithography and block-copolymer lithography. KEYWORDS: Graphene nanoribbon, nanolithography, directed self-assembly, block copolymer, field-effect transistor

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for parallel line arrays or hexagonal/square dot arrays.24−45 To date, DSA nanolithography has been comprehensively investigated as a complementary technology to conventional photolithography with several benefits, such as molecularscale pattern precision, ultrafine line-edge roughness (LER) and line-width roughness (LWR), and low-cost processing. Hence, the realization of a fab-compatible process line for 300 mm size wafers using DSA technology is attracting tremendous attention worldwide.40 Here, we demonstrate a method allowing facile and effective large-area integration of field-effect transistors (FETs) based on densely packed multichannel GNR arrays using advanced DSA nanolithography. The design of our strategy includes: (i) topographic gold (Au) prepatterns on graphene that integrate BCP self-assembly and also provide source and drain electrodes directly in contact with the underlying graphene; (ii) thermal annealing, which is a fab-compatible process enabling spontaneous phase separation and formation of densely packed periodic arrays of cylindrical BCP nanodomains; and (iii) chemical vapor deposition (CVD)-grown graphene, which is suitable for large-scale device fabrication (see the uniformity test of graphene on 6 in. wafers in Figure S1).

arbon-based nanoelectronics have received a great deal of attention in the research field as one of the most promising alternatives for overcoming the fundamental limitations encountered by silicon-based nanoelectronics.1−11 In particular, sub-10 nm graphene nanoribbons (GNRs) have been extensively explored for use as high-speed transistor channels for a wide range of silicon-based nanoelectronics.12−19 Their high charge-carrier mobility and finite band gap enable a two-dimensional planar geometry with sufficient on-to-off ratio, which can be achieved by accurately controlling the placement of a GNR channel on the wafer. Despite these advantages, developing a fab-compatible process for producing complementary metal oxide semiconductors (CMOS) remains a fundamental challenge in achieving large-area production of high-performance GNR-incorporated nanoelectronics. Photolithography is an essential part of CMOS fabrication. With the design of CMOS technology being aggressively scaled down to sub-10 nm levels, diverse advanced nanopatterning technologies have emerged, including 193 nm immersion selfaligned quadruple patterning (193i SAQP), extreme ultraviolet (EUV) self-aligned double patterning (SADP), and directed self-assembly (DSA).20 Among these technologies, DSA can achieve laterally ordered, periodic arrays of self-assembled nanopatterns of block copolymers (BCPs) with a typical feature size in the 3∼50 nm region.21−23 The highly ordered selfassembled nanopatterns can be exploited for lithographic masks © XXXX American Chemical Society

Received: April 13, 2016 Revised: August 8, 2016

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Figure 1. (a) Schematic illustration of the process for integrating densely packed multichannel GNR arrays into a back-gated FET. (b) OM and SEM images of the individual and integrated multichannel GNR FETs fabricated on a 6 in. SiO2/Si wafer. (c,d) Self-aligned PDMS/GNR arrays between Au prepatterns of (c) ∼21 nm height and (d) ∼11 nm height.

MOCVD-grown graphene was transferred onto a highly doped 6 in. Si wafer covered with a 100 nm thick thermally grown SiO2 film. Then, topographic Au prepatterns (of 50 nm line (L) and 100 nm space (S); i.e., a L-to-S ratio of 1:2) for the selfassembly of BCPs were formed directly on the transferred graphene sheet through conventional photolithography processes. The patterns were also designed to ensure reliable contacts between the GNRs and source and drain electrodes. A cylinder-forming polystyrene-block-polydimethylsiloxane (PS-bPDMS; molecular weight of 16 kg/mol, f PS ≈ 0.69) BCP thin film was uniformly spin-coated on the topographic pattern and annealed at a high temperature (280 °C) for 3 min. This is a fab-compatible process with a considerably short patternformation time. Reactive ion etching (with CF4, followed by O2) was subsequently used to transfer the linearly stacked BCP nanopatterns into the underlying graphene sheet. Detailed

Using this nanofabrication process, we investigated the effect of the thickness of the topographic Au confinement patterns and the duration of sequential reactive ion etching (RIE) steps on the morphology of the BCP films and resulting GNR arrays. We carefully investigated the basic patterning requirements, such as CD(3σ), LER(3σ), and LWR(3σ), to verify the effectiveness of the nanolithography technique. In addition, the GNR morphologies were systematically characterized at the atomic level using high-resolution transmission electron microscopy (HRTEM) and Raman spectroscopy to determine the crystallographic orientations and structures. Finally, we studied the performance of our GNR-based FETs and compared the results with state-of-the-art devices presented in the literature.15,46−50 We fabricated densely packed multichannel GNR FET arrays as follows (see Figure 1a). To allow for large-area production, B

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Figure 2. High-magnification SEM images of the samples characterized for pattern uniformity of the densely stacked DSA nanopatterns. The samples were produced using different RIE conditions (a) CF4-RIE 8 s and O2-RIE 20 s, (b) CF4-RIE 8 s and O2-RIE 35 s, and (c) CF4-RIE 8 s and O2-RIE 37 s.

film due to the low surface energy of PDMS. O2-RIE steps of 20, 35, or 37 s were used to selectively remove the PS matrix and sufficiently reduce the remaining PDMS line patterns on the graphene sheet. The line pattern profiles of the remaining PDMS nanodomains were statistically analyzed using offline CD measurement software (Hitachi). To quantitatively evaluate the three patterning requirements CD(3σ), LER(3σ), and LWR(3σ), all SEM images were digitized at a pixel resolution of 0.264 nm/pixel for a precision of less than 0.5 nm. From the CD data summarized in Table 1, it can be seen that

fabrication steps are described in the Supporting Information. An optical microscopy (OM) image of individual and integrated multichannel GNR FETs fabricated on a 6 in. SiO2/Si wafer is shown along with a scanning electron microscopy (SEM) image of the surface (Figure 1b). In this work, the thicknesses of Au prepatterns were optimized to achieve spontaneous long-range lateral ordering and orientation control of the cylindrical nanodomains in PS-bPDMS BCP thin films. For example, the morphologies of 20 nm thick BCP thin films on 10 and 20 nm thick Au prepatterns are shown in panels c and d of Figure 1, respectively. In the case of the thicker (20 nm) topographic Au confinement, a morphology typical of graphoepitaxy was observed. The cylindrical nanodomains were well-aligned along the Au patterns. The sidewalls of the Au prepatterns were preferentially wetted by PS blocks, facilitating the alignment of neighboring cylindrical nanodomains along the Au walls (green box in Figure 1c). Meanwhile, when the thickness of the BCP thin film (20 nm) was larger than that of the Au prepatterns (10 nm), the BCP cylindrical nanodomains were oriented perpendicular to the Au prepatterns (green box in Figure 1d). This particular morphology evolution was similar to that expected for faceted surfaces, in which the entropic penalties of chain packing and the bending modulus of BCPs enable the orthogonal alignment of cylindrical nanodomains with the facet ridges.46 Interestingly, the results revealed that when conventional photolithography was used, the topographic prepatterns can also produce well-aligned cylindrical nanodomains in the orthogonal direction to the topographic prepatterns. Consequently, from this peculiar morphology, densely packed GNR channel arrays with 45 rows could be readily fabricated across the Au source and drain electrodes and be directly applied for preparing FET structures, as discussed later. Using this approach, the uniformity of the densely stacked DSA nanopatterns is crucial for the successful integration of sub 10 nm GNRs. In this regard, we quantitatively evaluated the orientation uniformity of DSA nanopatterns and the basic patterning requirements (CD(3σ), LER(3σ), and LWR(3σ)). Figure 2 shows high-magnification SEM images of the remaining PDMS nanopattern arrays across Au source and drain electrodes after RIE processing (sequential CF4 and O2 etching steps). Note that only a short CF4-RIE step of 8 s was required to remove the PDMS layer on top of the BCP thin

Table 1. Basic Patterning Parameters (CD(3σ), LER(3σ), and LWR(3σ)) Calculated from the Line Pattern Profiles of the Remaining PDMS Nanodomains O2-RIE time (s)

mean CD(3σ) (nm)

LWR (3σ) (nm)

LER (3σ) (nm)

20 35 37

8.96 7.95 7.56

0.61 0.82 0.89

0.58 0.82 0.72

with increasing O2-RIE processing time from 20 to 37 s, the 3σCD decreased from 8.96 to 7.56 nm, but the 3σ-LER and -LWR values increased negligibly from 0.61 to 0.89 nm and 0.58 to 0.72 nm, respectively. These roughness values are in contrast to those measured for samples produced using a solvent annealing system for the self-assembly of PS-b-PDMS BCP thin films on chemically modified surfaces.47,48 Our very low roughness values (∼10% of CD) are probably due to the self-assembly on the chemically inert graphene surface and the appropriate thermal annealing time at 280 °C, enabling the minimization of the interfacial energy and maximization of the chain conformational entropy with negligible thermal degradation. Figure S2 presents 2D orientation maps of the densely stacked DSA nanopatterns on a 6 in. wafer. Note that the DSA nanopatterns were randomly extracted from multiple device units, as shown in Figure S2a. The uniform false color orientation maps (Figure S2b) illustrate a high degree of alignment, in which the integral of the orientation distribution intensity yielded an orientation parameter S(3σ) of ∼0.92 for the 6 in. wafer. These results clearly reveal that our facile approach ensures reliable sub-10 nm GNR integration with superior pattern uniformity using a fab-compatible process. Atomic-level characterization of the fabricated GNR morphologies was performed by cross-sectional and top-view HRTEM observation to determine their CD and crystalloC

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Figure 3. (a) Schematic diagrams and (b,c) cross-sectional HRTEM images of a self-assembled PS-b-PDMS BCP film between Au prepatterns before and after RIE. (d,e) Top-view HRTEM images of densely packed GNR arrays and a GNR edge, respectively.

graphic orientation and structure (Figure 3). As illustrated in Figure 3a, we utilized a dual-beam focused ion beam (FIB) system to produce cross-sections of two samples (PS-b-PDMS/ graphene/SiO2 and GNRs/SiO2) between topographic Au prepatterns before and after RIE (under the etching condition that showed the narrowest DSA nanopatterns: 8 s CF4-RIE/37 s O2-RIE). As observed in the cross-sectional TEM image (Figure 3b), the self-assembled BCP thin film was a monolayer with a thickness of ∼20 nm, consisting of parallel PDMS cylinders in a PS matrix with a PDMS top layer, on a graphene sheet. The diameter of the PDMS cylinders was ∼8 nm, which is consistent with the results obtained from SEM imaging (Figure 2c). In addition, one of the GNRs on the SiO2 substrate (Figure 3c) had been etched away completely between the PDMS cylinders, while the graphene was preserved below the PDMS cylinders during RIE (see the inset in Figure 3c). We should note that in this work, a posttreatment using tetramethylammonium hydroxide (TMAH) solvent was carried out to remove PDMS residue on the GNRs. After PDMS removal, the width of the fabricated GNRs was ∼6

nm, which is slightly narrower than the PDMS line patterns, probably due to the gradual lateral etching of the underlying graphene sheet during O2 etching (see Figure 3d and Figure S3). Moreover, as shown in the high-magnification HRTEM image (Figure 3e), we observed rough edges on the GNRs, containing a mixture of zigzag and armchair edges. This is a typical morphology observed after lithographic etching and chemical methods, which contributes to carrier scattering. However, the edge with mixed features is metastable due to an energy penalty at the edge junctions.49 We believe that atomically smooth zigzag or armchair edges can be produced from defective rough edges by optimizing the RIE conditions,12 enabling an improvement in the electronic properties. We further characterized the GNRs using Raman spectroscopy. This technique has been widely used to characterize the layer thickness of unpatterned graphene sheets,50−53 electronic structure,50,53−56 and doping state57,58 as well to explore quantum confinement effects in GNRs.53,59 Figure 4a shows representative 2D band Raman spectra for unpatterned bulk graphene sheets and GNRs. It is now well-established that D

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Figure 4. Raman spectra and their characteristic features for unpatterned bulk graphene sheets and GNRs. (a) Left panel: 2D band spectra of graphene sheets and GNRs fit with a single Lorentzian function (blue line). Right panel: Rescaled 2D band of GNRs. (b) G-band and the defectinduced D- and D′-band spectra of unpatterned graphene and GNRs. (c) The integrated intensity ratio of D- and G-bands. (d) Position of G-band and (e) line widths of the G- and 2D-bands for unpatterned bulk graphene sheets and GNRs.

fitting the 2D band spectrum with a Lorentzian function is a reliable way to determine the thickness of both graphene sheets50−53 and GNRs.59 For our samples, irrespective of whether the graphene was laterally confined or not, the 2D bands could be fitted well with a single Lorentzian function (see the right panel in Figure 4a for a magnified view of the 2D band of the GNRs). This is consistent with the results of previous studies50,59 and confirms that the graphene was a single layer. However, there was a large difference between the intensities of the 2D bands of the graphene sheets and GNRs, indicating that the GNRs did indeed have an extremely narrow width. Because the intensity is proportional to the number of irradiated sp2bonded carbon atoms,53,60 it depends on the area of graphene illuminated by the laser spot. Because the laser had a diameter of 10 μm (much larger than the width of the GNRs in our study), a significant reduction in the 2D band intensity was observed for the graphene with a narrow width. In Figure 4b, the G-band spectrum, a characteristic feature of graphene from the optical E2g phonon in the zone center, is shown with the defect-induced D- and D′-bands. In the spectra of the graphene sheets, the G-band is predominant, and the two defect-induced bands are negligibly small. However, when the laser was illuminating the GNRs, the spectra exhibited distinct features, i.e., the intensity of the two defect-induced bands became comparable or even larger than the characteristic G-band. This was attributed to the edges of the graphene (in which translational symmetry was broken) acting as defects. The increased contribution from the edges of the GNRs enhanced the D- and D′-bands significantly.53,59,60 Indeed, as seen in Figure 4c, the integrated intensity ratio of the G- and D-bands (I(D)-to-I(G)), obtained by averaging data taken at eight different positions on the wafer, was much larger for GNRs than for unpatterned graphene sheets. Other key differences in the spectral features between graphene sheets and GNRs are presented in panels d and e of Figure 4, where data were obtained in the same way as for

Figure 4c. In Figure 4d, the positions of the G-bands are compared, and a slight blue shift (about 4 cm−1) was observed for the GNR samples. As indicated in a recent demonstration of Raman analysis of lithographically patterned GNRs,59 this shift can be attributed to the stiffening of the transverse G-mode in GNRs by the lateral confinement effect as well as to the binding of oxygen on the GNRs (probably during oxygen plasma etching). The confinement effect also produced a clear difference between the line widths (full-width-at-half-maximum (FWHM) of the spectra) of the G- and 2D-bands, as presented in Figure 4e. Compared with the Raman spectra of unpatterned graphene sheets, the spectra of the GNRs exhibited substantially increased line widths for both the G- and 2Dbands, mainly resulting from the relaxation of momentum conservation rule by the size-confinement in GNRs.59 All of the characteristic features of the Raman spectra shown in Figure 4 were in agreement with the literature53,59,60 and demonstrated that GNRs with significant lateral confinement were indeed formed well on the wafer scale. Having established the uniform formation of sub-10 nm GNR arrays on the wafer scale, we fabricated back-gated FETs based on GNR arrays (see Figure 5a for a schematic illustration). The electrical transport properties were characterized and compared with those of FETs fabricated with unpatterned bulk graphene sheets. To fabricate FETs, CVDgrown graphene sheets were transferred to a 6 in. Si/SiO2 wafer. Contacts (including guide patterns for DSA) were patterned on the graphene sheets using conventional lithography, followed by metal evaporation and lift-off. Because metal contacts on graphene sheets are better for charge injection into the FET channel than those on GNR arrays, we performed the DSA patterning and etching following the deposition of the metal contacts. The graphene sheets underneath the contacts remained intact during processing to later form GNRs, charge carriers from the metal electrode were still injected into the graphene sheet after forming GNR arrays E

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Figure 5. Transport properties of FETs based on unpatterned bulk graphene sheets and GNRs at ambient conditions. (a) Schematic illustration of the back-gated FETs structure used in this study. (b) Output characteristics (ISD as a function of VSD) measured at VG = 0 V for unpatterned graphene sheets and GNRs. (c) Highly nonlinear I−V characteristic of GNR FETs. (d) Transfer curve, ISD as a function of VG, for FETs based on GNRs and unpatterned bulk graphene sheets measured at VSD = 1 V and 20 mV. The histograms showing the statistical distribution of (e) on-to-off ratio and (f) field-effect mobility were obtained from 20 randomly selected GNR-FETs, where the average values of these two parameters were 95.0 (σ = 16.4) and 7.3 (σ = 3.3) cm2/(V s), respectively. The distribution of the on-to-off ratio (mobility) was fitted well by the Gaussian function with the center and the full-width-at-half-maximum (2σ) of 93.9 (6.8) and 28.0 (3.63), respectively.

(see Figure 5a). A highly p-doped Si and a 100 nm thick thermally grown SiO2 layer were used to apply a back-gate voltage (VG) to the device, as shown schematically in Figure 5a. Figure 5b shows representative current−voltage (I−V) characteristics of the FETs based on unpatterned graphene sheets (black curve) and GNRs (red curve), measured at VG = 0 V. When the graphene sheets were used as the conducting channel of the FETs, we observed typical metallic behavior. The measured current linearly increased with increasing sourcedrain bias (VSD) from −1 to 1 V, from which a sheet resistance of unpatterned graphene around 1.7 kΩ was calculated (signifying that the Fermi level of the graphene sheets is far from the Dirac point;61−63 see also Figure 5d and the related discussion). Next, we etched FET channels to produce sub-10 nm GNR arrays. The current measured in a similar range of VSD exhibited a substantial decrease of 7 orders of magnitude with a highly nonlinear I−V relationship (see Figure 5c), indicating the emergence of semiconducting behavior (or band gap widening) by the lateral confinement effect.15,17,64−68 The semiconducting behavior of the GNRs was also demonstrated by the behavior of the transfer curve (i.e., the source−drain current ISD as a function of the gate voltage VG) obtained at an ambient

temperature and pressure, as shown in Figure 5d. A high on-tooff ratio larger than 102 for the GNR FETs stands in sharp contrast to the variation in the current of only 50% over a similar range of VG for unpatterned graphene sheets. The on-tooff ratio obtained for our GNR-based FETs was at least 1 order of magnitude higher than values presented in the literature for FETs based on densely arranged GNRs, which is encouraging for future device applications.47,69 It should also be noted that the on-to-off ratio of our GNR FETs was underestimated; in the transfer curve, the current was still increasing monotonically with carrier density, and the Dirac point was not observed (due to the highly p-doped graphene; for more details see the discussion below) within the range of VG used here (limited by the dielectric breakdown). The highly p-doped state in our unpatterned graphene sheet resulted from the FeCl3 solution used to etch the Ni substrate and transfer the graphene. FeCl3 has been commonly used to isolate graphene from Ni substrates because it does not damage graphene (unlike strong-acid-based etchants such as HNO3).70 However, this solution is a well-known hole-dopant for graphene and has often been used for improving the conductivity of graphene when doped in sufficiently high concentrations (∼1014 cm−2).71,72 Likewise, in our study, the F

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Nano Letters treatment with FeCl3 resulted in hole-doped graphene, which moved the Dirac point out of the measurement range. We estimated that the doping level was about 5 × 1013 cm−2 (more details will be reported in a future publication). This also resulted in a relatively low field-effect mobility in our graphene (∼100 cm2/(V s)) because the conductivity of graphene in the high-carrier-density regime tends to be less-dependent on variations in the gate voltage (or carrier density) than in the low-density regime. In addition, we would like to note that the relatively low mobility does not arise from a degradation of the graphene. Finally, the statistical distribution of the on-to-off ratio and field-effect mobility obtained from 20 randomly selected GNRFETs located from the center to the edge of the wafer are presented in panels e and f of Figure 5, respectively. For these 20 devices, the majority exhibited an on-to-off ratio around 100 and a mobility close to 10 cm2/(V s), with the average values of the two parameters being 95.0 (standard deviation σ = 16.4) and 7.3 (σ = 3.3) cm2/(V s), respectively. Also, the distribution of the on-to-off ratio (mobility) was fitted well by the Gaussian function with the center and the FWHM (which corresponds to 2σ) of 93.9 (6.8) and 28.0 (3.63), virtually identical with the average values and standard deviations calculated from experimental data. This result is indeed encouraging for the application of GNR-based devices fabricated by our novel DSA approach. In summary, we accomplished a facile and effective route to fabricating field-effect transistors on 6 in. Si wafers based on densely packed graphene nanoribbon arrays formed by an advanced DSA nanopatterning technique on CVD-grown graphene. Densely packed DSA nanopattern arrays could be achieved by controlling the thickness of topographic Au confinement patterns, which were utilized as a template to generate sub-10 nm GNR assemblies. A systematic characterization of the morphology using SEM and HRTEM revealed that the densely packed GNR arrays were highly oriented with unprecedented uniformity (only 10% of CD), which was enabled by a fine control of the annealing conditions of the BCPs together with carefully designed Au prepatterning. Raman spectra of the GNRs unambiguously showed sizeconfinement effects such as stiffening of the G-band and broadened line widths of the G- and 2D-bands, as well as the emergence of the D- and D′-bands attributed to edge contributions. The electrical transport properties of the GNR FETs showed semiconducting behavior with an on-to-off ratio larger than 102 at ambient conditions. The characteristics of the GNR devices presented in this study created using fabcompatible methods are encouraging for various nanoelectronics applications based on graphene.

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a 6 in. SiO2/Si wafer, and a top-view HRTEM image of densely packed GNR arrays. (PDF)

AUTHOR INFORMATION

Corresponding Authors

*S.-J.J. e-mail: [email protected]. *S.P. e-mail: [email protected]. Author Contributions

S.-J.J. and S.J. contributed equally to this work. Notes

The authors declare no competing financial interest.

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ACKNOWLEDGMENTS The authors are grateful for the assistance provided by their colleagues at the Samsung Advanced Institute of Technology. The authors especially thank the Nano Fabrication Group for assistance with device fabrication.

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REFERENCES

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ASSOCIATED CONTENT

S Supporting Information *

The Supporting Information is available free of charge on the ACS Publications website at DOI: 10.1021/acs.nanolett.6b01542. Additional details on the synthesis and transfer of graphene, topographic Au prepattern preparation, directed assembly of PS-b-PDMS thin films, morphology and FET characterization, TEM characterization, and Raman characterizations. Figures showing the quality and uniformity of the transferred graphene, orientation uniformity of the densely stacked DSA nanopatterns on G

DOI: 10.1021/acs.nanolett.6b01542 Nano Lett. XXXX, XXX, XXX−XXX

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DOI: 10.1021/acs.nanolett.6b01542 Nano Lett. XXXX, XXX, XXX−XXX