Tunable Charge Injection via Solution-Processed Reduced Graphene

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Tunable Charge Injection via Solution-Processed Reduced Graphene Oxide Electrode for Vertical Schottky Barrier Transistors Young Jin Choi, Jong Su Kim, Joon Young Cho, Hwi Je Woo, Jee Hye Yang, Young Jae Song, Moon Sung Kang, Joong Tark Han, and Jeong Ho Cho Chem. Mater., Just Accepted Manuscript • DOI: 10.1021/acs.chemmater.7b03460 • Publication Date (Web): 04 Jan 2018 Downloaded from http://pubs.acs.org on January 4, 2018

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Chemistry of Materials

Tunable Charge Injection via Solution-Processed Reduced Graphene Oxide Electrode for Vertical Schottky Barrier Transistors Young Jin Choi,1† Jong Su Kim,1† Joon Young Cho,4 Hwi Je Woo,1 Jee Hye Yang,5 Young Jae Song,1,2 Moon Sung Kang,5 Joong Tark Han,4 Jeong Ho Cho1,3* 1

SKKU Advanced Institute of Nanotechnology (SAINT), 2Department of Physics, 3School of Chemical Engineering, Sungkyunkwan University, Suwon, 440−746, Korea 4 Nano Hybrid Technology Research Center, Korea Electrotechnology Research Institute (KERI), Changwon 642–120, Korea 5 Department of Chemical Engineering, Soongsil University, Seoul, 156-743, Korea. *Correspondence and requests for materials should be addressed to J. H. Cho ([email protected]) †

Y. J. Choi and J. S. Kim contributed equally this work.

Keywords: reduced graphene oxide, Schottky barrier, transistor, organic semiconductor, transport Abstract We demonstrate, for the first time, the use of a solution-processed reduced graphene oxide (rGO) layer as a work function tunable electrode in vertical Schottky barrier (SB) transistors. The rGO electrodes were deposited by simple spray-coating onto the substrate. The vertical device structure was formed by sandwiching a N,N′-dioctyl-3,4,9,10-perylenedicarboximide (PTCDI-C8) organic semiconductor between rGO and Al electrodes. By varying the voltage applied to the gate electrode, the work function of rGO and thus the SB formed at the rGO-PTCDI-C8 interface could be effectively modulated. The resulting vertical SB transistors based on rGO-PTCDI-C8 heterostructures exhibited excellent electrical properties including a maximum current density of 17.9 mA/cm2 and an on-off current ratio >103, which were comparable with the values obtained for the devices based on a CVD-grown graphene electrode. The charge injection properties of the vertical devices were systematically investigated through temperature-dependent transport measurements. Charge injection was dominated by thermionic emission at high temperature. As the temperature decreased, however, impurity state-assisted hopping occurred. At low temperature and negative gate voltage, the reduced width of barrier induced by a high drain voltage yielded Fowler-Nordheim (F-N) tunneling at the interface. The use of scalable solution-processed rGO as a work function tunable electrode in vertical SB transistors opens up new opportunities for realizing future large-area flexible 2D materialsbased electronic devices.

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INTRODUCTION Graphene, a carbon allotrope in the form of a two-dimensional (2D), atomic-scale hexagonal lattice, has attracted considerable attention for future electronics due to its unique electrical and mechanical properties. Recently, layered graphene/semiconductor heterostructures have been considered as interesting vertical device platforms.1-9 In such heterostructures, the linear energy dispersion of graphene near the Dirac point allows modulation of the work function.10-17 This capability has been cleverly harnessed to build a vertical transistor structure relying on the variation in the Schottky barrier (SB) height at the graphenesemiconductor junction in these heterostructures.18-21 In these vertical transistors, the electrical current can be readily modulated by tuning the SB height at the graphene-semiconductor junction. The verticallystacked geometry of the graphene-semiconductor-metal structure enabled the formation of an ultrashort channel (determined by the thickness of the organic semiconductor layer sandwiched between the source and drain electrodes), which can deliver a huge current density exceeding that of typical lateral transistors. This vertical device architecture also enables the fabrication of transistors with excellent mechanical robustness because vertical charge transport is relatively insensitive to in-plane cracks generated by lateral mechanical stress on the semiconductor films. In studies on these systems, a variety of semiconductors, including two-dimensional (2D) layered materials19,

22-23

, organic semiconductors (small molecules and

polymers)24-26, and inorganic indium-gallium-zinc-oxide (IGZO)27-28, have been introduced between the graphene layer and metallic electrode. All of the devices assessed to date have utilized single-layer graphene synthesized by thermal chemical vapor deposition (CVD) as a gate-tunable electrode. However, the conventional method for synthesizing CVD-grown graphene involves deposition of graphene onto Cu foil at a high temperature (>500 °C), after which complex processes are needed to transfer the graphene layer to the target substrate.29-31 Alternative low-cost, solution-processable gate-tunable electrode materials are required for practical device applications. In this manuscript we introduce, for the first time, solution-processed reduced graphene oxide (rGO)32-36 as a work function tunable electrode for vertical SB transistors. These rGO electrodes were deposited by a simple spray-coating procedure. Then, as an organic semiconductor layer, N,N′′-dioctyl3,4,9,10-perylenedicarboximide (PTCDI-C8) was thermally deposited onto the patterned rGO. The vertical channel was then formed by depositing metallic Al onto the PTCDI-C8 layer.37-38 In this system, the work function of the rGO, and hence the SB at the rGO-PTCDI-C8 interface, could be modulated effectively by varying the gate voltage. The resulting vertical SB transistors exhibited excellent device performance characteristics, including a maximum current density of 17.9 mA/cm2 and an on-off current ratio >103, which are comparable with those of the devices with a CVD-grown graphene electrode. Temperaturedependent transport measurements were conducted to investigate the charge injection properties of the vertical devices. The dominant mechanism of charge injection was thermionic emission at high temperature 2


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but it transitioned to impurity state-assisted hopping as the temperature decreased.23 Under conditions of low temperature and negative gate voltage, application of a high drain voltage yielded charge injection via Fowler-Nordheim (F-N) tunneling. The use of solution-processed rGO with work function tunability in vertical SB transistors opens up new opportunities for realizing large-area electronics based on flexible 2D materials.

RESULTS AND DISCUSSION Figure 1a shows a schematic diagram of the fabrication procedure for the vertical SB transistors based on rGO-PTCDI-C8 heterostructures. First, the rGO source electrodes were spray-coated through a shadow mask onto a 300 nm-thick SiO2/n++ Si substrate with Au contacts; the thickness of the rGO layer was approximately 6 nm. The upper right panel of Figure 1a shows an atomic force microscopy (AFM) image and cross-sectional height profile of a spray-coated rGO source electrode. The rGO surface was highly uniform and smooth with a root-mean-square (RMS) roughness of 0.61 nm. The quality of the rGO layer was confirmed by both x-ray photoemission spectroscopy (XPS) and Raman spectroscopy. The C1s XPS spectrum of rGO (Figure 1b) exhibited three components, at 284.6, 285.4, and 288.3 eV, arising from sp2 C, sp3 C, and C=O, respectively. The Raman spectrum of rGO (Figure 1c) exhibited a high I2D/IG intensity ratio of 0.7 and narrow full-width-at-half-maximum (FWHM) of the 2D peak of 55.9 cm-1, consistent with the formation of high-quality rGO films. The conductivity of the rGO electrodes was around 21,000 S/m. On top of the patterned rGO source electrodes, an n-type PTCDI-C8 organic semiconductor layer of thickness 120 nm was deposited through an organic molecular beam deposition (OMBD). The lower right panel of Figure 1a shows an AFM image and cross-sectional height profile of the PTCDI-C8 film deposited onto the rGO layer. Two-dimensional rod-like grains with a length of 200-300 nm were observed in the films. Finally, a 40 nm-thick Al drain electrode was deposited thermally on the PTCDI-C8 layer through the shadow mask. The cross-sectional schematic diagram and optical top-view image of the vertical SB transistors based on the rGO-PTCDI-C8 heterostructures are shown in Figure 1d and Figure S1, respectively. The overlapping channel area between the bottom rGO and top Al electrodes was 1600 µm2. The operation of SB transistors hinges on the tunability of the Fermi level (EF) of the source electrode, which modulates the injection of charge carriers. We therefore examined the variation of EF for the rGO electrode controlled by the gate voltage through separate Kelvin probe force microscopy (KPFM) experiments (Figure 1e). As illustrated schematically in the figure, the electric potential of the graphene surface was measured using KPFM while different voltages (-40, -20, 0, +20, and +40 V) were applied between the graphene and the gate electrode.39-40 Note that the upper surface of the graphene layer scanned by the KPFM tip becomes the interface at which the SB is formed with PTCDI-C8 in the actual device. Thus, the measurement indirectly revealed the height variation in the SB at the rGO-PTCDI-C8 junction. As shown 3



in the KPFM images, distinct offsets in the surface potential were observed for rGO under the various applied voltages. Histograms of the measured surface potential showed that the average surface potential (or work function) changed by ~0.13 eV as the voltage was swept from +40 to -40 V (Figure 1f), which was comparable with the potential change for a CVD-grown graphene electrode over the same gate voltage range (Figure S2). The comparable tunability of the work function for rGO and CVD-grown graphene is somewhat surprising, considering that rGO has a finite bandgap whereas graphene does not. A possible explanation may be that impurity-induced broadening of the energy states of rGO41-44 made its density of states (DOS) similar to that of gap-less graphene. The more negative surface potential at VG = -40 V indicated that the EF of the rGO electrode decreased, whereas the more positive surface potential at VG = +40 V indicated that the EF of the electrode increased. Together, these findings indicated that the SB formed in the actual device between the rGO electrode and PTCDI-C8 active layer was tunable. Next, the electrical characteristics of the vertical SB transistors based on rGO-PTCDI-C8 heterostructures were investigated at room temperature under vacuum and dark conditions. Figures 2a and 2b show linear and semi-log plots of the output characteristics [drain current (ID) versus drain voltage (VD)] of the devices, respectively. The bottom rGO source electrode in contact with the SiO2 gate dielectric layer was grounded, while the voltage applied to the top Al drain electrode was swept from -3 to 3 V under various gate voltages (VGs) ranging from -40 V to +40 V. ID increased as VG increased positively, indicating that electrons were majority carriers in the device (see the red arrow in Figure 2a). At VG = 0 V, asymmetric rectifying behavior was clearly observed, with a larger ID measured at the negative side of VD compared with the positive side. This rectification behavior originated from the rGO-PTCDI-C8 junction because the Al electrode (work function ~4.2 eV) formed an Ohmic junction with PTCDI-C8.45 The transition from diodic contact to Ohmic contact was observed as VG increased positively, indicating that the SB at the rGO-PTCDIC8 junction was tunable. The device exhibited a large ID modulation in excess of three orders of magnitude in the positive VD region, while much weaker ID modulation was observed in the negative VD region. At positive VD values, electrons were injected from rGO to PTCDI-C8, and hence the overall current level was dominated by the SB at the rGO-PTCDI-C8 junction. At negative VD values, on the other hand, the AlPTCDI-C8 junction played a dominant role in current modulation because the electrons were injected from Al to PTCDI-C8. The large ID modulation at positive VD values indicated that the SB at the rGO-PTCDI-C8 junction was modulated effectively by varying the applied VG because the back gate bias modulated the doping level or work function of the rGO. The asymmetric current modulation at opposite VD polarities was reflected in measurements of the transfer characteristics (ID versus VG at fixed VD) of the vertical SB transistors, as shown in Figures 2c and 2d. For positive VD values (Figure 2e), where electron transport was dominated by the rGO-PTCDI-C8 junction, ID increased as VG increased positively. Application of a negative VG lowered the Fermi level of 4


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rGO, which increased the SB height for electron injection and thus decreased the device conductance. In contrast, application of a positive VG raised the Fermi level of rGO, thus lowering the SB for electron injection and hence increasing the device conductance. The resulting vertical SB transistors exhibited a large on-off current ratio exceeding 103. The maximum current density was 17.9 mAcm-2 at VD = +3 V and VG = +40 V, which was higher than that collected from the PTCDI-C8 devices based on the CVD-grown graphene source electrode (3.6 mAcm-2 at VD = +3 V and VG = +40 V) (Figure S3). In contrast, for negative VD values, where electron transport was dominated by the SB at the Al-PTCDI-C8 junction (Figure 2f), the device exhibited weak current modulation; this was attributed to the fixed barrier height at the Al-PTCDI-C8 junction. To investigate the charge injection properties at the rGO-PTCDI-C8 junction of the vertical SB transistors, the output curves were measured at various temperatures ranging from 300 to 140 K in steps of 20 K (Figure S4). Figure 3a shows representative output curves of the device measured at 300 K and 140 K. ID depended strongly on temperature, with a larger dependence on temperature observed on the positive side of VD compared to the negative side. For the output curve measured at 140 K, two distinct regimes with different slopes were observed at negative VG values (e.g. at VG = -20 and -40 V), indicating different transport mechanisms at these voltages (discussed below). Over the entire temperature range examined, ID consistently showed a weaker VD dependence at negative VD values than at positive VD values. When the transfer characteristics of the devices measured at 140 K (Figure 3b) were compared to those at 300 K (see Figure 2c), the devices yielded an increased on-off current ratio at low VD of +0.5 V but a decreased on-off current ratio at high VD of +3.0 V. The nature of the charge injection in our vertical SB transistors based on rGO-PTCDI-C8 heterostructures could be described with different models for different temperature (T) and bias voltage (VD and VG) conditions. At high temperatures, where more thermal energy is available, the ID-VD characteristics could be described primarily by the thermionic emission model using the Richardson-Schottky (RS) equation46-47: J = ∗ exp (

( / )

)

(1)

where A* is the effective Richardson constant, ε0 is the vacuum permittivity, εr is the dielectric constant of the semiconductor, q is the element charge, d is the barrier width, φB is the barrier height, and kB is the Boltzmann constant. For the fitting, the log of the diode saturation current (Isat) values (obtained at different VG and different T values) divided by T2 were plotted as a function of q/kBT. As shown in Figure 3c, the data, especially at high temperatures (the regime shaded in red), matched the equation reasonably well with a characteristic linear relation in the plot, suggesting that charge transport at these temperatures occurred primarily via the thermionic emission mechanism. Considering the range of VD that was used to obtain Isat, 5



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this model should be valid, as long as the VD remained low; the deviation from thermionic emission will be described below. From the slope of the plot in this temperature regime, the SB height (φB) at different VG values could be extracted. As shown in Figure 3d, φB decreased from 0.19 to 0.03 eV as VG increased from 40 to 40 V, consistent with the KPFM results (see Figure 1e and 1f). Notably, the plots of ln(Isat/T2) versus q/kBT showed quite large deviations from linearity at lower T values and more negative VG values (the regime shaded blue in Figure 3c). These deviations suggested that charge injection at the SB could no longer be described by the thermionic emission model at such low temperatures, where only weak thermal energy is provided. Alternatively, tunneling models may be considered, with the type of model applied depending on the height of the SB formed at the junction. Under conditions of negative VG the SB would be high, whereas under conditions of positive VG the SB would be low. This difference at opposite VG polarities resulted in distinct ID-VD characteristics at low temperatures. Figure 3e shows the ID-VD plot obtained at VG = -40 V (corresponding to the off-state of the transistor), whereas Figure 3f shows the plot obtained at VG = +40 V (corresponding to on-state of the transistor). Obviously, the low SB at VG = +40 V will have less influence on charge injection than does the high SB at VG = -40 V. Therefore, below we will first consider the more complicated case of negative VG values. The shape of the ID-VD curve at VG = -40 V (Figure 3e) varied significantly depending on both T and VD. Based on the curve shapes observed, we categorized the behavior into three regimes: Regime I, the region of high T (above 220 K) and low VD (shaded red in Figure 3e), in which charge injection could be described by thermionic emission behavior as discussed above; Regime II, the region of low T and low VD (shaded green); and Regime III, the region of high VD over the entire temperature range (shaded blue). The VD dependence of the channel current differed between Regimes II and III. In Regime III, the channel current increased substantially with increasing VD. The resulting large current can be explained by the enhanced rate of tunneling injection arising from the reduction in the width of the barrier under such a high electric field. This process, known as Fowler-Nordheim (F-N) tunneling, can be described by J ∝ exp −

" ) #$

*

-

%, ln ) +, ∝ − ) , (

" #$

)

(2)

where $ is Planck’s constant divided by 2π, and m is the effective mass of the carrier. F-N tunneling behavior is typically confirmed by the presence of a negative slope regime in the plot of ln(J/V2) versus 1/V. As shown in Figure 3g, a negative slope regime was indeed observed at VD > 1.3 V (or at 1/VD < 0.76 V-1) at 160 K, corresponding to Regime III in Figure 3e. We note that a negative slope was also observed even at higher temperatures (e.g. at 300 K) if VD was sufficiently high (VD > 2.1 V). This indicated that, in the high VD region of Regime I, not only thermionic emission but also F-N tunneling played a role in charge injection.47-48 Meanwhile, the charge injection at low VD values (Regime II) in Figure 3e could not be described by F-N tunneling. If charge injection in Regime II cannot be ascribed to thermionic emission or 6


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direct F-N tunneling, it may be described by a series of short-range tunneling events (i.e. hopping) through impurities and defects within the barrier, weakly assisted by thermal energy. Such a hopping injection mechanism has been suggested previously by Kang et al. to describe charge injection into black phosphorus from a graphene electrode. Considering that the hopping can occur 3-dimensionally within the barrier, a linear relation between ln(ID) and T-1/4 is expected, similar to the formula for 3-dimensional variable range hopping. A plot of ln(ID) versus T-1/4 for our system showed a good linear relation (Figure 3h). At VG = +40 V, the chance of F-N tunneling would be greatly suppressed even at high VD values, because the SB was thick. Indeed, the signature of F-N tunneling in the ln(J/V2) versus 1/V plot was hardly observed even at high VD values (Figure S5). When the SB was lowered by going to a positive gate bias, we considered that, in contrast to the thermionic emission-dominated charge injection at high temperature, the charge injection at low temperatures may be explained by a hopping mechanism taking advantage of impurity states. Figures 4 and S6 display the phase-diagram describing the different charge injection processes at the rGO-PTCDI-C8 interface at different combinations of drain voltage, gate voltage, and temperature. At sufficiently high temperatures, charge injection at the SB formed at the rGO-PTCDI-C8 interface was dominated by thermally activated electrons. This explanation was valid for both VG < 0, where the SB was high, and for VG > 0, where the SB was substantially lower. As the temperature was reduced, thermionic emission became less likely because insufficient thermal energy was provided. Under such conditions, tunneling came into play. When the height of the SB was substantial (more negative VG values), charges could tunnel through the barrier directly according to the F-N tunneling model, if a sufficiently high electric field was applied across the channel (larger VD values). If VD was not high enough, however, charges would tunnel through the barrier via sequential hoppings along impurity and defect sites present within the barrier (smaller VD values). On the other hand, when the height of the SB was not substantial (more positive VG values), F-N tunneling would be less likely to occur and, at low temperatures, the tunneling would occur via the hopping mechanism regardless of the magnitude of the drain bias. Figure S7 summarized the detail schematic band structures under each bias and temperature condition.

CONCLUSION In conclusion, we have demonstrated vertical SB transistors based on a solution-processed rGO electrode. In these devices, rGO was utilized as a work function-tunable source electrode and PTCDI-C8 as a semiconducting channel. By varying the gate voltage, the barrier height at the rGO-PTCDI-C8 junction could be effectively modulated. Vertical SB transistors based on the rGO-PTCDI-C8 heterostructures exhibited excellent electrical properties such as a maximum current density of 17.9 mA/cm2 and an on-off current ratio >103. Temperature-dependent transport measurements were made to understand the charge injection properties. Three different charge injection mechanisms, i) thermionic emission, ii) impurity state7



assisted hopping, and iii) F-N tunneling, were observed depending on the temperature and bias voltage. The use of large-area solution-processed rGO as a work function tunable electrode in vertical transistors opens up new opportunities for realizing future flexible 2D-based electronic devices.

METHODS The graphene oxide was synthesized using a modified Brodie method. Pure graphite (Alfa Aesar, 99.999% purity,–200 mesh) was mixed with fuming nitric acid and sodium chlorate at room temperature with stirring for 48 hr. After acid treatment, the product was purified by washing and filtering. The synthesized graphite oxide powder was exfoliated in aqueous KOH (pH 10) with a concentration of 2 g/L by using homogenizer for 1 hr. The resulting mixture was centrifuged and freeze-dried to obtain the dispersible GO powder. The resulting GO powder was then redispersed in dimethylformamide by bath sonication for 30 min. The GO ink was chemically reduced by adding hydrazine monohydrate (N2H4) to reach a final concentration of 1 mM, followed by heating at 100 °C for 10 hr. The reduced graphene oxide (rGO) solution was spray-coated through the shadow mask onto the 300 nm-thick SiO2/n++ Si substrate with Au contacts using home-built spray machine. Onto the patterned rGO electrodes, the 120 nm-thick n-type N,N′-dioctyl3,4,9,10-perylenedicarboximide (PTCDI-C8) was deposited at a rate of 0.2 Å/s under a pressure of ~10-7 Torr through a shadow mask using an organic molecular beam deposition (OMBD) system. Finally, 40 nmthick Al drain electrodes were deposited thermally onto the patterned PTCDI-C8 layers at a deposition rate of 1.0 Å/s. The active area overlapped between graphene and top Al electrode was 1600 µm2. The rGO films were characterized by confocal Raman spectrometer (NTEGRA SPECTRA, NT-MDT) with an excitation wavelength of 532 nm and X-ray photoemission spectroscopy (Multilab2000, Thermo VG Scientific Inc.) with monochromatized Al Kα X-ray radiation. The electrical performances of the devices were measured using Keithley 2400 and 236 source/measure units under vacuum and dark condition.

ASSOCIATED CONTENT Supporting Information. Additional experimental details and ﬁgures. This material is available free of charge via the Internet at http://pubs.acs.org

Experimental details, surface potential of the CVD-grown graphene, electrical properties of the transistors, phase-diagram to describe the different charge injection processes of the transistors

AUTHOR INFORMATION Corresponding Author *E-mail: [email protected] 8


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Notes The authors declare no competing financial interest.

Acknowledgements This work was supported by the Center for Advanced Soft-Electronics funded by the Ministry of Science, ICT and Future Planning as Global Frontier Project (2013M3A6A5073177 and 2014M3A6A5060953). This work was also supported by the Basic Science Research Program through the National Research Foundation of Korea (NRF) funded by the Ministry of Science, ICT and Future Planning (NRF-2017R1C1B2006789).

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Figure 1. (a) Schematic of the fabrication procedure for the vertical Schottky barrier transistors based on rGO-PTCDI-C8 heterostructures. The right panel shows the surface morphologies and height profiles of the rGO electrode and PTCDI-C8. (b) XPS C1s spectrum and (c) Raman spectrum of the rGO electrode. (d) Cross-sectional schematic of the device structure. (e) Schematic description of the KPFM measurement. The lower panel shows the KPFM images and histogram of the surface potential distribution of the rGO electrode at different VG values. (f) Surface potential of the rGO electrode as a function of VG.

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Figure 2. (a) Linear and (b) semi-log plots of the output characteristics (ID versus VD) of the vertical Schottky barrier transistors based on rGO-PTCDI-C8 heterostructures. (c-d) Transfer characteristics (ID versus VG) at (c) positive VD values and (d) negative VD values. (e-f) Schematic band structures of the rGOPTCDI-C8-Al heterostructures under (e) positive VD and (f) negative VD values.

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Figure 3. (a) Semi-log plots of the output characteristics of the vertical SB transistors based on rGOPTCDI-C8 heterostructures measured at 300 and 140 K. (b) Transfer characteristics of the vertical SB transistors measured at 140 K. (c) ln(Isat/T2) versus q/kBT plots. (d) φB as a function of VG. (e) and (f) Loglog plots of the ID-VD curves at VG = ˗40 and +40 V, respectively. (g) ln(ID/VD2) versus 1/VD plot under VG = 40 V measured at various temperatures between 300 and 140 K. (h) ln(ID) versus T-1/4 plot (VG = -40 V and VD = +0.3 V) at low temperatures between 220 and 140 K.

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Figure 4. Phase-diagram describing the different charge injection processes at the rGO-PTCDI-C8 interface in different drain bias, gate voltage, and temperature regimes.

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TOC Figure

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Tunable Charge Injection via Solution-Processed Reduced Graphene

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