Carbon Nanotube Self-Gating Diode and Application in Integrated

Jun 20, 2016 - performance optimization strategy is outlined, and high performance ... application of an atomic force microscopy (AFM) tip close to th...
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Carbon Nanotube Self-Gating Diode and Application in Integrated Circuits Jia Si, Lijun Liu, Fanglin Wang, Zhiyong Zhang,* and Lian-Mao Peng* Key Laboratory for the Physics and Chemistry of Nanodevices and Department of Electronics, Peking University, Beijing 100871, People’s Republic of China S Supporting Information *

ABSTRACT: A nano self-gating diode (SGD) based on nanoscale semiconducting material is proposed, simulated, and realized on semiconducting carbon nanotubes (CNTs) through a doping-free fabrication process. The relationships between the performance and material/structural parameters of the SGD are explored through numerical simulation and verified by experiment results. Based on these results, performance optimization strategy is outlined, and high performance CNT SGDs are fabricated and demonstrated to surpass other published CNT diodes. In particular the CNT SGD exhibits high rectifier factor of up to 1.4 × 106 while retains large on-state current. Benefiting from high yield and stability, CNT SGDs are used for constructing logic and analog integrated circuits. Two kinds of basic digital gates (AND and OR) have been realized on chip through using CNT SGDs and on-chip Ti wire resistances, and a full wave rectifier circuit has been demonstrated through using two CNT SGDs. Although demonstrated here using CNT SGDs, this device structure may in principle be implemented using other semiconducting nanomaterials, to provide ideas and building blocks for electronic applications based on nanoscale materials. KEYWORDS: carbon nanotube, diode, full-wave rectification, self-gating effect

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nanomaterials as channel should exhibit an extreme sensitivity to the changes in its environmental characteristics, such as morphology and electrostatic distribution.4,5 For example, the application of an atomic force microscopy (AFM) tip close to the source, which functions as a local gate,6,7 and the introduction of geometrical asymmetry both lead to strong rectifying characteristics.8,9 In fact any breaks in the electrostatic potential symmetry can give rise to asymmetric I−V characteristics at forward and reverse bias and can even lead to the appearance of the rectifying I−V curve, which could be used as the scheme to design diodes based on nanomaterials. Here we propose a kind of diode based on nanoscale semiconducting channel by using an asymmetric floating gate and demonstrate the device on a typical nano semiconducting material, i.e., carbon nanotube (CNT). CNT is a quasi-onedimensional conductor with excellent electrical properties, including high carrier mobility and Fermi-velocity, ultrathin body, and small intrinsic capacitance, and is considered an ideal material to construct nanoelectrical devices.10−15 Most of the demonstrated electrical devices based on CNTs are field-effect transistors (FETs),16−21 which were widely used to construct various kinds of digital and analog integrated circuits.22−32 A

iode is an important type of device in modern microelectronics and nanoelectronics, and almost all logic functions and many analog circuits can be realized using diodes. The key diode feature is the well-known rectifying behavior, i.e., extremely asymmetric current−voltage (I−V) characteristics at forward and reverse bias.1 In conventional bulk semiconductor, rectifying I−V characteristics is mainly achieved by controlled doping, i.e., via the currently widely used semiconductor p−n junction, heterojunction, or metal−semiconductor junction.1 Doping is a key conception in microelectronics since it is the main method to adjust the property of semiconductor and to realize the designed device function. However, the situation becomes very different in nano semiconducting devices, in which the number of dopant atoms reduce to sub-100 in the active channel region.2,3 It is well known that reduced numbers of dopants in the conducting channel will induce larger performance fluctuations in devices through, among other things, larger quantum fluctuations.2,3 In addition, controllable and stable doping is still difficult to realize in nanomaterials. Therefore, chemical doping is not an effective method to realize a diode in nanodevice any more, and other schemes should be used for adjusting and controlling the electrostatic distribution in devices. An ultrathin body, as the main characteristic of nanomaterials, should lead to much weaker electrostatic screening effects in nanomaterials than in conventional bulk semiconductors, and then devices using © 2016 American Chemical Society

Received: March 28, 2016 Accepted: June 20, 2016 Published: June 20, 2016 6737

DOI: 10.1021/acsnano.6b02126 ACS Nano 2016, 10, 6737−6743

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floating metal, the I−V characteristic is basically symmetric (none metal) with large resistance owing to the existence of two large back-to-back Schottky barriers. While placement of the floating metal to the electrode R results in extremely asymmetric I−V characteristics (asymmetric metal), and such I−V characteristics are typical for a rectifying diode. Figure 1c explains how the floating metal near one of the contacts causes the asymmetric I−V characteristics by affecting band energy of the channel. The conducting channel of the device is the metal−semiconductor−metal (MSM) structure in which the reverse-biased Schottky barrier determines the electrical transport.48 When a positive voltage (+1 V) is applied on the left electrode, the right metal/semiconductor contact is then a reverse-biased Schottky barrier. When there is no floating metal near the left electrode, the potential rises almost evenly at the channel, and the Schottky barrier remains high and thick at the right electrode (blue curve). When a metal, which is considered as an equipotential body, is placed near the right electrode, the potential of the channel nearby is adjusted to a fixed value, and the slope of the potential in the other regions of the channel increases, thus significantly reducing the thicknesses of the Schottky barrier near the right electrode (red curve). Therefore, current increases significantly since the tunneling probability is exponentially dependent on the thickness of the barrier. When a negative voltage (−1 V) is applied on the left electrode, the reverse-biased Schottky barrier is located on the left electrode. The float metal does not noticeably reduce the barrier thickness due to the large distance between them, and current nearly remains the same. The floating metal thus acts as a floating gate which determines the potential distribution of the channel and in particular reduces the thickness of the nearby reverse-biased Schottky barrier. The influences of floating short CNTs on the Schottky barriers between CNTs and metal contacts have been reported by Hong Li et al.,49,50 where the Schottky barriers were modified by charges of floating short CNTs tunneled from the channel under suitable Vgs. However, there is no tunneling effect in the SGD, and the net charges in floating gate is zero. The metal affected the electric potential distribution in channel and then modified the Schottky barrier. Moreover Hong Li’s phenomenon can be found in FET which needs the modulation of a gate, but the SGD is just a two-terminal device in which the gate voltage is unnecessary. The CNT SGD device can be fabricated through a simple doping-free process. Contact electrodes were first formed onto a selected semiconducting CNT using e-beam lithography (EBL), followed by the metal deposition of Ti/Au film with a thickness of 20/30 nm and a standard lift-off process. It is wellknown that Ti can form Schottky barrier with CNT, which is very important for SGD. A HfO2 film was then grown through atom layer deposition (ALD) at 90 °C. It should be noted that the thickness of the HfO2 film determines the distance between the floating metal gate and the channel and is thus an important parameter for the SGD. Windows for floating gates in PMMA resist were opened by another EBL process, and then Ti film with a thickness of 15 nm is deposited by e-beam evaporation. The SGD is finished after a lift-off process to form the Ti floating gate, and Figure 1d is a scanning electronic microscope (SEM) image showing a typical SGD device. Depicted in Figure 1e is a general principle SGD, showing that with appropriate conditions, any break in the symmetry of the device could lead to asymmetric I−V characteristic. We now consider under what conditions a SGD can behave as a good diode. A SGD consists of two basic components, i.e., a nanoscale

diode is also a concerned device in the field of CNT-based nanoelectronics, and several kinds of diodes have been demonstrated by different schemes, including using asymmetric contacts made of metals with different functions,33−36 forming a p−n junction through using split gate37 or chemical doping,38,39 introducing pentagonal and heptagonal defects into the CNT honeycomb lattice,40,41 or using Y-junction CNTs42−44 or CNT-based heterojunctions.45−47 However, these devices are difficult to make, and few circuit applications have been demonstrated using these devices. In this work, a nanodiode, which consists of a nanoscale semiconducting channel, two Schottky contacts, and a floating metal near one of the contacts, is proposed and realized on semiconducting CNTs through a simple CMOS compatible process. The equipotential floating metal gate significantly reduces the thickness of the nearby Schottky barrier when this contact is reverse biased, called self-gating (SG) effect, thus induces extreme asymmetry in the I−V curve. This CNT selfgating diode (SGD) presents excellent rectifying properties, yielding a high rectifier factor (current ratio when voltage is +1/ −1 V) of up to 1.4 × 106, large output conductance, and high yield. Several kinds of important integrated circuits including logic gates (AND and OR) and a full wave rectifying circuit have been demonstrated through using the CNT SGDs as core blocks. Potentially the construct and concept of SGD can be used to other semiconducting nanomaterials such as nanowires, nanoribbons, or two-dimensional material.

RESULTS AND DISCUSSION Figure 1a shows the schematic of a SGD, which is composed of a semiconducting single walled CNT (SWNT) contacted with two electrodes (R and L, of same kind of metal) and a floating metal near one of the electrodes. Electrical behavior of the so fabricated SGD is measured by applying bias on the left electrode (L) with the right electrode (R) being connected to the ground, as shown in Figure 1b. In the absence of the

Figure 1. (a) Schematic diagram showing the structure of a CNT self-gating diode (SGD). (b) Experimental I−V characteristics measured using CNT SGDs without (no metal) and with floating metal gate (asymmetric metal). The inserts are the same I−V curves but in linear coordinates. (c) Depicted band structure of the conduction channel in a SGD in forward and reverse bias. (d) SEM image of a fabricated CNT SGD. (e) Schematic diagram showing a general concept SGD with a randomly placed floating metal particle nearer to the right electrode. 6738

DOI: 10.1021/acsnano.6b02126 ACS Nano 2016, 10, 6737−6743

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ACS Nano semiconducting channel with two Schottky barriers to its ends and a nanoequipotential floating metal near one of the Schottky barriers. Therefore, the performance of the SGD will be affected by material and structural parameters of the channel and the floating metal, such as the mobility of the channel material (μ), thickness of the channel (twire), distance from the floating metal to the electrode (tox), and the length of the floating metal (l). To design a SGD performance optimization strategy, it is necessary to investigate the effects of these four parameters on device performance by, e.g., simulation. The behavior of the SGD can be simulated by a drift-diffusion model given that carrier transport in the semiconducting channel (nanowires or CNT) is always in the diffusive regime (see details in Supporting Information). To quantitatively describe the SGD performance, the rectifier factor is defined as the ratio of the currents at bias values of −1 V and +1 V. We simulated how the rectifier factor of the SGD is affected by l, twire, tox, and μ, as shown in Figure 2, and then verified these with experimental results on CNT. The position of the floating metal gate relative to the two contacts is important for the SGD. To demonstrate this effect, we fabricated five SGDs with varied metal length l while fixing twire, tox, and μ and measured the I−V curves as shown in Figure 2a. The measured relation between the rectifier factor and the floating gate length of the CNT SGD is well coincided with the simulated results as shown in Figure 2b, in which the rectifier factor increases with increasing l and subsequently achieves a high platform value from 100 to 400 nm. It is because that in the on-state, longer l expands the self-gating region, thus reducing the thickness of the Schottky barrier, and the larger the Ion is. The insert of Figure 2b shows the on-state Schottky barrier at the right electrode (R) for 175 nm. The off-state property is barely affected because the floating metal gate is far away from the reverse-biased Schottky barrier. Meanwhile the effect on the left contact will increase with a further increase of the floating metal gate length because the floating metal gate is increasingly closer to the left contact. The thickness of the left barrier is also decreased when this barrier is reverse biased. The structure becomes increasingly symmetric as the floating metal gate increases until the distance to the left contact is comparable to that to the right contact, leading to increasingly more symmetric I−V characteristics. As l increases to 490 nm, the effect of the floating metal gate on the right contact is the same as that on the left contact, and the rectifier factor therefore decreases to 1. Optimized length of the floating metal gate (l) is about 400 nm (for a 500 nm channel) with the largest rectifier factor. A thinner channel is obviously more sensitive to the floating metal gate, leading to a stronger self-gating effect. Effect of the thickness of semiconductor channel twire was also explored through experiment and simulation. Experimental results also show that the SGD that is based on the CNT with a diameter of 0.9 nm possesses 3 orders of magnitude lower off-state current and higher rectifying factor than that based on a 1.6 nm CNT (Figure 2c). Two reasons induce this dependence: First, a thicker channel is obviously less sensitive to the floating metal gate, leading to a weaker self-gating effect, as shown in the simulation in Figure 2d. According to the simulated results shown in Figure 2d, the SDG presents excellent rectifying performance only when twire is smaller than 2 nm. Therefore, only nanoscale semiconductors, such as two-dimensional films or nanowires/nanotubes, can be used as the SGD channel materials. Second, the energy gap of a CNT is inversely

Figure 2. Experimental and simulated I−V characteristics and rectifier factors for CNT SGDs with different material/structural parameters. (a), (c), (e), and (g) Experimental results and (b), (d), (f), and (h) simulated rectifier factors plotted together with experimental results. Stars in these figures represent experimental rectifier factors calculated from corresponding I−V curves in the same colors. (a) I−V curves for SGDs with different floating metal length l but fixed tox = 5 nm, μ = 1500 cm2/vs, and twire = 1.6 nm. (b) Relationship between rectifier factor and l. Inset: Band structures of Schottky barrier near the right electrode with different l. (c) I−V curves for SGDs with different CNT diameters but fixed tox = 5 nm, μ = 1500 cm2/vs, and l = 300 nm. (d) Relationship between rectifier factor and twire. Inset: Band structures of Schottky barrier near the right electrode with different twire. (e) I−V curves for SGDs with different EOT but fixed twire = 1.6 nm, μ = 1500 cm2/ vs, and l = 300 nm. (f) Relationship between rectifier factor and EOT. Inset: Band structures of Schottky barrier near the right electrode with different EOT. (g) I−V curves for SGDs with different mobility μ but fixed tox = 5 nm, twire = 0.9, and 1.2 nm l = 300 nm. (h) Relationship between rectifier factor and μ.

proportional to its diameter,51 and a larger energy band gap could effectively inhibit the intrinsic excitation, which is the primary contributor of the off-state current. Coupling capacitance between the floating metal gate and the channel will play an essential role in the self-gating effect. Since the coupling capacitance depends on the dielectric constant (ε) and the thickness of the insulating materials (tox) between metal gate and channel, we use equivalent oxide thickness (EOT), defined as tox × εsi/ε, instead of tox to demonstrate effect of coupling capacitance on the SGD comprehensively. In a CNT6739

DOI: 10.1021/acsnano.6b02126 ACS Nano 2016, 10, 6737−6743

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not only larger rectifier factor but also higher on-current. Moreover SGD presents a much higher on-state current than a split-gate diode,37 suggesting smaller output resistance and larger driving ability. Compared to CNT diodes with high onstate current, such as asymmetric Pd−Al, Pd−Sc, or Pd−Au contact diodes,33−36 SGD presents higher rectifier factor at low bias (+1 V) with several magnitudes while keeping similar onstate current. Therefore, the SGD can provide higher comprehensive performance than other published diodes based on CNTs. In fact, diodes can be used as the building blocks to construct many kinds of circuits for digital and analog applications, although the diode-based integrated circuits have hardly been realized on CNTs mainly owing to the low yield or poor stability of CNT devices. Benefiting from the simple fabrication process suggested in this paper, we can fabricate SGDs with high yield and high stability, which indeed provide the possibility to construct diode-based integrated circuits. The measurements about yield and stability of the SGDs are shown and discussed in detail (see Figure S4 and related description in Supporting Information). At first, we demonstrated digital ICs using CNT SDGs. As representative fundamental logic gates, AND and OR gates have been fabricated based on SGDs and on-chip resistances, as shown in Figure 3a. The two kinds of logic gates have similar structure, i.e., each of them consists of two SGDs and one onchip resistance, and then works with two signal inputs, one signal output, and an operating voltage input. The difference between AND and OR gates is the location of the floating gate, as shown to the right of the SEM image in Figure 3a. For an AND gate, the floating metal gate is placed near the “input” side, and the operating voltage is set to VDD (1 V). On the other hand, in the OR gate, the floating metal gate is placed near the “output” side, and the operating voltage is set to 0 V. The on-chip resistances are designed to exhibit a large resistance of 1.36 MΩ to match the output resistance of SGDs and have been realized through Ti wire with thickness of 5 nm, which presents sheet resistance of 680 Ω/□. The detailed fabrication process and characteristic of the on-chip Ti resistance are described in Supporting Information. The circuits are measured using a probe station, signal sources, and an oscillography, and the sequential measurement results of AND and OR gates are shown in Figure 3b. Obviously both AND and OR gates present the correct logic functions, which is attributed to the high yield and stability of CNT SGDs. In fact, diodes are widely used in analog circuits, especially rectifier circuits, which are often used as components of dc power supplies and dc power transmission systems. A full-wave rectifier circuit is designed as shown in Figure 4a and then built using two CNT SGDs, named SGD1 and SGD2, respectively. The main function of a full-wave rectifier circuit is to convert ac signals, which periodically reverses direction, to a dc output, which flows in only one direction. The principle of the fullwave rectifying can be explained as follows: During 0 ∼ π period of the input ac signal (sinusoidal wave), SGD1 is turned on, and SGD2 is turned off, thus the output is the same as the input. During π ∼ 2π period, SGD1 is off, and SGD2 is on, and the output is of the opposite phase with that of the input. The fabricated 2-SGD IC presents good full-wave rectifying function as shown in Figure 4b. Similar to the conventional full-wave rectifier circuits, an obvious peak voltage loss, from 2 V to about 1.4 V, is observed mainly owing to the relative large cutin voltage of diodes. The difference between peak voltage of

based SGD, the on-state current and rectifier factor decrease significantly as EOT increases from 1.3 to 2.08 nm (tox increases from 5 to 8 nm) as shown in Figure 2e. For a fixed insulator material (HfO2 or other materials or vacuum), larger tox should lead to a smaller coupling capacitance between the floating metal gate and the channel and therefore a weaker selfgating effect. Simulation results in Figure 2f show that an EOT