High-Performance Carbon Nanotube Complementary Electronics and

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High-Performance Carbon Nanotube Complementary Electronics and Integrated Sensor Systems on Ultrathin Plastic Foil Heng Zhang, Li Xiang, Yingjun Yang, Mengmeng Xiao, Jie Han, Li Ding, Zhiyong Zhang, Youfan Hu, and Lian-Mao Peng ACS Nano, Just Accepted Manuscript • DOI: 10.1021/acsnano.7b09145 • Publication Date (Web): 29 Jan 2018 Downloaded from http://pubs.acs.org on January 31, 2018

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High-Performance Carbon Nanotube Complementary Electronics and Integrated Sensor Systems on Ultrathin Plastic Foil Heng Zhang, Li Xiang, Yingjun Yang, Mengmeng Xiao, Jie Han, Li Ding, Zhiyong Zhang, Youfan Hu,* Lian-Mao Peng* Key Laboratory for the Physics and Chemistry of Nanodevices and Department of Electronics, Peking University, Beijing 100871, China Corresponding author Email: [email protected]; [email protected]

ABSTRACT:

The

longtime

vacancy

of

high-performance

complementary

metal-oxide-semiconductor (CMOS) technology on plastics is a non-negligible obstacle to the applications of flexible electronics with advanced functions, such as continuous health monitoring with in situ signal processing and wireless communication capabilities, in which high speed, low power consumption and complex functionality are desired for integrated circuits (ICs). Here, we report the implementation of carbon nanotube (CNT)-based high-performance CMOS technology and its application for signal processing in an integrated sensor system for human body monitoring on ultrathin plastic foil with a thickness of 2.5 microns. The performances of both the p- and n-type CNT field-effect transistors (FETs) are excellent and symmetric on plastic foil with a low operation voltage of 2 V: width-normalized transconductances (gm/W) as high as 4.69 µS/µm and 5.45 µS/µm, width-normalized on-state currents reaching 5.85 µA/µm and 6.05 µA/µm, and mobilities up to 80.26 cm2·V-1·s-1 and 97.09 cm2·V-1·s-1, respectively, together with a current on/off ratio of approximately 105. The devices were mechanically robust, withstanding a curvature radius down to 124 µm. Utilizing these transistors, various high-performance CMOS digital ICs with rail-to-rail output and a ring oscillator on plastics with an oscillation frequency of 5 MHz were demonstrated. Furthermore, an ultrathin skin-mounted humidity sensor system with in situ frequency modulation signal processing capability was realized to monitor human body sweating.

Keywords: carbon nanotubes; flexible electronics; CMOS; integrated sensor system

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Currently, greater than 90% of commercial integrated circuits (ICs) are designed based on complementary metal-oxide-semiconductor (CMOS) technology because of its prominent advantages, including low static power consumption, high noise immunity and simple structural layout. These characteristics are also long-cherished in flexible electronics. However, traditional silicon CMOS technology involves high-temperature doping processes, which are incompatible with the plastic substrates used in flexible electronics. Approaches that transfer printing n- and p-doped silicon nanomembranes (NMs) onto plastics to circumvent the constraint of high temperature have been reported.1-6 However, these approaches are costly and complicated with limited yields. Other approaches based on organic or heterogeneous materials offer only modest performances, which are incongruent with the original intention of CMOS technology.7-11 Also, there are some attempts have been made based on carbon nanotubes (CNTs),12-16 which are very promising but still subjected to the limited performance on plastic substrates. To date, the direct fabrication of wafer-scale high-performance CMOS devices and ICs on plastics remains a key challenge to push flexible electronics toward the next stage of advancement. In addition, recent developments in constructing systems on ultrathin plastics provide additional attractive characteristics to flexible electronics, including conformal contact for interfacing with skin or soft tissues,17-24 making these systems ideal for next-generation clinical and biological applications. However, these developments raise additional challenges for manufacturing and demand further compromise between performance and ultra-flexibility.

Results and Discussion Here, we present the implementation of CNT-based high-performance p- and n-type field-effect transistors (p- and n-FETs), CMOS ICs and a frequency modulation (FM) quasi-digital sensor system on ultrathin plastic foil. Figure 1a and 1b show the schematic and cross-sectional diagrams of the CNT CMOS structure. We used solution-processed high-purity semiconducting CNT films as the channel materials. A plastic foil constructed with parylene-C, poly(4-vinyl-phenol) (PVP), and HfO2 with a total thickness of only 2.5 µm was utilized as the substrate (Supplementary Section 1). The devices on the plastic were fabricated on the wafer scale using photolithography processes. We controlled the polarity of the FETs by choosing palladium (Pd) and scandium (Sc) as the source/drain contact metals for the p-FETs and n-FETs, respectively. Figure 1c shows a photograph of the obtained CMOS devices and systems with a size of 5.5 cm ×5 cm on a 2


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supporting substrate. As the total thickness of our devices and systems is below 4 µm (including an encapsulation layer), the final electronic plastic foil can be conformally attached onto human skin (Figure 1d) or rolled paper (Figure 1e). The detailed fabrication process and a mechanically robust method for peeling the large-area ultrathin electronic foil with devices and circuits are described in the Methods. Figure 1f shows the transfer characteristics of 100 p-FETs and 100 n-FETs measured after the electronic foil was peeled off the supporting substrate with a |Vds| of 2 V. To achieve a balance between performance, yield, uniformity, and integration density, all the FETs are designed to have a channel length, L, of 5 µm and a width, W, of 50 µm (Supplementary Section 2). From a general point of view, the performances of the p- and n-FETs are uniform and symmetric. A typical pair of output characteristics is plotted in Figure 1g, showing obvious saturation behavior at high bias. The statistical results of the threshold voltage (Vth), width-normalized transconductance (gm/W), width-normalized on-state current (Ion/W), current on/off ratio [lg (Ion/Ioff)] at a |Vds| of 2 V and low-field mobility at a |Vds| of 0.1 V are summarized in Figure. 1h and Supplementary Section 4. The average Vth of the p-FETs is -0.86 ± 0.07 V, which well matches that of the n-FETs (0.85 ± 0.08 V), evidencing the symmetry between the p- and n-FETs. The gm/W values of our p- and n-FETs exhibit average values of 3.43 ± 0.74 µS/µm and 3.27 ± 0.84 µS/µm, respectively. The maximum gm/W value achieved is 4.69 µS/µm in the p-FETs and 5.45 µS/µm in n-FETs, which are, thus far, the best results obtained on flexible plastics with a channel length over 1 µm,10, 11, 22-27 providing a high signal amplification capability for future information processing. A comparison of gm/W values on plastic substrates between our results and previous reported results is shown in Figure S3. Meanwhile, the current on/off ratio and on-state current are also excellent. The maximum Ion/W values of the p- and n-FETs are 5.85 and 6.05 µA/µm, respectively, which are comparable to those obtained using Si NMs,1-3 accompanying with a large current on/off ratio approaching 105. These results suggest that both high speed and low power dissipation are simultaneously achieved in the ultrathin devices and that a strong load capability is ensured for further integration. The field-effect device mobility was calculated with the measured gate capacitance of 1.95×10-3 F/m2 (Figure S4g). The highest achieved mobilities are 80.26 cm2·V-1·s-1 and 97.09 cm2·V-1·s-1 in the p- and n-FETs, respectively. All these results indicate that the performances of the CNT-based complementary FETs on ultrathin plastic foil are much better than 3


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those achieved using organic materials and metal oxide semiconductors,7-11, 22 surpass those of Si-NM-based devices with similar channel lengths,1-3 and match those of the latest results obtained from the counterparts fabricated on rigid substrates.29 Additionally, these statistical results indicate the excellent uniformity in both the p- and n-FETs, which are well prepared for system integration. The outstanding performances of our FETs on ultrathin plastic foil are mainly attributed to our utilized doping-free technology. The short channel length and high purity of semiconducting CNTs in the channel allow the contacts to dominate the transport properties of the FETs.29,

30

The

polarity of the FETs is thus controlled by choosing either Pd (high-work-function metal) or Sc (low-work-function metal) as the source/drain contacts to selectively inject holes or electrons into the channel,31, 32 resulting in good contact quality and excellent symmetry between the p- and n-FETs. More importantly, the doping-free technology provides a low-temperature fabrication process (≤115 °C), which is compatible with most plastic substrates. As a result, a compromise between the fabrication restrictions and the performance no longer exists. This technology maintains the outstanding performance of the CNT-based electronics manifested on a rigid substrate when extended onto the ultrathin flexible system. Furthermore, the straightforward doping-free fabrication processes provide feasibility for further improving the performance on plastics by scaling down the channel length. The ultrathin electronic foil exhibits robust mechanical stability. We rolled the ultrathin foil with the devices into a hairline filament with a curvature radius of 124 µm (Figure 2a). Under bending, the characteristics of both the p- and n-FET are almost identical with those of the original unbent FETs (Figure 2b), showing only a slight decrease (< 3.9%) of the drain-source current (Figure 2c). In addition, a cyclic bending test was carried out, in which the foil were circularly deformed with a 2 mm bend radius. The Ion of the device only decreases by 6.5% after 100 bending cycles (Supplementary Section 5). A compression experiment was also performed to further prove the mechanical robustness of the electronic foil (Figure 2d). The ultrathin foil was first laminated on a pre-stretched elastomeric film. After relaxing the elastomer, the adhesion caused a compression of 45% in the devices and resulted in the formation of out-of-plane wrinkled structures (Figures 2e and 2f). The FETs on the foil were creased or even folded. The transfer characteristics of these FETs were measured after being released from the compression process. All the 100 p-FETs and 100 n-FETs maintain full functionality (Figure 2g). The statistical average values of Ion/W are 4


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3.12±0.70 and 3.04±1.12 µA/µm in the p- (Figure 2h) and n-FETs (Figure 2i), respectively, showing only slight performance degradation compared to that of the original foil (3.84±0.69 µA/µm and 3.51±0.93 µA/µm, respectively). These results indicate that the devices on the ultrathin foil provide excellent mechanical stability even under extreme deformations, which is meaningful for future applications when interfacing with soft living tissues. CMOS ICs were constructed on the plastic foil with the prepared p- and n-FETs. First, highly uniform CMOS inverters were fabricated and characterized. Figure 3a shows the voltage transfer characteristic (VTC) curves of 50 CMOS inverters with a Vdd of 2 V. All the inverters exhibit full rail-to-rail VTCs with a transition voltage centered in a narrow range near Vdd/2, which is a result of the high uniformity and symmetry between the p- and n-FETs. The average voltage gain extracted from these VTC curves reaches 31.84±7.71 with a maximum value of 50.57 (Figure 3b). The CNT CMOS inverter works in a wide supply voltage range from 2 V to 0.2 V (Figure 3c). Although the voltage gain decreased with a decreasing Vdd (Figure 3d), the full rail-to-rail VTCs were maintained. At a Vdd of 0.2 V, the inverter still shows full voltage reversal with a voltage gain of 3.29. Meanwhile, the largest current in the reversal process is only 1.2 nA (Supplementary Section 6), indicating that the CMOS inverter can properly function with a power consumption of less than 0.24 nW on the ultrathin electronic foil. This power consumption is among the lowest achieved for inverters on plastics,9, 11 promising applications in low-power flexible ICs. A ring oscillator (RO) is the industrial standard benchmarking circuit for performance evaluation. A three-stage CMOS RO with an output buffer was constructed (Figures 3e and 3f). The oscillation frequency increased with an increasing Vdd (Figure 3g), and an oscillation frequency of 5 MHz was achieved at a Vdd of 2.8 V (Figure 3h). These results represent the fastest RO achieved on plastic foils, in addition to functioning with a low supply voltage,1, 4, 10, 26, 28, 33 which further demonstrates the high performance of the ultrathin CNT CMOS devices on plastics. Pushing CMOS ROs into the high-frequency range of RFID technology, i.e., 3 to 30 MHz, on an ultrathin plastic is a critical step to achieve wireless data communication and power supply for future implantable or attachable medical devices, which are some of the most desired applications of flexible electronics. Basic logic gates and typical ICs were also constructed and demonstrated on plastic foil operating with a low supplied voltage of 2 V. Figures 3i-k, S7a-c, 3l-n and 3o-q show the 5


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corresponding circuit diagrams, photographs and dynamic measurement results of the NOR gate, NAND gate, XOR gate, and half-adder (constructed with two NOR gates, one NAND gate, and one inverter), respectively. Notably, all the circuits on the ultrathin plastic foil exhibit rail-to-rail outputs with near-perfect high and low logic levels, which are attributed to the high noise margin of CMOS logic and the obtained uniform high-performance of the CNT FETs. In addition, the improved CMOS transmission gate logic is adopted on flexible substrates to achieve an XOR gate, which requires fewer transistors (only 6 FETs) than conventional CMOS (10 FETs) or PMOS (13 FETs) structures.29 The decreased number of transistors is helpful to improve the yield and speed of flexible ICs. For in vivo or in vitro monitoring purposes, in situ signal processing placed close to the sensor is indispensable to increase the signal-to-noise ratio at the start of the measurement and to minimize signal distortion over a long transmission distance.34-36 As a preliminary system-level demonstration for future applications, an integrated humidity sensor system with an in situ FM signal processing unit on ultrathin plastic foil for skin sweat monitoring was constructed by integrating a resistive humidity sensor and a three-stage CMOS RO (Figures 4a-c). The system directly converts relative humidity (RH) information into quasi-digital frequency signals, which have high noise immunity and are ready for next-step wireless signal transmission. The resistive humidity sensor was constructed by coating a transparent humidity-sensitive polymer on interdigital electrodes, which are positioned in series with the RO to divide the supplied voltage. As the ambient humidity increases, the impedance of the humidity sensor decreases, and a higher voltage is applied on the RO to generate a higher-frequency signal. Impedance matching was achieved by decreasing the impedance of the humidity sensor (e.g., from Sensor A to Sensor B in Figure 4d) and making conceding the oscillation frequency of the RO (Figure 4e), which enables the sensor system to properly function in a wide humidity range (for more details see Supplementary Section 8). Figure 4f shows the frequency-humidity curves of the ultrathin integrated sensor system in both logarithmic and linear coordinates. The output frequency increased from 49 Hz to 425 kHz as the RH increased from 11% to 97% (also see the corresponding output waveforms in Figure S8). The ultrathin system was attached onto skin to monitor sweating of the human body (Figure 4g), where the normal RH is in the range from 40% to 70% (marked as the pink area in Figure 4f). Eight 6


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identical sensor systems were constructed on the plastic foil, showing the capability of integrating multiple sensors for large-area monitoring or multiple signal collection. For dry skin, the sensor system output a frequency signal of 11.4 kHz (Figure 4h), corresponding to a RH of 41% (marked as the blue stars in Figure 4f). Upon sweating, the output frequency increased to 304.6 kHz (Figure 4i), corresponding to a RH of 84%, as marked by the red stars in Figure 4f, which exceeds the normal RH range. Therefore, an in vitro humidity sensing platform with in situ signal processing for skin sweat monitoring is demonstrated. Additionally, benefiting from the FM mode, the ultrathin system exhibits ultralow power dissipation of only 1.3 μW and 55.4 μW when the skin is dry and sweating, respectively (Supplementary Section 9).

Conclusion In conclusion, we resolved the longstanding challenge of directly fabricating high-performance CMOS devices on plastics on the wafer scale, which will inherently lead to increased system complexity and functional diversity of flexible electronics. The straightforward and intrinsic low-temperature processes eliminate the barrier between super flexibility and high performance. In addition to compatibility with existing microelectronics technologies, the low-temperature and high-performance characteristics are two indispensable enablers for monolithic three-dimensional integration37 to achieve a “system on plastic”. Further development of the integrated ultrathin sensor system will eventually lead to the emergence of next-generation wearables for personal health care.

Methods Preparation of ultrathin plastic substrates A silicon wafer was utilized as the supporting substrate during the fabrication process. First, a layer of parylene-C with a thickness of 2 µm was deposited on the substrate by chemical vapor deposition (SCS Labcoter® 2, Specialty Coating Systems. Inc.) at room temperature. Then, PVP in propylene

glycol

monomethyl

ether

acetate

(PGMEA)

mixed

with

a

poly(melamine-co-formaldehyde) crosslinking agent was spin coated on parylene-C to reduce the surface roughness. After curing in N2 for 2 hours, the obtained PVP layer was 500 nm thick with excellent mechanical robustness. Then, a HfO2 layer with a thickness of 5 nm was grown on PVP

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by atomic layer deposition at 90 °C (Savannah, Cambridge NanoTech), which enhanced the adhesive strength between the metal electrodes and plastic substrate. Preparation of the CNT solution Raw arc-discharged single-walled CNTs (SWCNTs) were purchased from Carbon Solutions Inc. A 9-(1-octylonoyl)-9H-carbazole-2,7-diyl (PCz) polymer, which was prepared by Suzuki polycondensation, was used as a highly effective dispersant. First, PCz (200 mg) and the SWCNTs (100 mg) were dispersed in 100 mL of toluene with ultrasonication using a top-tip dispergator (Sonics VC500) for 30 min at an amplitude level of 50%. Next, high-speed centrifugation was performed (Allegra X-22R centrifuge) at 20000 X g for 1 hour to remove most of the bundles and insoluble materials, followed by centrifugation at 50000 X g for 2 h to remove the trace metallic nanotube contents. Finally, the supernatant was collected for use as the CNT solution. Fabrication of the CNT-based CMOS devices A 5 nm titanium film and 50 nm gold film were defined to form the gate electrodes and the interconnect wires by photolithography, electron beam evaporation, and a standard lift-off process. A 12 nm HfO2 film was grown on the gate electrodes by atomic layer deposition (Savannah, Cambridge NanoTech) to function as the gate oxide. Then, the devices were immersed in the CNT solution for 24 hours to deposit the CNT thin films. After deposition, the devices were blow-dried with nitrogen and baked at 90 °C for 10 min using a hot plate. A photolithography process followed by O2 plasma etching was used to remove the unwanted CNTs outside the device channel region. Then, a 40 nm Pd film was deposited as the source/drain contact metal for the p-FETs. Furthermore, a 50 nm Au film was deposited on Pd to prevent Pd cracking on the flexible substrate. A 60 nm Sc film was deposited as the source/drain contact metal for the n-FETs. A 30 nm Al film was deposited on Sc to prevent the oxidation of Sc. Then, a 10 nm HfO2 layer was deposited in the channel of the n-FETs to remove adsorbed oxygen and water and protect the obtained n-FETs. Finally, a parylene-C film with a thickness of 1.45 µm was deposited on the devices as an encapsulation layer to ensure the electrical and mechanical stability of the device performance. The parylene-C located on the measuring electrodes and the interdigital electrodes of the sensor system was etched by O2 plasma. Fabrication of the humidity sensors and the realization of different RHs 8


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Polystyrenesulfonate (NaPss) and sodium carboxymethylcellulose (CMC) were used as humidity-sensitive materials. First, NaPss and CMC were dissolved in DI water with mass fractions of 0.02% and 0.08% to obtain two polymer solutions. The polymer solutions were dip-coated on the interdigital electrodes of the sensors. Then, the devices were baked at 80°C for 30 min to cure the NaPss and CMC. Sensor A was constructed by coating the polymer solution with a mass fraction of 0.02%, while Sensor B was constructed by coating the polymer solution with a mass fraction of 0.08%. Different RH environments were obtained with different saturated aqueous solutions of different salts. The saturated solutions of LiCl, MgCl2, NaBr, NaCl, KBr and K2SO4 provided RHs of 11%, 33%, 57%, 75%, 85% and 97%, respectively. Peeling the ultrathin electronic foil off the supporting silicon wafer. After completing the device fabrication, the wafer was contacted with NaCl electrolyte solution. A voltage was applied between the wafer and the NaCl electrolyte solution, leading to an anodic reaction: Si - 8e- + 8OH- → H2SiO3↓+ 3H2O + O2↑. As the reaction proceeded, the ultrathin plastic device completely peeled off the wafer. The entire exfoliation process was completely strain-free to the ultrathin electronic foil. Characterization of the FETs and ICs. Optical images of the ICs were captured using an optical microscope (Olympus DSX 510). The electrical performances of the FETs and the ICs were measured using a Keithley 4200 system and a probe station (Summit 11000, Cascade Microtech.). For the IC measurements, the input signal was generated by a signal generator (Agilent MXG N5181A), and the output was measured using an oscilloscope (Agilent DSO7054A).

Supporting Information Supporting Information is available free of charge on the ACS Publications website at DOI: Supplementary Section 1-9; Figure S1-S9; Table S1: Cross-sectional SEM image of the device and the effect of the planarization layer; Photograph of the transistor arrays on plastic foil; Comparison of width-normalized transconductances; Statistical results of the performance parameters of the p- and n-FETs; The cyclic bending test；CMOS inverter operating at a Vdd of 0.2

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V; CMOS NAND gate on plastic foil; The output waves of the sensor system in different RHs; Ultralow power dissipation of the integrated sensor system. Corresponding Author E-mail: [email protected]; [email protected];

Acknowledgment This work was supported by the National Natural Science Foundation of China (Grant No. 61571016 and 61621061), the National Key Research & Development Program (Grant No. 2016YFA0201901), and the “Thousand Talents” Program for pioneer researchers.

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13. Yoon, J.; Shin, G.; Kim, J.; Moon, Y. S.; Lee, S. J.; Zi, G.; Ha, J. S. Fabrication of Stretchable Single-Walled Carbon Nanotube Logic Devices. Small 2014, 10, 2910-2917. 14. Zhang, X.; Zhao, J. W.; Dou, J. Y.; Tange, M.; Xu, W. W.; Mo, L. X.; Xie, J. J.; Xu, W. Y.; Ma, C. Q.; Okazaki, T.; Cui, Z. Flexible CMOS-Like Circuits Based on Printed P-Type and N-Type Carbon Nanotube Thin-Film Transistors. Small 2016, 12, 5066-5073. 15. Zhao, Y.; Li, Q.; Xiao, X.; Li, G.; Jin, Y.; Jiang, K.; Wang, J.; Fan, S. Three-Dimensional Flexible Complementary Metal-Oxide-Semiconductor Logic Circuits Based on Two-Layer Stacks of Single-Walled Carbon Nanotube Networks. ACS Nano 2016, 10, 2193-2202. 16. Gao, P.; Zhang, Q. Encapsulate-and-Peel: Fabricating Carbon Nanotube CMOS Integrated Circuits in a Flexible Ultra-Thin Plastic Film. Nanotechnology 2014, 25, 065301. 17. Kim, D. H.; Lu, N.; Ma, R.; Kim, Y. S.; Kim, R. H.; Wang, S.; Wu, J.; Won, S. M.; Tao, H.; Islam, A.; Yu, K. J.; Kim, T. I.; Chowdhury, R.; Ying, M.; Xu, L.; Li, M.; Chung, H. J.; Keum, H.; McCormick, M.; Liu, P. et al. Epidermal Electronics. Science 2011, 333, 838-843. 18. Someya, T.; Bao, Z.; Malliaras, G. G. The Rise of Plastic Bioelectronics. Nature 2016, 540, 379-385. 19. Kaltenbrunner, M.; Sekitani, T.; Reeder, J.; Yokota, T.; Kuribara, K.; Tokuhara, T.; Drack, M.; Schwodiauer, R.; Graz, I.; Bauer-Gogonea, S.; Bauer, S.; Someya, T. An Ultra-Lightweight Design for Imperceptible Plastic Electronics. Nature 2013, 499, 458-463. 20. Lei, T.; Guan, M.; Liu, J.; Lin, H. C.; Pfattner, R.; Shaw, L.; McGuire, A. F.; Huang, T. C.; Shao, L.; Cheng, K. T.; Tok, J. B.; Bao, Z. Biocompatible and Totally Disintegrable Semiconducting Polymer for Ultrathin and Ultralightweight Transient Electronics. PANS. 2017, 114, 5107-5112.

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21. Sekitani, T.; Yokota, T.; Kuribara, K.; Kaltenbrunner, M.; Fukushima, T.; Inoue, Y.; Sekino, M.; Isoyama, T.; Abe, Y.; Onodera, H.; Someya, T. Ultraflexible Organic Amplifier with Biocompatible Gel Electrodes. Nat. Commun. 2016, 7, 11425. 22. Salvatore, G. A.; Munzenrieder, N.; Kinkeldei, T.; Petti, L.; Zysset, C.; Strebel, I.; Buthe, L.; Troster, G. Wafer-Scale Design of Lightweight and Transparent Electronics that Wraps around Hairs. Nat. Commun. 2014, 5, 2982. 23. Wang, C.; Chien, J.-C.; Takei, K.; Takahashi, T.; Nah, J.; Niknejad, A. M.; Javey, A. Extremely Bendable, High-Performance Integrated Circuits Using Semiconducting Carbon Nanotube Networks for Digital, Analog, and Radio-Frequency Applications. Nano Lett. 2012, 12, 1527-1533. 24. Cao, X.; Cao, Y.; Zhou, C. Imperceptible and Ultraflexible P-Type Transistors and Macroelectronics Based on Carbon Nanotubes. ACS Nano 2016, 10, 199-206. 25. Cao, Q.; Kim, H.-s.; Pimparkar, N.; Kulkarni, J. P.; Wang, C.; Shim, M.; Roy, K.; Alam, M. A.; Rogers, J. A. Medium-Scale Carbon Nanotube Thin-Film Integrated Circuits on Flexible Plastic Substrates. Nature 2008, 454, 495-500. 26. Sun, D.-m.; Timmermans, M. Y.; Tian, Y.; Nasibulin, A. G.; Kauppinen, E. I.; Kishimoto, S.; Mizutani, T.; Ohno, Y. Flexible High-Performance Carbon Nanotube Integrated Circuits. Nat. Nanotech. 2011, 6, 156-161. 27. Snow, E.; Campbell, P.; Ancona, M.; Novak, J. High-Mobility Carbon-Nanotube Thin-Film Transistors on a Polymeric Substrate. Appl. Phys. Lett. 2005, 86, 033105. 28. Kim, D. K.; Lai, Y.; Diroll, B. T.; Murray, C. B.; Kagan, C. R. Flexible and Low-Voltage Integrated Circuits Constructed from High-Performance Nanocrystal Transistors. Nat.

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Mitra, S. Sensor-to-Digital Interface Built Entirely with Carbon Nanotube FETs. IEEE J. Solid-St. Circ. 2014, 49, 190-201. 37. Shulaker, M. M.; Hills, G.; Park, R. S.; Howe, R. T.; Saraswat, K.; Wong, H. P.; Mitra, S. Three-Dimensional Integration of Nanotechnologies for Computing and Data Storage on a Single Chip. Nature 2017, 547, 74-78.

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Figure 1. CNT-based CMOS electronics on ultrathin plastic foil. (a) Schematic layout of the CNT-based CMOS structure. (b) Cross-sectional diagram of the CMOS structure. The scanning electron microscopy (SEM) image on the right shows the CNT film used in the devices. Scale bar, 500 nm. (c) Photograph of the as-fabricated device before peeling off the supporting wafer. Scale bar, 1 cm. (d) Photograph of the ultrathin electronic foil conformally attached onto a wrist. Scale bar, 1 cm. (e) Photograph of the ultrathin electronic foil attached onto a piece of rolled paper. Scale bar, 1 cm. (f) Transfer characteristics of 100 p-FETs and 100 n-FETs with a |Vds| of 2 V, measured after peeling off the wafer. (g) Typical pair of output characteristics of the p- and n-FETs. (h) Statistical distribution of the threshold voltage (Vth) of the 100 p-FETs and 100 n-FETs shown in (f).

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Figure 2. Mechanical characteristics of the ultrathin electronic foil. (a) Photograph of the electronic foil after rolling. Scale bar, 200 µm. (b) Comparison of the transfer characteristics of the electronic foil before and after rolling. (c) Comparison of the output characteristics of the electronic foil before and after rolling. (d) Schematic diagrams showing the process of applying compressive strain to the electronic foil. (e) and (f) Photograph and enlarged image of the devices under 45% compressive strain. The scale bar in (e) denotes 2 mm. The scale bar in (f) denotes 500 µm. (g) Transfer characteristics of the p- and n-FETs after experiencing 45% compressive strain. (h) Comparison of the Ion/W statistics of the p-FETs before and after compression at Vds = -2 V. (i) Comparison of the Ion/W statistics of the n-FETs before and after compression at Vds = 2 V.

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Figure 3. CNT CMOS inverters and ICs on ultrathin plastic foil. (a) VTC curves of 50 CMOS inverters with a Vdd of 2 V. (b) Statistical distribution of the gains of the CNT CMOS inverter measured at Vdd = 2 V. (c) VTCs of a typical CMOS inverter upon decreasing Vdd from 2 V to 0.2 V with a step of 0.2 V. (d) Voltage gain calculated from the data in (c). (e, f) Circuit diagram and photograph of a three-stage RO with an output buffer on plastic foil. Scale bar, 100 μm. (g) Oscillation frequency change of the three-stage RO upon increasing the Vdd from 1 V to 2.8 V. (h) Output waveform of the three-stage RO with a Vdd of 2.8 V. Circuit diagram, photograph and measurement results of the (i-k), NOR gate, (l-n), XOR gate, and (o-q), half-adder. A and B represent the input signals, and O represents the output signal. S and C represent the output sum and carry of the half-adder, respectively. Scale bars, 50 µm in (j) and (m); 100 µm in (p).

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Figure 4. Integrated humidity sensor system with in situ FM signal processing. (a) Photograph of the resistive humidity sensor on ultrathin plastic foil. Scale bar, 1 mm. (b, c) Photograph and circuit diagram of the integrated sensor system. Scale bar in (b) denotes 1 mm. (d) Impedance change of the resistive humidity sensors upon increasing the RH from 11% to 97%. Sensor A and Sensor B are constructed using polymer solutions with mass fractions of 0.02 wt.% and 0.08 wt.%, respectively. (e) Impedance and output frequency changes of the three-stage RO upon increasing the Vdd from 1 V to 5 V. (f) Frequency-humidity curves of the integrated sensor system in both logarithmic and linear coordinates when Vdd is 5 V. (g) Photograph of the integrated sensor systems attached onto skin for sweat monitoring. Scale bar, 1 cm. (h) Output waveform of the sensor system attached to dry skin. (i) Output waveform of the sensor system attached to sweating skin.

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Table of Contents Synopsis: Flexible high-performance carbon nanotube complementary electronics and its application in sensor systems are demonstrated on an ultrathin plastic foil with a thickness of 2.5 microns. The performances of both the flexible p- and n-type CNT field-effect transistors are excellent and symmetric, resulting in a ring oscillator with an oscillation frequency of 5 MHz on plastic. A skin-mounted humidity sensor system with in situ frequency modulation was realized to monitor human body sweating. Keywords: carbon nanotubes, flexible electronics, CMOS, integrated sensor system

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High-Performance Carbon Nanotube Complementary Electronics and

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