Enhanced ZnO Thin-Film Transistor Performance Using Bilayer Gate

Letter www.acsami.org

Enhanced ZnO Thin-Film Transistor Performance Using Bilayer Gate Dielectrics Fwzah H. Alshammari, Pradipta K. Nayak, Zhenwei Wang, and Husam N. Alshareef* Materials Science and Engineering, King Abdullah University of Science and Technology (KAUST), Thuwal 23955-6900, Saudi Arabia S Supporting Information *

ABSTRACT: We report ZnO TFTs using Al2O3/Ta2O5 bilayer gate dielectrics grown by atomic layer deposition. The saturation mobility of single layer Ta2O5 dielectric TFT was 0.1 cm2 V−1 s−1, but increased to 13.3 cm2 V−1 s−1 using Al2O3/Ta2O5 bilayer dielectric with significantly lower leakage current and hysteresis. We show that point defects present in ZnO film, particularly VZn, are the main reason for the poor TFT performance with single layer dielectric, although interfacial roughness scattering effects cannot be ruled out. Our approach combines the high dielectric constant of Ta2O5 and the excellent Al2O3/ZnO interface quality, resulting in improved device performance.

KEYWORDS: thin film transistor, zinc oxide, aluminum oxide, tantalum oxide, bilayer inc oxide (ZnO) thin film transistors (TFTs) have been extensively studied because of the desirable properties of ZnO, including wide band gap, low processing temperature, and high optical transparency in the visible range.1−4 ZnO TFTs have been reported using many techniques such as pulsed laser deposition, sputtering, chemical vapor deposition, and sol−gel.5−9 High-performance TFTs with high mobility and low operating voltage are required to achieve low power consumption in electronic circuits. In TFT devices, the gate dielectric material plays an important role in controlling device performance.10 It is known that conventional gate dielectric aluminum oxide (Al2O3) cannot meet these requirements because of its low dielectric constant, although there are some advantages such as good quality interface with the semiconductor and low leakage current due to the wide band gap of Al2O3.11−14 To improve the TFT performance, much activity has been dedicated to incorporating high-k dielectrics in TFTs using various deposition methods.15−19 This is because high-k dielectrics can, in principle, reduce the operating voltage of the devices and increase the corresponding field-effect mobility. However, there are several potential disadvantages associated with using high-k gate dielectrics in TFTs. For example, defects in high-k dielectrics could lead to defect-mediated current transport such as the Poole−Frenkel effect, which increases the device leakage.20 Tantalum oxide (Ta2O5) is a promising gate dielectric with a dielectric constant of about 20.15 However, efforts to deposit this material by atomic layer deposition (ALD) in ZnO channel devices have not been successful. In fact, our effort to deposit ZnO on ALD Ta2O5 resulted in devices with highly resistive channels. We have resolved this issue using a bilayer dielectric

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© XXXX American Chemical Society

concept, which gives good TFT performance. Specifically, we fabricated the TFTs using ZnO as the channel layer and Al2O3/ Ta2O5 bilayer as the gate dielectric. We show that inserting ultrathin Al2O3 layer between ZnO and Ta2O5 greatly improves the TFT performance. The bilayer concept takes full advantage of the high-k value of Ta2O5, increasing device mobility, while significantly reducing gate leakage current and hysteresis. Indium tin oxide (ITO)-coated glass substrates were used to make TFTs with a bottom-gate top-contact configuration. The ZnO channel layer and the dielectric films (Al2O3 and Ta2O5) were deposited by ALD. Diethyl zinc (DEZ), trimethylaluminum (TMA) and deionized water were used as the precursors for Zn, Al, and O, respectively. In comparison, t-butylimidotris (dimethylamido) tantalum and O2 plasma were used to deposit Ta2O5. Devices with three different gate dielectrics were fabricated, including Ta2O5 single layer, Al2O3/Ta2O5 bilayer, and Al2O3 single layer. Table 1 summarizes the structures of the fabricated devices in this study. One device included a single layer of Ta2O5 and will henceforth be referred to as TFTTa2O5. The specific structure of this TFT-Ta2O5 device is ZnO (160 cycles)/Ta2O5 (1000 cycles)/ITO/glass. The thickness of ZnO and Ta2O5 layers in the TFT-Ta2O5 device were 25 and 100 nm, respectively. Actually, the active ZnO layer thickness was fixed at 25 nm for all devices studied. Another device included a single layer of Al2O3 gate dielectric, and will henceforth be referred to as TFT-Al2O3. The specific structure Received: June 4, 2016 Accepted: August 24, 2016

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DOI: 10.1021/acsami.6b06498 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX

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ACS Applied Materials & Interfaces Table 1. Electrical Performance of ZnO TFTs Using Different Gate Dielectrics sample TFTTa2O5 TFT2AL TFT4AL TFT8AL TFT12AL TFTAl2O3

dielectric constant

leakage current (A cm−2)

μsat (forward) (cm2 V−1 s−1)

μsat (backward) (cm2 V−1 s−1)

Vth (forward) (V)

Vth (backward) (V)

SS (V dec−1)

Ion/Ioff

Von (V)

1000 cycles Ta2O5

16.8

2 × 10−5

0.1

0.13

−0.3

9.6

2.15

1 × 105

−6.9

20 cycles Al2O3//1000 cycles Ta2O5 40 cycles Al2O3//1000 cycles Ta2O5 80 cycles Al2O3//1000 cycles Ta2O5 120 cycles Al2O3// 1000 cycles Ta2O5 1000 cycles Al2O3

15.1

8 × 10−7

3.0

3.4

0.1

9.2

0.58

1 × 107

−4.1

7

description

−7

14.4

1 × 10

9.0

8.6

0.5

3.1

0.38

1 × 10

−2.7

13.8

4 × 10−8

9.9

9.4

1.4

1.9

0.24

1 × 108

−1.4

12.8

2 × 10−8

13.3

12.6

1.1

1.4

0.19

1 × 108

−1.2

8.4

3 × 10−9

7.0

7.1

2.1

2.5

0.38

1 × 108

−3.8

of the TFT-Al2O3 device is ZnO (160 cycles)/Al2O3 (1000 cycles)/ITO/glass. The thickness of Al2O3 layer in the TFTAl2O3 device was 100 nm. All other devices included a bilayer Al2O3/Ta2O5 dielectric in which the Ta2O5 thickness was fixed at 100 nm and the thickness of Al2O3 layer was varied (2, 4, 8, and 12 nm), as indicated in Table 1. The channel layer was patterned by photolithography and wet etching process. Ti (10 nm)/Au (70 nm) source and drain electrodes were deposited by e-beam/thermal evaporation and patterned using lift-off technique, with channel width (W) and length (L) of 500 and 100 μm, respectively. Finally, all devices were annealed at 160 °C for 1 h in air prior to device measurements to improve the electrical contact with the channel layer. The surface morphology of the different gate dielectrics and ZnO thin films were measured by atomic force microscope (AFM). Crystal structure of the gate dielectrics and ZnO thin films were investigated by X-ray diffraction (XRD). Current−voltage (I−V) characteristics were measured using an Agilent B1500A semiconductor device analyzer in the dark. Schematics of the ZnO TFTs used in this study are shown in Figure 1a−c. More specific details about the samples can also be found in Table 1. Figure 2a shows the leakage current characteristics of the different dielectric layers constructed in Al/dielectric/ITO metal−insulator−metal structure. The asymmetries in these I−V curves are attributed to the difference in the electrode work functions (Al vs ITO) and their thermal histories during the device processing. The band alignment for Figure 2. (a) Leakage current density vs applied voltage and (b) capacitance vs frequency measured in metal/dielectric/metal configuration using different gate dielectrics. The variation of dielectric constant vs Al2O3 interfacial layer thickness is shown in the inset of b. The capacitor area is 7.85 × 10−5 cm2.

materials used in this MIM structure is shown in Figure S1. It can be seen that a high leakage current density is observed for devices with single-layer Ta2O5 (100 nm) dielectric, which is partly due to its relatively low band gap (4.1 eV). The I−V characteristics of Al2O3/Ta2O5 bilayer dielectrics containing 2, 4, 8, and 12 nm interfacial Al2O3 layers are shown in Figure 2a. Note that all bilayer dielectrics show significantly lower leakage current than single layer Ta2O5 because of the effective gate leakage suppression by the thin Al2O3 layers. These leakage currents are shown in Table 1. It is clear that the leakage current decreases with increasing Al2O3 film thickness, a result that can decrease the off-current and improve the TFT performance. The I−V curve of the devices using a single Al2O3 dielectric layer (100 nm) is shown in Figure 2a, where a low leakage current density is obtained because of the large

Figure 1. Schematic of the device structures for (a) TFT-Ta2O5 singlelayer device, (b) TFT-2AL, 4AL, 8AL, and 12AL bilayer Al2O3/Ta2O5 devices, and (c) TFT-Al2O3 single layer device. The thickness of ZnO channel in all devices is 25 nm (160 ALD cycles). B

DOI: 10.1021/acsami.6b06498 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX

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ACS Applied Materials & Interfaces

Figure 3. Output characteristics of ZnO TFTs using (a) Ta2O5 single-layer gate dielectric and (b) 12 nm Al2O3/100 nm Ta2O5 bilayer gate dielectric; (c) saturation current vs Al2O3 layer thickness in the dielectric stack at different gate bias voltages; (d) transfer characteristics of ZnO TFTs fabricated using single and bilayer gate dielectrics.

only 0.1 cm2 V−1 s−1, but increased to 13.3 cm2 V−1 s−1 with a very thin layer of Al2O3. In addition, mobility values were extracted from both off-to-on and on-to-off transfer curves and the results are summarized in Table 1. Notice that the calculated mobility values are similar regardless of which transfer curve (off-to-on or on−to-off) was used. This result suggests that the clockwise hysteresis observed in some samples is due to charge trapping at the interface.24 Interestingly, negligible hysteresis was observed for the ZnO/Al2O3 devices and for devices with bilayer dielectric containing 8 and 12 nm Al2O3 (TFT-8AL and TFT-12AL). In contrast, significant hysteresis was observed for devices with thin or no Al2O3 interfacial layer. Specifically, the threshold voltage difference (ΔVth) between the forward and backward sweep for the ZnO TFTs on Ta2O5 single-layer gate dielectric was found to be ∼9.9 V (a huge value). The ΔVth remained high (9.1 V) for the TFTs using only 2 nm interfacial Al2O3 layer on top of Ta2O5. However, ΔVth gradually decreased with increasing Al2O3 thickness and a minimum ΔVth of 0.3 V was found for the TFT with 12 nm Al2O3, which is close to the ΔVth for the ZnO TFT using single-layer Al2O3 gate dielectric as shown in Figure S5. From the above results, it is clear that there is a significant degradation in transistor performance when the ZnO film is grown directly on ALD Ta2O5 dielectric. Material characterizations of the different layers were performed to understand the difference in device performance. Figure S6a−f show the AFM images of ALD-ZnO films and gate dielectrics. The measured root-mean-square (RMS) roughness of the dielectrics Ta2O5 (3.7 nm), bilayer Al2O3/Ta2O5 (2.7 nm), Al2O3 (2.7 nm), and semiconductor layer ZnO/Ta2O5 (3.0 nm), ZnO/ Al2O3/Ta2O5 (2.6 nm), ZnO/Al2O3 (2.7 nm) show an interesting effect. A smoother surface was clearly obtained with the bilayer dielectric in which a thin Al2O3 layer was inserted between ZnO and Ta2O5, which may have contributed to the improved device mobility by minimizing carrier scattering due to interfacial roughness.25−27 The XRD patterns

band gap and low defect density of the thin Al2O3 layer.21 The capacitance of the dielectric layer is another important parameter in determining TFT performance. Figure 2b shows the capacitance−frequency curves for the gate dielectrics studied in the range of 1 kHz to 1 MHz, where capacitance seems to have stabilized at frequencies well above 1 kHz. The dielectric constants calculated at 1 kHz are shown in the inset of Figure 2b and they agree with published reports on sputtered Ta2O522 and ALD processed Al2O3.23 Low-frequency capacitance measurement result is shown in Figure S2. Figure 3a shows the output characteristics of TFT-Ta2O5 devices (single Ta2O5 dielectric), which show poor performance. The drain current was only ∼3 μA at VDS = 20 V and VGS = 10 V. However, the TFT-12AL device (with 12 nm Al2O3/ 100 nm Ta2O5 bilayer dielectric) showed good output characteristics, with drain current ∼100 μA and good saturation behavior. Clearly, the bilayer dielectric produces significantly higher drive current than single layer dielectrics, as shown in Figure 3b. Figure 3c shows the saturation current for all TFTs vs Al2O3 layer thickness. It is observed that the saturation currents of the TFTs with Al2O3/Ta2O5 bilayer dielectrics is much higher than those of the devices with single layer dielectrics. Furthermore, Figure 3d shows the transfer characteristics, which were used to calculate the mobility in the saturation regime (μsat) by linear fitting of the square root of ID vs VG curve. The TFT-Ta2O5 device showed very low mobility, low Ion/Ioff, and large hysteresis, which comes from Zn-related defects in the channel, as will be discussed later in the manuscript. In the case of single-layer Al2O3 dielectric (TFT-Al2O3), a good saturation behavior was observed with high (Ion/Ioff) ratio. The leakage current levels for all TFTs are shown in Figure S3. The Ion/Ioff ratios are plotted as a function of the thickness of Al2O3 layers, as shown in Figure S4. Devices with bilayer dielectrics showed good saturation and better performance compared to single layer dielectrics, including high μsat, low Vth, low Von, and high Ion/Ioff ratio, as shown in Table 1. For example, μsat for ZnO channel on single layer Ta2O5 was C

DOI: 10.1021/acsami.6b06498 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX

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ACS Applied Materials & Interfaces

∼424.5 nm corresponds to the defects in ZnO as discussed above. To identify the other peak at 431.9 nm and the very broad feature above 450 nm in the case of ZnO/Ta2O5 film, PL was also performed on a bare Ta2O5 film, the spectrum is shown in the bottom of Figure 4b. Interestingly, this spectrum contains a peak at 431.9 nm and similar broad feature above 450 nm.30 Thus, we conclude that the PL spectrum for ZnO/ Ta2O5 sample consists of the signal from both ZnO and Ta2O5 layers, because the excitation wavelength (3.82 eV) is comparable with that of both ZnO (3.35 eV) and Ta2O5 (4.1 eV). However, the main peak in the PL spectrum of ZnO/ Ta2O5 sample is much broader, especially at the left shoulder. This indicates that a certain contribution from the top ZnO layer (∼425 nm) is involved in that broad PL peak, which may correspond to Zni or VZn. The peak composition for this defect level in ZnO/Ta2O5 is much higher than that in ZnO/Al2O3 sample, indicating a higher density of Zni or VZn inside ZnO film on Ta2O5, which might be the origin of the difference in the device performance. Since the VZn are acceptor dopants, they introduce holes in the valence band of ZnO, which causes a significant drop in the electronic carriers, as experimentally observed. Hence we can conclude that the inferior electrical performance of the ZnO/Ta2O5 TFTs is due to VZn point defect formation in ZnO films grown on Ta2O5. In summary, we have shown that using bilayer gate dielectrics is an effective approach to optimize TFT performance. ZnObased TFTs with Al2O3/Ta2O3 bilayer gate dielectric exhibited higher saturation mobility, higher on current to off current ratio, lower turn-on voltage, and negligible hysteresis compared to TFTs using a single Ta2O5 dielectric layer. The bilayer design reduces the concentration of zinc vacancies in ZnO, which reduces channel resistance. In addition, the bilayer design improves interface roughness, which contributes to the improved TFT performance.

of the ZnO films deposited on the Ta2O5 single layer, Al2O3/ Ta2O5 bilayers, and Al2O3 single layer are shown in Figure 4a.

Figure 4. (a) XRD patterns of ZnO films deposited on 100 nm Al2O3, 12 nm Al2O3/100 nm Ta2O5, and 100 nm Ta2O5. The ZnO film grown on Al2O3 appears to show a higher degree of (002) orientation. (b) PL spectra for ZnO on Al2O3, Ta2O5, and the corresponding spectrum for bare Ta2O5.

The ZnO films on Al2O3 and Al2O3/Ta2O5 were polycrystalline and crystallized in hexagonal structure with a dominant (002) peak at around 34.4°, indicating a preferred crystal orientation along the c-axis. However, the ZnO films on Ta2O5 have poor crystal quality, with a broad peak, indicating a more disordered lattice structure, which may also lead to carrier scattering. One very important observation was that the ZnO layer was substantially more resistive when deposited on the Ta2O5 layer. To understand this result, photoluminescence (PL) spectra were measured at 77 K by a micro Raman spectrometer (LabRAM Aramis, Horiba) using He−Cd laser source (excitation wavelength: 325 nm, ∼3.82 eV). The PL spectra for ZnO films (25 nm) on Al2O3 or Ta2O5 surface (ZnO/Al2O3 or ZnO/Ta2O5 film) are shown in Figure 4b. The spectrum for ZnO/Al2O3 film consists of one sharp peak and one very weak broad peak, centered at 370.4 and 424.5 nm, respectively. The first sharp peak can be attributed to the band-to-band transition of ZnO, indicating a direct band gap (Eg) of 3.35 eV.28 The weak and broad peak at 424.5 nm is attributed to Zn-related point defects, such as Zn interstitial (Zni) or Zn vacancies (VZn).29 No peak from bottom Al2O3 can be found, since the Eg of Al2O3 (9 eV) is much larger than the excitation source (3.82 eV). It is noted that the PL peak intensity of the defect levels is much lower than that from the band-to-band transition, indicating high crystallinity, which is consistent with the XRD results. In comparison, the PL spectrum of ZnO/Ta2O5 film shows a very weak band-to-band transition peak, consistent with the low diffraction peaks in XRD pattern, indicating more disorder in the lattice structure of the corresponding ZnO film. The peak at

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ASSOCIATED CONTENT

* Supporting Information S

The Supporting Information is available free of charge on the ACS Publications website at DOI: 10.1021/acsami.6b06498. Band alignment for materials used in MIM structure for capacitance and I−V measurement; capacitance vs frequency measured from 200 Hz in MIM configuration using different gate dielectrics; transfer characteristics of ZnO TFTs fabricated using single and bilayer gate dielectrics with their leakage currents; Ion/Ioff ratios for all TFTs as a function of Al2O3 thickness; method used to evaluate hysteresis in TFT operation, threshold voltage values were extracted from on-to-off and off-to-on transfer curves and hysteresis values were calculated from the difference between two measured threshold voltages (PDF)

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AUTHOR INFORMATION

Corresponding Author

*E-mail: [email protected]. Phone: +966-(0)12808-4477. Notes

The authors declare no competing financial interest.

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ACKNOWLEDGMENTS Research reported in this publication was supported by King Abdullah University of Science and Technology (KAUST). The D

DOI: 10.1021/acsami.6b06498 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX

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authors thank the staff of the Nanofabrication Facility and imaging and characterization at KAUST, particularly Ahad Syed and Nimer Wehbe, for their excellent support.

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DOI: 10.1021/acsami.6b06498 ACS Appl. Mater. Interfaces XXXX, XXX, XXX−XXX